A
AX
X3
3S
S-
-U
U
/
/
A
AX
X3
3S
S
P
Pr
ro
o-
-U
U
O
On
nl
li
in
ne
e
M
Ma
an
nu
ua
al
l
CODEC (Coding and Decoding) .................................................................................................................................................. 99
DDR (Double Data Rated) SDRAM ............................................................................................................................................. 99
DIMM (Dual In Line Memory Module).......................................................................................................................................... 99
DMA (Direct Memory Access) ...................................................................................................................................................... 99
ECC (Error Checking and Correction) ....................................................................................................................................... 100
EDO (Extended Data Output) Memory...................................................................................................................................... 100
EEPROM (Electronic Erasable Programmable ROM)............................................................................................................. 100
EPROM (Erasable Programmable ROM).................................................................................................................................. 100
EV6 Bus......................................................................................................................................................................................... 101
FCC DoC (Declaration of Conformity)....................................................................................................................................... 101
FC-PGA (Flip Chip-Pin Grid Array)............................................................................................................................................ 101
Flash ROM .................................................................................................................................................................................... 101
FSB (Front Side Bus) Clock........................................................................................................................................................ 102
I2C Bus........................................................................................................................................................................................... 102
IEEE 1394 ..................................................................................................................................................................................... 102
Par ity B it ........................................................................................................................................................................................ 102
PBSRAM (Pipelined Burst SRAM) ............................................................................................................................................. 103
PC-100 DIMM ............................................................................................................................................................................... 103
PC-133 DIMM ............................................................................................................................................................................... 103
