Asus P552W Bedienungsanleitung

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P552W Level 3,4

Trouble Shooting Guide

Ver 1.0

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CONTENT

1. OVERVIEW

1.1 System Block Diagram ...……………………..……………... 5

1.2 power-on sequence ………………………………………...… 6

1.2.1 Start-up Timing Diagram …………………...……………. 6

1.2.2 Start-up Timing Parameters …………………………...….7

1.2.3 Power-on Sequence Summary ………………...…………. 7

1.2.4 POWER UP RESET TIMING ………………………….... 8

1.2.5 POWER UP TIMING SPECIFICATIONS (1/2) ………... 9

1.2.6 POWER UP TIMING SPECIFICATIONS (2/2) ………... 9

1.3 Main Specification ………………………………………….. 10

1.4 Device exterior description …………………………………. 11

1.4.1 FRONT SIDE ………………………….………………... 11

1.4.2 BACK SIDE …………………………………………….. 12

1.5 On Board Major Components Location …………………….. 13

1.5.1 FRAON SIDE ………………………………………..…. 13

1.5.2 BACKT SIDE …………………………………………... 14

1.6 Debugging Equipments ……………………………………... 16

2.Baseband Trouble Shooting

2.1 Introduction …………………………………………………. 19

2.2 Device Cannot Power On …………………………………… 19

2.2.1 Measure each power-on sequence voltage level ………... 19

2.2.2 RTC can’t power on issue ………………………………. 21

2.3 Device Peripheral Trouble Shooting (MMI Testing) ……….. 22

2.3.1 LCD Display Test ………………...…………………….. 22

2.3.2 Vibrator Test ……………………….…………………… 23

2.3.3 RTC Test ……………………………...………………… 23

2.3.4 Storage Test …………………………………………….. 23

2.3.5 MicroSD Test …………………………………………… 24

2.3.6 LED Test ………………………………………………... 24

2.3.7 3M and VGA camera Test ……………………………… 25

2.3.8 SIM Test ………………………………………………... 27

2.3.9 Battery Test ……………………………………………... 28

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2.3.10 SDRAM Test ………………………………..………… 30

2.3.11 Audio Test …………………………………………….. 30

2.3.12 Touch Panel Defect ……………………………….… 35

3.RF Trouble Shooting

3.1 Equipment ……………………………………..…………... 36

3.1.1 Software requirements ................................................. 36

3.1.2 Hardware requirements ................................................... 36

3.1.3 Instrument requirements.................................................. 36

3.2 RF Block Diagram..................................................................37

3.2.1 GSM block diagram........................................................ .37

3.2.2 WCDMA block diagram.................................................. 38

3.2.3 Bluetooth and WLAN block diagram ............................. 39

3.3.4 GPS block diagram ......................................................... 40

3.3 Procedures of RF Repair........................................................ 40

3.3.1 GSM and WCDMA repair procedures ........................... 40

3.3.2 Bluetooth and WLAN repair procedure ......................... 42

3.3.3 GPS repair procedure ..................................................... 43

3.4 General GSM debug.............................................................. 44

3.4.1 GSM path and test points ............................................ 44

3.4.2. GSM Tx debug ……………………………………... 48

3.4.3 GSM Rx debug ............................................................ 58

3.5 General WCDMA debug....................................................... 64

3.5.1. WCDMA path and test points ……………………..... 64

3.5.2 WCDMA Tx debug ..................................................... 67

3.5.3 WCDMA Rx debug………………………………….. 75

3.6 General Bluetooth and WLAN debug .................................. 80

3.6.1 Bluetooth and WLAN path and test points ………...... 80

3.6.2 Bluetooth and WLAN debug ………………………... 82

3.7 General GPS debug................................................................ 86

3.7.1 GPS path and test points .............................................. 86

3.7.2 GPS debug …………………………………………... 89

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Appendix

1. Bluetooth Debug Tool Operation ................................... 101

2. WLAN Debug Tool Operation ....................................... 104

3. GPS Debug Tool Operation – GPSinformation_en........ 109

4. GPS Firmware Download Tool Operation – GPSDL..... 111

5. GPS Debug Tool Operation – SiRFDemo...................... 113

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1. OVERVIEW

1.1 System Block Diagram

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1.2 power-on sequence

1.2.1 Start-up Timing Diagram

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1.2.2 Start-up Timing Parameters

1.2.3 Power-on Sequence Summary

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The baseband processor must write a logic 1 to a dedicated I2C

watchdog register bit during the next 8 s period. This will

move the DA9035 into the ACTIVE mode, and start the continuous

watchdog monitoring circuit. Failure to issue the initial watchdog

write will result in shut down of the DA9035 to the power-down state.

Once in the ACTIVE state, the EXT_WAKEUP signal will be

asserted while the nONKEY, nEXTON or VCHG_DETECT are

asserted (after de-bouncing), otherwise it is held low.

All I/Os of the DA9035, connected to the host processor will be

released at the end of the 32 ms countdown.

1.2.4 POWER UP RESET TIMING

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1.2.5 POWER UP TIMING SPECIFICATIONS (1/2)

1.2.6 POWER UP TIMING SPECIFICATIONS (2/2)

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1.3 Main Specification

Networks

HSDPA 3.6Mbps, UMTS 2100

EDGE/GPRS/GSM 900/1800/1900, Class 10

Operating System Microsoft Windows® Mobile™ 6.1 Professional

CPU Marvell Tavor 624MHz

Memory 256 MB Flash + 128MB SDRAM

Connectivity USB v1.1(FS), Bluetooth 2.0+EDR

GPS SiRF Star III

Display 2.8“, QVGA 240 x 320, 65K, TFT

Camera 2 Mega-Pixel, Fixed Focus

Battery 1100mAh Lithium

Weight Around 105g (with battery)

Standby Time 3G: 150 hours / 2G: 150 hours

Talk Time 3G: 3 hours / 2G: 5 hours

Expansion Slot Micro-SD (support SDHC)

Browser HTTP / WAP 1.2.1/2.0

Messaging SMS / MMS / Email / MSN / Push E-mail

Video

Record:MPEG4@QVGA 24fps / H.263@QCIF 24fps

Playback:MPEG4@QVGA 30fps / H.263@QCIF 30fps

Picture JPEG / PNG / GIP / BMP

Audio MP3 / WMA / 3GP / AAC / AAC+

Ringtone MP3 / MIDI

JAVA J2ME (CLDC 1.1 + MIDP2.0)

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