Casio CE-300 (EX-247) Bedienungsanleitung

SERVICE MANUAL

ELECTRONIC CASH REGISTER

(without price)

JANUARY 1997

CE-300(EX-247)

Printer Model : MD-910

www.freeservicemanuals.info

3/22/15

Digitized in Heiloo, Holland.

CONTENTS

Page

1. SPECIFICATIONS ................................................................................................ 1

2. INITIALIZE (MAC) OPERATION .......................................................................... 1

3. BLOCK DIAGRAM

3-1. PCB connection ......................................................................................... 2

3-2. Block diagram (circuit) .............................................................................. 3

4. CIRCUIT EXPLANATION

4-1. Power supply circuit.................................................................................. 4

4-2. CPU (uPD78052GC-093-3B9) .................................................................... 5

4-3. Display controller (uPD16312GB-3B4)..................................................... 7

4-4. Initialize IC (Reset circuit) ......................................................................... 8

4-5. Power down detection circuit (PWD) ....................................................... 8

4-6. Address latch circuit ................................................................................. 8

4-7. RAM / ROM bank selection circuit............................................................ 9

4-8. Head drive circuit for printer................................................................... 10

4-9. Vpp sensor circuit.................................................................................... 11

4-10. Power supply circuit for display............................................................. 11

5. DIAGNOSTIC

5-1. To start the diagnostic program............................................................. 12

5-2. Check item................................................................................................ 12

5-3. Operation of each test ............................................................................. 12

5-4. To exit the diagnostic test....................................................................... 17

6. ERROR CODE

6-1. Operation error code ............................................................................... 18

6-2. System lock code..................................................................................... 19

7. IC DATA

1. TC74HC00AP ............................................................................................ 20

2. TC74HC08AP ............................................................................................ 20

3. TC74HC138 ............................................................................................... 20

4. TC74HC367AP .......................................................................................... 21

5. TL431CLPB............................................................................................... 21

6. TC74HC373AP .......................................................................................... 21

7. S-80745 / S-80719..................................................................................... 22

8. M5237L...................................................................................................... 22

9. MAX232 ..................................................................................................... 22

8. PCB LAYOUT ..................................................................................................... 23

9. CIRCUIT DIAGRAMS ......................................................................................... 25

10. PARTS LIST ....................................................................................................... 41

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— 1 —

1. SPECIFICATIONS

Power consumption 120 V 220 V 230 V 240 V

In operation Max. 0.28 A 0.17 A 0.16 A 0.15 A

Stand by 0.14 A 0.09 A 0.08 A 0.07 A

Mode SW OFF Max. 0.12 A 0.08 A 0.07 A 0.06 A

Memory protection Backup battery Mangan Battery

UM-3 ×3 pcs.

Backup period 1 year (25 °C)

Battery life Replace the battery every 1 year.

Memory capacity 32 KB CXK58257AP-70/10L

Clock and calender Accuracy Within ±30 sec. per month (25 °C)

Auto calender Effective until 2099 A.D.

Environment Operating temperature 0 °C~40°C

Operating humidity 10 % ~ 90 %

Storage temperature -25 °C~65°C

Storage humidity 10 % ~ 95 %

Printer Model MD-910-SSC

Print method Dot matrix printing

Print digits 24 digits

MCBF 1,500,000 lines

Ink cassette Life 250,000 characters

Roll paper Type Fine-quality paper or Pressure-sensitive copy paper

Size 57.5 ±0.5 mm

Roll diameter 83 mm or less

2. INITIALIZE (MAC) OPERATION

1. Set the mode switch to “OFF” position.

2. Pressing the “FEED” button and turn the mode switch to “PRG” position.

3. Release the “FEED” button.

4. Press “#2” key (Normally “SUB TOTAL” key).

5. Initialize operation is executed.

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3/22/15

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— 2 —

FPC

Mode SW

E266-E3-1

CN3

24P

Main Display

(SH101MA) E278-E2-1

12P10P

Rear Display

(SH1019A) E278-E2-2

Fuse

Transformer

3P CN7

CN6

CN4

17P CN13

CN14

3P CN2

(RS232C)

CN17 CN16

25P

Mangan Battery

(UM-3 ×3)

Winder

Motor

Printer

(MD910SSC)

Drawer

E247-CNB

CORE

2 turn

10P

E247-1

3. BLOCK DIAGRAM

3-1. PCB connection

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3/22/15

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— 3 —

MAIN DISPLAY

CUSTOMER DISPLAY SH101MA

SH1019A

Segment & Digit data

uPD16312GB-

3B4 DRWS

Mode

Key

Keyboard

FPC

A8~A15

AD0~AD7

ROM

RAM

A0~A7

CPU

uPD78052GC-093-3B9

Reset circuit

S80719AN

Head drive cuicuit

HD.A~HD.H

PWD detection

RS232C circuit

Printer

MD-910

DI,DO,CLK,STB

KC0~KC4

AD0~AD5

Select addess

3-2. Block diagram (circuit)

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— 4 —

Q1: Power transistor

Q2: Voltage detection transistor

Voltage level at above check point (unit: V )

Measurement

position ABCD

Voltage (V) 12.5V 5.3V 6.2V 2.47V

4. CIRCUIT EXPLANATION

4-1. Power supply circuit

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— 5 —

Pin No. Signal Description In/Out Status of

Power On Status of

Power OFF

1 FB3 Not used — — —

2 FB4 RAM bank 3 Out High High

3 FB5 RAM bank 4 Out High High

4 AVSS GND — GND GND

5 PGM Not used — — —

6 RAM Chip select signal for RAM Out High Low

7 AVREF VDD — 5 V 5 V

8 RXD Receive data In High High

9 TXD Send data Out High High

10 WD Winder motor drive signal Out Low Low

11 DI Data signal from uPD16312 In Pulse High

12 DO Data signal to uPD16312 Out Pulse High

13 CLK Clock signal for uPD16312 Out Pulse High

14 STB Data strobe signal for uPD16312 Out Pulse High

15 KC0 Key common signal (KC0) Out Pulse High

16 KC1 Key common signal (KC1) Out Pulse High

17 KC2 Key common signal (KC2) Out Pulse High

18 KC3 Key common signal (KC3) Out Pulse High

19 AD0 Address / Data signal (AD0) In/Out Pulse High

20 AD1 Address / Data signal (AD1) In/Out Pulse High

21 AD2 Address / Data signal (AD2) In/Out Pulse High

22 AD3 Address / Data signal (AD3) In/Out Pulse High

23 AD4 Address / Data signal (AD4) In/Out Pulse High

24 AD5 Address / Data signal (AD5) In/Out Pulse High

25 AD6 Address / Data signal (AD6) In/Out Pulse High

26 AD7 Address / Data signal (AD7) In/Out Pulse High

27 A8 Address signal (A8) Out Pulse High

28 A9 Address signal (A9) Out Pulse High

29 A10 Address signal (A10) Out Pulse High

30 A11 Address signal (A11) Out Pulse High

31 A12 Address signal (A12) Out Pulse High

32 A13 Address signal (A13) Out Pulse High

33 VSS GND — GND GND

34 A14 Address signal (A14) Out Pulse High

35 A15 Address signal (A15) Out Pulse High

36 INIT PAD2 status — — —

37 VPP PAD1 status — — —

38 DSR Data set ready signal In High High

39 KC4 Key common signal (KC4) Out Pulse High

40 RD Output enable signal of RAM/ROM (RD) Out Pulse High

41 WR Write enable signal of RAM (WR) Out Pulse High

42 RA14 Address signal of ROM (Bank 0) Out High High

43 ASTB Latch enable for Address decoder (ASTB) Out Pulse Low

44 KI12 Key input signal (KI12) In High High

45 KI13 Key input signal (KI13) In High High

46 RA16 Address signal of ROM (Bank2) Out High High

47 RA15 Address signal of ROM (Bank 1) Out High High

48 MD Motor drive signal of printer (MD) Out Low Low

49 DRW Drawer drive signal (DRW) Out Low Low

50 BUZ Buzzer signal (BUZZ) Out Low Low

51 FD Paper feed signal of printer (FD) Out Low Low

52 HD.A Head drive signal of printer (HD.A) Out Low Low

53 HD.B Head drive signal of printer (HD.B) Out Low Low

54 HD.C Head drive signal of printer (HD.C) Out Low Low

55 HD.D Head drive signal of printer (HD.D) Out Low Low

4-2. CPU (uPD78052GC-093-3B9)

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Pin No. Signal Description In/Out Status of

Power On Status of

Power OFF

56 HD.E Head drive signal of printer (HD.E) Out Low Low

57 HD.F Head drive signal of printer (HD.F) Out Low Low

58 HD.G Head drive signal of printer (HD.G) Out Low Low

59 HD.H Head drive signal of printer (HD.H) Out Low Low

60 RESET Reset signal (RESET) In High High

61 DP Dot pulse form printer (DP) In Low High

62 RP Reset pulse from printer (RP) In High High

63 OFF Mode key status (OFF) Out High Low

64 PWD Power down signal (PWD) In Low High

65 RB0 Address signal for RAM (Bank 0) Out High High

66 RB1 Address signal for RAM (Bank 1) Out High High

67 RB2 Address signal for RAM (Bank 2) Out High High

68 VDD VDD — 5 V 5 V

69 X2 System clock (5 MHz) In Pulse High

70 X1 System clock (5 MHz) In Pulse High

71 IC GND — GND GND

72 XT2 Sub system clock (32.768 KHz) In Pulse Pulse

73 XT1 Sub system clock (32.768 KHz) In Pulse Pulse

74 AVDD VDD — 5 V 5 V

75 AVREF0 VCC — GND GND

76 BAT Low battery signal In High High

77 VPP.S VPP detection signal (VPP.S) In Low Low

78 FB0 Address signal of Fiscal ROM bank 0 Out High High

79 FB1 Address signal of Fiscal ROM bank 1 Out High High

80 FB2 Address signal of Fiscal ROM bank 2 Out High High

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3/22/15

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— 7 —

Pin No. Signal Description In/Out Status of

Power On Status of

Power OFF

1 SW1 Not used (GND) — GND GND

2 SW2 Not used (GND) — GND GND

3 SW3 Not used (GND) — GND GND

4 SW4 Not used (GND) — GND GND

5 DOUT Data out signal to CPU Out High High

6 DIN Data in signal from CPU In Pulse High

7 VSS GND — GND GND

8 CLK Clock signal (CLK) In Pulse High

9 STB Data strobe signal (STB) In Pulse High

10 KEY1 Not used — — —

11 KEY2 Not used — — —

12 KEY3 Drawer sensor signal (DRW.S) In High High

13 KEY4 VCC — 5 V 5 V

14 VDD VCC — 5 V 5 V

15 SEG1 Display segment signal (Sa) Out Pulse Low

16 SEG2 Display segment signal (Sb) Out Pulse Low

17 SEG3 Display segment signal (Sc) Out Pulse Low

18 SEG4 Display segment signal (Sd) Out Pulse Low

19 SEG5 Display segment signal (Se) Out Pulse Low

20 SEG6 Display segment signal (Sf) Out Pulse Low

21 SEG7 Display segment signal (Sg) Out Pulse Low

22 SEG8 Display segment signal (Sdp) Out Pulse Low

23 SEG9 Display segment signal (Str) Out Pulse Low

24 SEG10 Display segment common signal (Scom) Out Pulse Low

25 SEG11 Not used Low Low

26 SEG12 Not used Low Low

27 VEE Power for display (-VN) — -32 V -32 V

28 GRD10 Display digit signal (G10) Out Pulse Low

29 GRD9 Display digit signal (G9) Out Pulse Low

30 GRD8 Display digit signal (G8) Out Pulse Low

31 GRD7 Display digit signal (G7) Out Pulse Low

32 GRD6 Display digit signal (G6) Out Pulse Low

33 GRD5 Display digit signal (G5) Out Pulse Low

34 GRD4 Display digit signal (G4) Out Pulse Low

35 GRD3 Display digit signal (G3) Out Pulse Low

36 GRD2 Display digit signal (G2) Out Pulse Low

37 GRD1 Display digit signal (G1) Out Pulse Low

38 VDD VCC — 5 V 5 V

39 LED4 Not used — Pulse Low

40 LED3 Not used — Pulse Low

41 LED2 Not used — Pulse Low

42 LED1 Not used — Pulse Low

43 VSS GND — GND GND

44 OSC System clock (500 KHz) In Pulse Pulse

4-3. Display controller (uPD16312GB-3B4)

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— 8 —

4-4. Initilize IC (Reset circuit)

VDD: Voltage of memory protection battery

To Pin No.60 of CPU

When the voltage level at Pin No.60 of CPU is not stabilized, CPU does not work properly in rare case.

Therefore, this machine uses the initialize IC for stabilizing the voltage.

Even the voltage level of VDD (Pin No.2) is changed, Pin No.1 of initilize IC outputs stabilized 5 volts.

When the VDD voltage become less than 1.9 V, the initialize IC send a reset signal to CPU.

4-5. Power down detection circuit (PWD)

To Pin No.64 of CPU

When the VP voltage become less than 4.8 V, the pin No.1 of IC5 become “Low” level.

Then,the transistor Q44 become OFF.

When Q44 become OFF, the voltage lebel of pin No.64 of CPU changes to “High” level from “Low”. Then,

CPU knows power failure.

4-6. Address latch circuit

CPU uses 8 port (AD0 ~ AD7) for address bus and

data bus.

To select the address, CPU use the IC13.

CPU send the address to IC13, and send ASTB

signal at same time.

Then, IC13 store the address and output the

address immediately.

In this way, CPU select the address and data

signal.

www.freeservicemanuals.info

3/22/15

Digitized in Heiloo, Holland.

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