NO. Pin Name Type Description
25 WL_SDIO_SPI_HSIC_S
EL Ia strapping option to select between
SDIO mode (pull low ) or SPI mode(pull
high)
26 WL_TDI I Mixed with UART_TX,
Connect as described in the JTAG
specification or NC(unconnected)
27 WL_TCK I Connect as described in the JTAG
specification or NC(unconnected)
28 WL_TMS I Connect as described in the JTAG
specification or NC(unconnected)
29 SDIO_HOST_WAKE I/O General purpose interface pin.
30 BT_REG_ON I Used by PMU (OR-gated with
WL_REG_ON) to power up or power
down internal BCM4330 regulators used
by the BT/FM section
31 WL_REG_ON I Used by PMU (OR-gated with
BT_REG_ON) to power up or power
down internal BCM4330 regulators used
by the WLAN section. This pin is also a
low-asserting reset for WLAN only
32 JTAG_SEL I JTAG selection pin.
33 VDDIO I Digital I/O supply (1.8V or 2.5V)
34 HSIC_STROBE I/O HSIC bidirectional data strobe signal
35 HSIC_DATA I/O HSIC bidirectional DDR data signal
36 GND I Ground
37 LPO_32K I Input for external low-power
32.768kHz Clock (Sleep Clock).
38 GND I Ground
39 SD_DAT0 I/O SDIO data 0. This pin has an internal
weak pull-up resistor.
40 SD_CLK I/O SDIO clock. This pin has an internal
weak pull-up resistor.
41 SD_DAT1 I/O SDIO data 1. This pin has an internal
weak pull-up resistor.
42 SD_CMD I/O SDIO command. This pin has an
internal weak pull-up resistor.
