Computex FP-40 Handbuch

On-board Flash Programmer

FP-40 Technical Information

Second Edition (Aug. 31, 2023)

Table of Contents

Document change history...................................................................................... 1

arm Cortex series (JTAG/SWD).............................................................................. 2

■Supported connectors ................................................................................................................................ 2

■Applicable products .................................................................................................................................... 2

■FP-40 usage environment check chart....................................................................................................... 3

■20-pin 2.54mm-pitch connector .................................................................................................................. 4

①SWD interface ......................................................................................................................................... 4

②JTAG interface......................................................................................................................................... 6

■20-pin 1.27mm-pitch connector .................................................................................................................. 8

③SWD interface ......................................................................................................................................... 8

④JTAG interface......................................................................................................................................... 9

■10-pin 1.27mm-pitch connector ................................................................................................................ 10

⑤SWD interface ....................................................................................................................................... 10

⑥JTAG interface + Trace.......................................................................................................................... 11

■Reference：RZ/A and RZ/T series /SRST, /TRST reference diagram ....................................................... 12

■About FP-40 unique signals ..................................................................................................................... 13

Note ............................................................................................................................................................ 13

■FP-40 target interface specifications ........................................................................................................ 14

Specifications of the target connector.............................................................................................................. 14

Dimensions of TARGET cable ......................................................................................................................... 15

Target interface voltage level........................................................................................................................... 16

Signal specifications ........................................................................................................................................ 16

UART...................................................................................................................... 18

■Target interface specifications when using UART on the FP-40 unit ........................................................ 18

Specifications of the target connector.............................................................................................................. 18

Dimensions of TARGET cable ......................................................................................................................... 19

Target interface voltage level........................................................................................................................... 19

Signal specifications ........................................................................................................................................ 19

Connection reference diagram ........................................................................................................................ 20

Note................................................................................................................................................................. 20

Common specifications for each interface......................................................... 21

■External I/O functions of FP-40 ................................................................................................................ 21

External input / output function powered by VTref (1 pin)................................................................................ 21

External input / output function using 3.3V I/F ................................................................................................. 21

EX_OK/EX33_OK............................................................................................................................................ 22

EX_STARTn/EX33_STARTn ........................................................................................................................... 23

EX_BSY/EX33_BSY........................................................................................................................................ 23

EX_NG ............................................................................................................................................................ 23

Using each signal in combination .................................................................................................................... 24

External I / O function timing with VTref (1 pin)................................................................................................ 25

External I / O function timing with 3.3V I/F....................................................................................................... 25

C-Flash Settings .............................................................................................................................................. 26

Document change history

First Edition

Jul. 1, 2023

Initial edition

Second Edition

Aug. 31, 2023

Added description of drive specs to External I/O

Technical Information on On-board Flash Programmer FP-40 Aug. 31, 2023 (Second edition)

arm Cortex series (JTAG/SWD)

This section describes the specifications for connecting a CPU with a core such as Cortex-M7 or Cortex-A9 to FP-40.

The Cortex core has a dedicated debugging function called DAP. FP-40 uses this debugging function to control the CPU

to write to flash memory. SWD or JTAG is used for communication with t h e D A P. SWD is an ARM proprietary

specification that extends JTAG and uses only the TMS and TCK signals of JTAG. Also, when using JTAG, the

TRST signal may be required, or special processing may be required to use debugging functions. Please be

sure to check the CPU manual before use. This technical document describes general interface specifications.

■Supported connectors

(For detailed dimensions of the connectors, refer to the documentations by respective manufacturers of the connectors.)

20-pin 2.54mm-pitch connector

(Top view on the target board)

Recommended connector

Manufacturer: OMRON Corporation

Model : XG4C-2031

20-pin 1.27mm-pitch connector

(Top view on the target board)

Recommended connector

Manufacturer: Samtec, Inc.

Model : FTSH-110-01-L-DV-K

10-pin 1.27mm-pitch connector

(Top view on the target board)

Recommended connector

Manufacturer: Samtec, Inc.

Model : FTSH-105-01-L-DV-K

*1: Requires a target probe "SWJ-PRB-MIL20-20HP" (Optional product).

*2: Requires a target probe "SWJ-PRB-MIL20-10HP" (Optional product).

* Before connecting, please refer the pin configuration diagram and make sure that the

connector is in the right direction and the signals and pin numbers match. In addition to our

own specifications, each company may have extended their own specifications, so be sure to

check the signal names as well. The signal may be shorted and cause a malfunction.

■Applicable products

This manual is applicable for the following products:

On-board Flash Programmer FP-40

* FP-40 is the upgraded model of FP-10/FP-10(model PS). The interface specifications are

compatible with those of FP-10/FP-10(model PS), so existing users can replace their

FP-10/FP-10(model PS) with FP-40 without modification.

Technical Information on On-board Flash Programmer FP-40 Aug. 31, 2023 (Second edition)

Check the table of connector

signals.

Also consult Target connection

reference diagram.

■FP-40 usage environment check chart

The following chart table summarizes the conditions required to connect a CPU employing a Cortex core to FP-40.

With reference to the chart below, check to see if the current environment is suitable for FP-40 use.

①SWD interface

②

JTAG interface

③SWD interface

④

JTAG interface

⑤SWD interface

⑥

JTAG interface

* If you are using a CPU that requires TRST, ⑤JTAG interface cannot be used; TRST is not

provided for SWJ-PRB-MIL20-10HP.

Type of connector mounted on

the target system

20-pin 2.54mm-pitch connector

Required optional

product

No optional product required

20-pin 1.27mm-pitch connector

SWJ-PRB-MIL20-20HP

10-pin 1.27mm-pitch connector

SWJ-PRB-MIL20-10HP

Technical Information on On-board Flash Programmer FP-40 Aug. 31, 2023 (Second edition)

■20-pin 2.54mm-pitch connector

Target connector specifications

(Top view on the target board)

Recommended connector

Manufacturer: OMRON Corporation

Model: XG4C-2031

(For detailed dimensions of the connector, refer to the documentation by manufacturer of the connector.)

*Please refer the pin configuration diagram above and make sure that the connector is in the right direction

before connecting.

Please check the pin number in the signal table above and make sure the signal and the pin numbers

match.

①SWD interface

The SWD interface signal table when connected with a 20-pin 2.54mm pitch connector is shown below.

In addition to the standard SWD signals, a power supply function and external input/output functions are supported via

Connectionthe FP-40's unique signals. When using FP-40, refer to "About FP-40 unique signals" below for connection.

Signal description

No.

SWD I/F FP-40 FP-40 unique

Specifications Connection

Signal

Input/

Output

Signal

Input/

Output

VTref

Output

VTref

Output

Connect the I/O power supply of the CPU to be connected.

2 TVDD Output X3.3V

(N.C.) Input Yes

TVDD signal is not used in FP-40.

X3.3V is a FP-40 unique signal and can be used as 3.3V

power supply function.

Please note that this signal should not be used if X5V(Pin

20) is used as the power supply.

When not used, leave as NC.

3N.C. - EX_BSY

(N.C.) Input Yes

EX_BSY is a FP-40 unique signal and outputs the operation

status from FP-40.

When not used, leave as NC.

GND

5N.C. - EX_NG

(N.C.) Input Yes

EX_NG is an FP-40 original signal and outputs the operation

status from FP-40.

When not used, leave as NC.

GND

SWDIO

Input/Output

SWDIO

Input/Output

GND

SWCLK

Input

SWCLK

Input

GND

11 N.C. - EX_STARTn

(N.C.) Output Yes

EX_STARTn is a FP-40 unique signal and can be used as a

write start request signal to FP-40.

When not used, leave as NC.

GND

SWO

Output

N.C.

Yes

NC as this signal is not used.

GND

15 SRSTn Input SRSTn Input -

Connect the reset signal to the connected CPU with a wired

OR circuit or an OR circuit. The SRSTn signal is an open

collector output.

16 GND - EX33_BSY

(N.C.) Input Yes

EX33_BSY is an FP-40 original signal and outputs the

operation status from FP-40.

When not used, leave as NC.

17 N.C. - EX_OK

(N.C.) Input Yes

EX_OK is an FP-40 original signal and outputs the operation

status from FP-40.

When not used, leave as NC.

18 GND - EX33_OK

(N.C.) Input Yes

EX33_OK is an FP-40 original signal and outputs the

operation status from FP-40.

When not used, leave as NC.

19 N.C. - EX33_STARTn

(N.C.) Output Yes

EX33_STARTn is an FP-40 original signal and can be used

as a write start request signal to FP-40.

When not used, leave as NC.

20 GND - X5V

(N.C.) Input Yes

X5V is FP-40's unique signal and can be used as 5V power

supply function.

Cannot be used with 2-pin 3.3V power supply. If not used,

leave as NC.

Do not use as a power supply function when connected to

GND.

*1: Input/output is based on the target system.

Technical Information on On-board Flash Programmer FP-40 Aug. 31, 2023 (Second edition)

Signal table

No. Signal

Input/

Output

No. Signal

Input/

Output

VTref

Output

[X3.3V] *5

Input

(EX_BSY)*2

Input

GND

(EX_NG)*2

Input

GND

7 SWDIO

Input/

Output

8 GND

SWCLK

Input

GND

(EX_STARTn)*2

Output

GND

SWO*3

Output

GND

SRSTn

Input

<EX33_BSY>*4

Input

(EX_OK) *2

Input

<EX33_OK>*4

Input

<EX33_STARTn>*4

Output

[X5V]*5

Input

*1: Input/output is denoted for the target system.

*2:External input/output function signal that will be at VTref level when high.

This signal is not connected to the target (CPU).

*3:Unused. NC.

*4:3.3V External input/output function signal. This signal is not connected to

the target (CPU).

*5: Power supply function signal.

Target connection reference diagram

To prevent malfunction, the length of wirings from the CPU to the target connector should be kept as short as possible.

If the waveform disturbance exceeds the device specifications, suppress the disturbance by inserting a damping resistor into the signal line or use

other means.

Technical Information on On-board Flash Programmer FP-40 Aug. 31, 2023 (Second edition)

②JTAG interface

The JTAG interface signal table when connected with a 20-pin 2.54mm pitch connector is shown below.

In addition to the standard JTAG signal, FP-40 provides power supply function and external input/output function by

FP-40's original signal. When using FP-40, refer to "About FP-40 unique signals" below for connection.

Signal description

No.

JTAG I/F FP-40 FP-40 unique

Specifications Connection

Signal

Input/

Output

Signal

Input/

Output

VTref

Output

VTref

Output

Connect the I/O power supply of the CPU to be connected.

2 TVDD Output X3.3V

(N.C.) InputYes

TVDD signal is not used in FP-40.

X3.3V is a FP-40 unique signal and can be used as 3.3V

power supply function.

Please note that this signal should not be used if X5V(Pin

20) is used as the power supply.

When not used, leave as NC.

3TRST/

N.C.(Cortex-M) - TRST Input -

TRST is not used with Cortex-M core CPUs. Leave as NC.

For CPUs other than Cortex-M, please refer to the

datasheet.

GND

TDI

Input

TDI

Input

GND

TMS

Input

TMS

Input

GND

TCK

Input

TCK

Input

GND

N.C.

GND

TDO

Output

TDO

Output

GND

15 SRSTn Input SRSTn Input -

Connect the reset signal to the connected CPU with a

wired OR circuit or an OR circuit. The SRSTn signal is an

open collector output.

16 GND - EX33_BSY

(N.C.) Input Yes

EX33_BSY is an FP-40 original signal and outputs the

operation status from FP-40.

When not used, leave as NC.

N.C.

18 GND - EX33_OK

(N.C.) Input Yes

EX33_OK is an FP-40 original signal and outputs the

operation status from FP-40.

When not used, leave as NC.

19 N.C. -

EX33_START

(N.C.)

Output Yes

EX33_STARTn is an FP-40 original signal and can be

used as a write start request signal to FP-40.

When not used, leave as NC.

20 GND - X5V

(N.C.) Input Yes

X5V is FP-40's unique signal and can be used as 5V

power supply function.

Cannot be used with 2-pin 3.3V power supply. If not used,

leave as NC.

Do not use as a power supply function when connected to

GND.

*1: Input/output is based on the target system.

Technical Information on On-board Flash Programmer FP-40 Aug. 31, 2023 (Second edition)

Signal table

Target connection reference diagram

No. Signal

Input/

Output

No. Signal

Input/

Output

VTref

Output

[X3.3V]

Input

TRST (N.C.)*2

Input

GND

TDI

Input

GND

TMS

Input

GND

TCK

Input

GND

N.C.*2

Output

GND

TDO

Output

GND

SRSTn

Input

<EX33_BSY>*3

Input

N.C.*2

Input

<EX33_OK>*3

Input

<EX33_STARTn>*3

Output

[X5V]*4

Input

*1: Input/output denoted is for the target system.

*2: TRST TRST is not used with Cortex-M core CPUs. Leave as NC. For other

CPUs, please refer to the datasheet of the CPU to be connected.

Please note that CPUs that require connection may require the signals to

be pulled-down.

Note that some CPUs manufactured by Renesas Electronics require some

precautions. Refer to "Reference：RZ/A and RZ/T series /SRST, /TRST

reference diagram" below.

*3: 3.3V External input/output function signal. This signal is not connected to

the target (CPU).

*4: Power supply function signal.

*5: Reserved for FP-40's own usage, leave as NC.

To prevent malfunction, the length of wirings from the CPU to the target connector should be kept as short as possible.

If the waveform disturbance exceeds the device specifications, suppress the disturbance by inserting a damping resistor into the signal line or use

other means.

Technical Information on On-board Flash Programmer FP-40 Aug. 31, 2023 (Second edition)

■20-pin 1.27mm-pitch connector

Target connector specifications

(Top view on the target board)

Recommended connector

Manufacturer: Samtec, Inc.

Model: FTSH-110-01-L-DV-K

(For detailed dimensions of the connector, refer to the documentation by manufacturer of the

connector.)

*Please refer the pin configuration diagram above and make sure that the connector is in the right direction

before connecting.

Please check the pin number in the signal table above and make sure the signal and the pin numbers

match.

This connector does not support the power supply function to the target.

③SWD interface

The signal table and target connection reference diagram when connecting a 20-pin 1.27mm pitch connector with SWD

interface are shown below.

Signal table

No. Signal

Input/

Output

No. Signal Input/

Output *1

1 VTref*2 Output 2 SWDIO

Input/

Output

GND

SWCLK

Input

GND

SWO*3

Output

Key*6

GND

SRSTn*4

Input

GND*5

TraceClk*3

Output

GND*5

TraceD0*3

Output

GND

TraceD1*3

Output

GND

TraceD2*3

Output

GND

TraceD3*3

Output

: Input/output is denoted for the target system.

: Connect the I/O power supply of the CPU to VTref.

: Unused. NC.

: Connect the reset signal to the connected CPU with a wired

OR circuit or an OR circuit. The SRSTn signal is an open

collector output.

: In some target systems, this pin may be assigned as a power

supply pin. This product is GND, so do not connect it to the

power line (or leave it unconnected).

: Intended for protection against erroneous insertion.

Target connection reference diagram

To prevent malfunction, the length of wirings from the CPU to the target connector should be kept as short as possible.

If the waveform disturbance exceeds the device specifications, suppress the disturbance by inserting a damping resistor into the signal line or use

other means.

Technical Information on On-board Flash Programmer FP-40 Aug. 31, 2023 (Second edition)

④JTAG interface

The signal table and target connection reference diagram when connecting a 20-pin 1.27mm pitch connector with JTAG

interface are shown below.

Signal table

No. Signal Input/

Output *1

No. Signal

Input/

Output

1 VTref Output 2 TMS

Input/

Output

GND

TCK

Input

GND

TDO

Output

Key*3

TDI

Input

GND

SRST*2

Input

GND

Output

GND

TRST*4

Input

GND

*1: Input/output is denoted for the target system.

*2: SRST is an open drain output signal.

Connect to the target system's "power-on reset" or "system reset"

with a wired OR circuit or, if a wired OR circuit is not possible, with

an OR circuit. VCC should be connected to a power supply

matching the circuitry of the target system at 5 V or less.

*3: Intended for protection against erroneous insertion.

*4:

TRST is not used with Cortex-M core CPUs. Leave as NC. For

other CPUs, please refer to the datasheet of the CPU to be

connected.

Please note that CPUs that require connection may require the

signals to be pulled-down.

Note that some CPUs manufactured by Renesas Electronics require

some precautions. Refer to "Reference：RZ/A and RZ/T series

/SRST, /TRST reference diagram " below.

Target connection reference diagram

To prevent malfunction, the length of wirings from the CPU to the target connector should be kept as short as possible.

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