CRZ Technology DaisyPlus Bedienungsanleitung
DaisyPlus Board User Guide
2 CRZ Technology
Document History
Revision
Date
Change note
1.0
2021.04.19
First draft
DaisyPlus Board User Guide
CRZ Technology 3
Table of Contents
1. Overview .............................................................................................................................................................................................. 4
1.1. Block Diagram ............................................................................................................................................................................................................4
1.2. Board Layout ...............................................................................................................................................................................................................5
2. LEDs and Connectors......................................................................................................................................................................... 6
2.1. Status LED .....................................................................................................................................................................................................................6
2.2. User LEDs.......................................................................................................................................................................................................................7
2.3. JTAG Connector Pinout[J7] .................................................................................................................................................................................8
2.4. uSD Card Reader[J2]...............................................................................................................................................................................................9
2.5. 2 Pin Fan connector[J1] ........................................................................................................................................................................................9
3. Operation Information .................................................................................................................................................................... 10
3.1. Mode Select DIP Switch [SW1]...................................................................................................................................................................... 10
3.2. PUSH buttons........................................................................................................................................................................................................... 11
3.3. I2C bus interfaces..................................................................................................................................................................................................12
4. Loopback board................................................................................................................................................................................ 14
4.1. NVME M.2 Loopback Card...............................................................................................................................................................................14
5. Clock system ..................................................................................................................................................................................... 15
5.1. 12-CH Clock Generator[U7].............................................................................................................................................................................15
5.2. 12-CH Clock Generator[U8].............................................................................................................................................................................16
6. MPSoC System Connections........................................................................................................................................................... 17
6.1. NOR Flash 1GBIT [U9, U10].............................................................................................................................................................................17
6.2. Dual NVME M.2 ......................................................................................................................................................................................................17
6.2.1. NVME0[J25]......................................................................................................................................................................................................17
6.2.2. NVME1[J25]......................................................................................................................................................................................................18
6.3. QSFP28 100G Ethernet ....................................................................................................................................................................................... 19
6.3.3. QSFP0 [J20]......................................................................................................................................................................................................19
6.3.4. QSFP1 [J23]......................................................................................................................................................................................................20
6.4. PS LPDDR4 [U12] ...................................................................................................................................................................................................21
6.5. PL DIMM Card Slots.............................................................................................................................................................................................26
6.5.1. DIMM0 [J8].......................................................................................................................................................................................................26
6.5.2. DIMM1 [J9].......................................................................................................................................................................................................34
6.6. PCIe x16 Endpoint [J11] .................................................................................................................................................................................... 42
6.7. 1G Ethernet PHY[U16]-Ethernet 1G[J10]................................................................................................................................................. 44
6.8. USB to Dual UART[U40] –USB Micro[J26]............................................................................................................................................. 45
6.9. NAND SO-DIMM[J28] .........................................................................................................................................................................................45
DaisyPlus Board User Guide
4 CRZ Technology
1. Overview
1.1. Block Diagram
Figure 1. High Level Block Diagram
DaisyPlus Board User Guide
CRZ Technology 5
1.2. Board Layout
Front/Top(primary) side of Board
Figure 2. DaisyPlus Physical Layout: Front, Top
DaisyPlus Board User Guide
6 CRZ Technology
2. LEDs and Connectors
2.1. Status LED
Color
Board Label
Pin Name
Pin
Device
GREEN/RED
LD3
PS_INIT_B
V27
U1
GREEN
LD4
PS_DONE
Y28
RED
ErrOut(LD1)
PS_ERR_OUT
U27
RED
ErrStatus(LD2)
PS_ERR_STATUS
V28
Table 1. MPSOC Status LED
Color
Board Label
Description
GREEN
LD5
3V3 rail power good signal
GREEN
LD6
12V available from J27 ATX connector
or J11 PCIE Host
GREEN
LD16
DDR4_VDDQ power good signal
GREEN
LD18
VCC_NAND power good signal
GREEN
LD19
VCC_NAND_IO power good signal
Table 2. Power Status LED
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CRZ Technology 7
2.2. User LEDs
There are 4 LEDs connected to PL part. All these LEDs are active High. Please refer to the following Figure and table.
-High on output = LED is ON
-Low or Tri-state = LED is OFF
Color
Board
Label
MPSOC
Description
Pin Name
Pin
RED
LED0(LD7)
B94_IO/L4_P/AD12_P
E1
User LED
RED
LED1(LD8)
B94_IO/L4_N/AD12_N
D1
User LED
RED
LED2(LD9)
B94_IO/L3_P/AD13_P
E3
User LED
RED
LED3(LD10)
B94_IO/L3_N/AD13_N
E2
User LED
Table 3. User LEDs
DaisyPlus Board User Guide
8 CRZ Technology
2.3. JTAG Connector Pinout[J7]
Figure 3. JTAG Connector[J7]
Device
Pin
Pin Name
Schematic Net Name
Pin
Device
VCC_3V3
2
J7
U1
AD26
B503_PS_JTAG_TMS
JTAG_TMS
4
AC26
B503_PS_JTAG_TCK
JTAG_TCK
6
AD27
B503_PS_JTAG_TDO
JTAG_TDO
8
AD25
B503_PS_JTAG_TDI
JTAG_TDI
10
NO CONNECT
12
U34
3
2A
PS_ARM_JTAG_SRST_B
14
GND
1
3
5
7
9
11
13
Table 4. Xilinx Config/Debug[J7] Signal Connections
DaisyPlus Board User Guide
CRZ Technology 9
2.4. uSD Card Reader[J2]
Schematic Net Name
MPSOC
Device
Pin Name
Pin
SDIO_DETECT
B501_PS_MIO45
T29
U1
SDIO_D0
B501_PS_MIO46
U28
SDIO_D1
B501_PS_MIO47
T28
SDIO_D2
B501_PS_MIO48
V30
SDIO_D3
B501_PS_MIO49
U29
SDIO_CMD
B501_PS_MIO50
V29
SDIO_CLK
B501_PS_MIO51
W30
Table 5. uSD Card Reader[J2] Signal Connections
2.5. 2 Pin Fan connector[J1]
Figure 4. DC Fan Breakout Header
DaisyPlus Board User Guide
10 CRZ Technology
3. Operation Information
3.1. Mode Select DIP Switch [SW1]
There is DIP switch to select Boot mode.
Figure 5. Mode select DIP switch
MODE
Switch
[4]
[3]
[2]
[1]
JTAG
LOW(ON)
LOW(ON)
LOW(ON)
LOW(ON)
QSPI 32
LOW(ON)
LOW(ON)
HIGH(OFF)
LOW(ON)
SD1
HIGH(OFF)
HIGH(OFF)
HIGH(OFF)
LOW(ON)
Table 6. Mode select table
Switch
MPSOC
Pin Name
Pin
1
B503_PS_MODE0
AA27
2
B503_PS_MODE1
AC28
3
B503_PS_MODE2
AA28
4
B503_PS_MODE3
AB28
Table 7. Pin assignment for Mode select DIP switch
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