Rev 0.11 Page G.703-3
Timeslot 0 of every other frame is reserved for the FAS. Alternate frames contain the FAS Distant
Alarm indication bit and others bits reserved for national and international use.
2.1.1. Multi-Frame Alignment Signal (MFAS)
MFAS framing provides Channel Associated Signaling (CAS) that transmist A/B/C/D bit signaling
information for each of 30 channels in timeslot 16. This method uses the 32 timeslot frame format
with timeslot 0 for the FAS and timeslot 16 for the MFAS and the CAS.
2.1.2. Channel Associated Signaling (CAS)
When timeslot 16 of the E1 frame is used for Channel Associated Signaling (CAS) purposes,
frame 0 contains the MFAS and timeslot 16 of frames 1-15 is used to convey the state of the
A,B,C and D signaling bits.
NOTE: The ABCD state of 0000 is not allowed. If all bits in timeslot 16 are 0, a loss of the MFAS
can be assumed. When A-Bit only signaling is used (No BCD bits), the BCD bits should be fixed
at: B=1, C=0, D=1 (101). A detection of all 1's in timeslot 16 declares a TS16AIS alarm, which
indicates a remote alarm with the upstream E1 equipment.
2.1.3. Common Channel Signaling (CCS)
When Common Channel Signaling (CCS) is employed, G.704 allows for various types of
signaling information to be carried in any timeslot, therefore timeslot 16 is available for user or
bearer data.
Common channel signaling (CCS) is signaling in which a group of voice-and-data channels share
a separate channel that is used only for control signals. This signaling protocol can be SS7,
ISDN, or PBX/Switch Proprietary protocols. The channel used for common-channel signaling
does not carry user information.
2.1.4. E1 Line Coding
The basic E1 signal is coded using the Alternate Mark Inversion (AMI) or High-Density Bipolar 3
(HDB3). In AMI coding, “ones” are alternately transmitted as positive and negative pulses,
whereas “zeros” are transmitted as a zero voltage level. AMI is not used in most E1 transmissions
because synchronization loss will occur during long strings of data zeros. In HDB3 coding, a
string of four consecutive zeros is replaced with a substitute string of pulses containing an
intentional bipolar violation. The HDB3 code substitutions provide high pulse density so that the
receiving equipment is able to maintain synchronization with the received signal.
The G5 supports two E1 link line codes:
AMI coding
HDB3 coding.
2.1.5. E1 Cyclic Redundancy Check (CRC)
The ITU standard describes an optional implementation where a 4-bit Cyclic Redundancy Check
(CRC4) can be used to provide error detection for Frames 0 through 7, and Frames 8 through 15.
When this CRC4 format is used, the even frame’s International Bit is replaced with a CRC-4 bit.
The National Bits are relabeled as spare bits.
The G5 interface allows for the CRC4 function to be Enabled or Disabled.
2.1.6. Other Interface Specifications
Balanced: 120 ohm impedance on a RJ48c
Unbalanced: 75 ohm impedance using an external 120 ohm to 75 ohm converter (i.e. Balun-B2S)
