E-RM Neoverse N1 Produkthandbuch

Arm® Neoverse™ N1 System
Development Platform
Technical Reference Manual
Copyright © 2019, 2020 Arm Limited or its affiliates. All rights reserved.
101489_0000_02_en

Arm® Neoverse™ N1 System Development Platform
Technical Reference Manual
Copyright © 2019, 2020 Arm Limited or its affiliates. All rights reserved.
Release Information
Document History
Issue Date Confidentiality Change
0000-00 01 March 2019 Confidential Alpha1 release
0000-01 17 September 2019 Non-Confidential Alpha2 release.
0000-02 06 April 2020 Non-Confidential Beta release.
Non-Confidential Proprietary Notice
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the information for the purposes of determining whether implementations infringe any third party patents.
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Copyright © 2019, 2020 Arm Limited (or its affiliates). All rights reserved.
Arm Limited. Company 02557590 registered in England.
110 Fulbourn Road, Cambridge, England CB1 9NJ.
LES-PRE-20349
Arm® Neoverse™ N1 System Development Platform
101489_0000_02_en Copyright © 2019, 2020 Arm Limited or its affiliates. All rights
reserved.
2
Non-Confidential - Beta

Confidentiality Status
This document is Non-Confidential. The right to use, copy and disclose this document may be subject to license restrictions in
accordance with the terms of the agreement entered into by Arm and the party that Arm delivered this document to.
Unrestricted Access is an Arm internal classification.
Product Status
The information in this document is for a Beta product, that is a product under development.
Web Address
www.arm.com
Conformance Notices
This section contains conformance notices.
Federal Communications Commission Notice
This device is test equipment and consequently is exempt from part 15 of the FCC Rules under section 15.103 (c).
CE Conformity
The Waste Electrical and Electronic Equipment (WEEE) marking, that is, the crossed out wheelie-bin figure, indicates that this
product must not be disposed of with general waste within the European Union. To prevent possible harm to the environment from
uncontrolled waste disposal, the user is required to recycle the product responsibly to promote reuse of material resources. To
comply with EU law, you must dispose of the product in one of the following ways:
• Return it to the distributer where it was purchased. The distributer is required to arrange free collection when requested.
• Recycle it using local WEEE recycling facilities. These facilities are now very common and might provide free collection.
• If purchased directly from Arm, Arm provides free collection. Please e-mail [email protected] for instructions.
The CE Declaration of Conformity for this product is available on request.
The system should be powered down when not in use.
It is recommended that ESD precautions be taken when handling this product.
The product generates, uses, and can radiate radio frequency energy and may cause harmful interference to radio communications.
There is no guarantee that interference will not occur in a particular installation. If this equipment causes harmful interference to
radio or television reception, which can be determined by turning the equipment off or on, you are encouraged to try to correct the
interference by one or more of the following measures:
• Ensure attached cables do not lie across any sensitive equipment.
• Reorient the receiving antenna.
• Increase the distance between the equipment and the receiver.
• Connect the equipment into an outlet on a circuit different from that to which the receiver is connected.
• Consult the dealer or an experienced radio/TV technician for help.
Note
It is recommended that wherever possible shielded interface cables be used.
Arm® Neoverse™ N1 System Development Platform
101489_0000_02_en Copyright © 2019, 2020 Arm Limited or its affiliates. All rights
reserved.
3
Non-Confidential - Beta

Contents
Arm® Neoverse™ N1 System Development Platform
Technical Reference Manual
Preface
About this book ...................................................... ...................................................... 7
Feedback .................................................................................................................... 10
Chapter 1 Introduction
1.1 Precautions .............................................................................................................. 1-12
1.2 About the N1 SDP ................................................. ................................................. 1-13
1.3 The N1 SDP at a glance .......................................................................................... 1-14
1.4 Getting started .................................................... .................................................... 1-19
1.5 Accessing the ATX power cables ............................................................................ 1-20
Chapter 2 Hardware description
2.1 N1 SDP hardware .................................................................................................... 2-22
2.2 N1 SoC .................................................................................................................... 2-25
2.3 External power .................................................... .................................................... 2-27
2.4 Clocks ...................................................................................................................... 2-28
2.5 Resets .......................................................... .......................................................... 2-35
2.6 IOFPGA ......................................................... ......................................................... 2-37
2.7 HDLCD video ..................................................... ..................................................... 2-43
2.8 PCI Express and CCIX systems .............................................................................. 2-45
2.9 Chip to Chip communications .................................................................................. 2-48
2.10 UARTs .......................................................... .......................................................... 2-51
101489_0000_02_en Copyright © 2019, 2020 Arm Limited or its affiliates. All rights
reserved.
4
Non-Confidential - Beta

2.11 LEDs, switches, and buttons ......................................... ......................................... 2-55
2.12 Debug ...................................................................................................................... 2-59
Chapter 3 Configuration
3.1 Overview of the configuration process .................................. .................................. 3-61
3.2 Powerup and powerdown sequences ...................................................................... 3-62
3.3 Configuration files .................................................................................................... 3-64
3.4 Configuration switches .............................................. .............................................. 3-68
3.5 Use of reset push buttons ........................................................................................ 3-70
3.6 Command-line interface ............................................. ............................................. 3-71
Chapter 4 Programmers model
4.1 About this programmers model ....................................... ....................................... 4-75
4.2 N1 SDP memory maps ............................................................................................ 4-76
4.3 N1 SoC interrupt maps ............................................................................................ 4-95
4.4 System Security Control registers .................................... .................................... 4-105
4.5 Serial Configuration Control registers .................................................................... 4-119
4.6 APB system registers ............................................................................................ 4-197
4.7 APB energy meter registers .................................................................................. 4-206
4.8 UART memory addresses and control registers .................................................... 4-225
Appendix A Signal descriptions
A.1 UART headers .............................................. .............................................. Appx-A-229
A.2 UART DB9 connectors ................................................................................ Appx-A-231
A.3 N1-SoC JTAG connector ...................................... ...................................... Appx-A-232
A.4 Trace connector ............................................. ............................................. Appx-A-233
A.5 Front panel I/O header ........................................ ........................................ Appx-A-235
A.6 PCI Express and CCIX slots ........................................................................ Appx-A-236
A.7 C2C connector .............................................. .............................................. Appx-A-237
A.8 Power connectors ........................................................................................ Appx-A-238
Appendix B Revisions
B.1 Revisions .................................................. .................................................. Appx-B-240
101489_0000_02_en Copyright © 2019, 2020 Arm Limited or its affiliates. All rights
reserved.
5
Non-Confidential - Beta

About this book
This book describes the Arm® Neoverse™ N1 System Development Platform.
Intended audience
This book is written for experienced hardware and software developers. It enables demonstration of
coherent traffic between the N1 SoC and an accelerator daughterboard, and PCI Express Gen 4
development.
Using this book
This book is organized into the following chapters:
Chapter 1 Introduction
This chapter introduces the Arm Neoverse N1 System Development Platform (N1 SDP).
Chapter 2 Hardware description
This chapter describes the N1 SDP hardware.
Chapter 3 Configuration
This chapter describes the powerup and configuration process of the N1 SDP.
Chapter 4 Programmers model
This chapter describes the programmers model of the N1 SDP.
Appendix A Signal descriptions
This appendix describes the signals that are present at the N1 SDP ports.
Appendix B Revisions
This appendix describes the technical changes between released issues of this book.
Glossary
The Arm® Glossary is a list of terms used in Arm documentation, together with definitions for those
terms. The Arm Glossary does not contain terms that are industry standard unless the Arm meaning
differs from the generally accepted meaning.
See the Arm® Glossary for more information.
Typographic conventions
italic
Introduces special terminology, denotes cross-references, and citations.
bold
Highlights interface elements, such as menu names. Denotes signal names. Also used for terms
in descriptive lists, where appropriate.
monospace
Denotes text that you can enter at the keyboard, such as commands, file and program names,
and source code.
monospace
Denotes a permitted abbreviation for a command or option. You can enter the underlined text
instead of the full command or option name.
monospace italic
Denotes arguments to monospace text where the argument is to be replaced by a specific value.
monospace bold
Denotes language keywords when used outside example code.
Preface
About this book
101489_0000_02_en Copyright © 2019, 2020 Arm Limited or its affiliates. All rights
reserved.
7
Non-Confidential - Beta

<and>
Encloses replaceable terms for assembler syntax where they appear in code or code fragments.
For example:
MRC p15, 0, <Rd>, <CRn>, <CRm>, <Opcode_2>
SMALL CAPITALS
Used in body text for a few terms that have specific technical meanings, that are defined in the
Arm® Glossary. For example, IMPLEMENTATION DEFINED, IMPLEMENTATION SPECIFIC, UNKNOWN, and
UNPREDICTABLE.
Timing diagrams
The following figure explains the components used in timing diagrams. Variations, when they occur,
have clear labels. You must not assume any timing information that is not explicit in the diagrams.
Shaded bus and signal areas are undefined, so the bus or signal can assume any value within the shaded
area at that time. The actual level is unimportant and does not affect normal operation.
Clock
HIGH to LOW
Transient
HIGH/LOW to HIGH
Bus stable
Bus to high impedance
Bus change
High impedance to stable bus
Figure 1 Key to timing diagram conventions
Signals
The signal conventions are:
Signal level
The level of an asserted signal depends on whether the signal is active-HIGH or active-LOW.
Asserted means:
• HIGH for active-HIGH signals.
• LOW for active-LOW signals.
Lowercase n
At the start or end of a signal name, n denotes an active-LOW signal.
Additional reading
This book contains information that is specific to this product. See the following documents for other
relevant information.
Preface
About this book
101489_0000_02_en Copyright © 2019, 2020 Arm Limited or its affiliates. All rights
reserved.
8
Non-Confidential - Beta

Arm publications
•Arm® Neoverse™ N1 Core Technical Reference Manual (100616).
•Arm® CoreLink™ DMC
‑
620 Dynamic Memory Controller Technical Reference Manual
(100568).
•Arm® CoreLink™ MMU
‑
600 System Memory Management Unit Technical Reference Manual
(100310).
•Arm® CoreLink™ NIC
‑
400 Network Interconnect Technical Reference Manual (DDI 0475).
•Arm® CoreLink™ CMN
‑
600 Coherent Mesh Network Technical Reference Manual (100180).
•Arm® CoreLink™ TLX
‑
400 Network Interconnect Thin Links Supplement to Arm® CoreLink™
NIC
‑
400 Network Interconnect Technical Reference Manual (DSU 0028).
•Arm® CoreLink™ GIC
‑
600 Generic Interrupt Controller Technical Reference Manual
(100336).
•Arm® CoreLink™ GIC
‑
400 Generic Interrupt Controller Technical Reference Manual
(DDI 0471).
•Arm® Cortex®
‑
M7 Processor Technical Reference Manual (DDI 0489).
•Arm® PrimeCell UART(PL011) Technical Reference Manual (DDI 0183).
•Arm® PrimeCell General Purpose Input/Output (PL061) Technical Reference Manual
(DDI 0190).
•Arm® PrimeCell Real Time Clock (PL031) Technical Reference Manual (DDI 0224).
•Arm® Dual
‑
Timer (SP804) Technical Reference Manual (DDI 0271).
•Arm® Watchdog Module (SP805) Technical Reference Manual (DDI 0270).
•Arm® PrimeCell System Controller SP810 Technical Reference Manual (DDI 0254)
•Arm® CoreSight™ Components Technical Reference Manual (DDI 0314).
•Arm® DS
‑
5 Getting Started Guide (100950).
•Arm® DS
‑
5 Arm DSTREAM User Guide (100955).
•Arm® DS
‑
5 Debugger User Guide (100953).
The following book is only available to licensees or requires registration with Arm.
•Arm® DynamIQ™ Shared Unit Technical Reference Manual (100453).
Preface
About this book
101489_0000_02_en Copyright © 2019, 2020 Arm Limited or its affiliates. All rights
reserved.
9
Non-Confidential - Beta

Feedback
Feedback on this product
If you have any comments or suggestions about this product, contact your supplier and give:
• The product name.
• The product revision or version.
• An explanation with as much information as you can provide. Include symptoms and diagnostic
procedures if appropriate.
Feedback on content
If you have comments on content then send an e-mail to [email protected]. Give:
• The title Arm Neoverse N1 System Development Platform Technical Reference Manual.
• The number 101489_0000_02_en.
• If applicable, the page number(s) to which your comments refer.
• A concise explanation of your comments.
Arm also welcomes general suggestions for additions and improvements.
Note
Arm tests the PDF only in Adobe Acrobat and Acrobat Reader, and cannot guarantee the quality of the
represented document when used with any other PDF reader.
Preface
Feedback
101489_0000_02_en Copyright © 2019, 2020 Arm Limited or its affiliates. All rights
reserved.
10
Non-Confidential - Beta
Inhaltsverzeichnis
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