Espressif Systems ESP32-PICO-V3-ZERO Bedienungsanleitung

ESP32-PICO-V3-ZERO

User Manual

Version 1.0

Espressif Systems

www.espressif.com

About This Document

This document provides the specifications for the ESP32-PICO-V3-ZERO module.

Document Updates

Please always refer to the latest version on https://www.espressif.com/en/support/download/documents.

Revision History

For revision history of this document, please refer to the last page.

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Certification

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Disclaimer and Copyright Notice

Information in this document, including URL references, is subject to change without notice. THIS DOCUMENT IS

PROVIDED AS IS WITH NO WARRANTIES WHATSOEVER, INCLUDING ANY WARRANTY OF MERCHANTABIL-

ITY, NON-INFRINGEMENT, FITNESS FOR ANY PARTICULAR PURPOSE, OR ANY WARRANTY OTHERWISE

ARISING OUT OF ANY PROPOSAL, SPECIFICATION OR SAMPLE.

All liability, including liability for infringement of any proprietary rights, relating to use of information in this docu-

ment is disclaimed. No licenses express or implied, by estoppel or otherwise, to any intellectual property rights

are granted herein. The Wi-Fi Alliance Member logo is a trademark of the Wi-Fi Alliance. The Bluetooth logo is a

registered trademark of Bluetooth SIG.

All trade names, trademarks and registered trademarks mentioned in this document are property of their respective

owners, and are hereby acknowledged.

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1. Module Overview

1.1 Features

MCU

• ESP32 embedded, Xtensa®dual-core 32-bit LX6

microprocessor, up to 240 MHz

• 448 KB ROM for booting and core functions

• 520 KB SRAM for data and instructions

• 16 KB SRAM in RTC

Wi-Fi

• 802.11b/g/n20/n40

• Bit rate: 802.11n up to 150 Mbps

• A-MPDU and A-MSDU aggregation

• 0.4 µs guard interval support

•Center frequency range of operating channel:

2412 ~ 2462 MHz

Bluetooth®

• Bluetooth V4.2 BR/EDR and Bluetooth LE speci-

fication

• NZIF receiver with –97 dBm sensitivity

• Class-1, class-2 and class-3 transmitter

• AFH

• CVSD and SBC

Hardware

• Interfaces: 3 × UART, I2C, I2S, SPI, SDIO, touch

pin, EN pin, interrupt pin and other GPIOs

• 40 MHz crystal oscillator

• 4 MB SPI flash

• Operating voltage/Power supply: 3.0 ~3.6 V

• Operating temperature range: –40 ~85 °C

• Dimensions: (16 × 23 × 2.3) mm

Certification

• Bluetooth certification: BQB

• RF certification: FCC/CE-RED/SRRC/IC

• Green certification: REACH/RoHS

1.2 Description

The ESP32-PICO-V3-ZERO is a module that is based on ESP32-PICO-V3, a System-in-Package (SiP) device. It

provides complete Wi-Fi and Bluetooth®functionalities. The module integrates a 4 MB SPI flash.

At the core of this module is the ESP32 chip, which is a single 2.4 GHz Wi-Fi and Bluetooth combo chip designed

with TSMC’s 40 nm low-power technology. ESP32-PICO-V3-ZERO integrates all peripheral components seam-

lessly, including a crystal oscillator, flash, filter capacitors and RF matching links in one single package. Module

assembly and testing are already done at SiP level. As such, ESP32-PICO-V3-ZERO reduces the complexity of

supply chain and improves control efficiency.

With its ultra-small size, robust performance and low-energy consumption, ESP32-PICO-V3-ZERO is well suited

for any space-limited or battery-operated applications, such as wearable electronics, medical equipment, sensors

and other IoT products.

Note:

•For more information on ESP32, please refer to ESP32 User Manual.

•For more information on ESP32-PICO-V3, please refer to ESP32-PICO-V3 User Manual.

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1. Module Overview

1.3 Applications

• Generic Low-power IoT Sensor Hub

• Generic Low-power IoT Data Loggers

• Cameras for Video Streaming

• Over-the-top (OTT) Devices

• Speech Recognition

• Image Recognition

• Mesh Network

• Home Automation

• Smart Building

• Industrial Automation

• Smart Agriculture

• Audio Applications

• Health Care Applications

• Wi-Fi-enabled Toys

• Wearable Electronics

• Retail & Catering Applications

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3. Pin Definitions

2. Pin Definitions

2.1 Pin Layout

Pin 1

Pin 2

Pin 3

Pin 4

Pin 5

Pin 6

Pin 7

Pin 8

Pin 9

Pin 10

Pin 11

Pin 12

Pin 13

Pin 14

Pin 15

Pin 16

Pin 48

Pin 47

Pin 46

Pin 45

Pin 44

Pin 43

Pin 42

Pin 41

Pin 40

Pin 39

Pin 38

Pin 37

Pin 36

Pin 35

Pin 34

Pin 33

Pin 64

Pin 63

Pin 62

Pin 61

Pin 60

Pin 59

Pin 58

Pin 57

Pin 56

Pin 55

Pin 54

Pin 53

Pin 52

Pin 51

Pin 50

Pin 49

Pin 17

Pin 18

Pin 19

Pin 20

Pin 21

Pin 22

Pin 23

Pin 25

Pin 26

Pin 27

Pin 28

Pin 29

Pin 30

Pin 32

Pin 66

GND

Pin 67

GND

Pin 65

GND

Pin 68

GND

Pin 75

GND

Pin 72

GND

Pin 69

GND

Pin 70

GND

Pin 71

GND

Pin 73

GND

Pin 74

GND

Pin 77

GND

Pin 76

GND

I34

I35

DBG_RXD/IO3

DBG_TXD/IO1

IO32

IO33

IO25

IO26

MTMS/IO14

MTDI/IO12

MTCK/IO13

GND

MTDO/IO15

BOOT/IO0

IO4

IO2

IO5

IO20

VDD33

GND

I38

INT_B/IO27

I39

U1RXD/IO22

GND

VDD33

GND

U1TXD/IO19

IO21

I37

I36

GND

IO8

IO7

IO10

IO9

GND

Pin 31

Pin 24

GND

Antenna area

Figure 1: Pin Layout of ESP32-PICO-V3-ZERO (Top View)

Note:

The pin diagram shows the approximate location of pins on the module. For the actual mechanical diagram, please refer

to Figure 7Physical Dimensions.

2.2 Pin Description

The ESP32-PICO-V3-ZERO module has 77 pins. See pin definitions in Table 1.

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2.Pin Definitions

Table 1: Pin Definitions

Name No. Type Function

I34 1 I GPIO34

I35 2 I GPIO35

DBG_RXD/IO3 3 I/O GPIO3, Debugging UART RX

DBG_TXD/IO0 4 I/O GPIO1, Debugging UART TX

IO32 5 I/O GPIO32

IO33 6 I/O GPIO33

IO25 7 I/O GPIO25

IO26 8 I/O GPIO26

MTMS/IO14 9 I/O GPIO14, MTMS

MTDI/IO12 10 I/O GPIO12, MTDI

MTCK/IO13 11 I/O GPIO13, MTCK

MTDO/IO15 13 I/O GPIO15, MTDO

BOOT/IO0 14 I/O GPIO0

IO4 15 I/O GPIO4

IO2 16 I/O GPIO2

IO5 17 I/O GPIO5

IO20 18 I/O GPIO20. See note 1 under the table.

EN 19 I

High: On; enables the module

Low: Off; the module powers off

Note: Do not leave this pin floating.

VDD33 22 P Power supply (3.0 V ~3.6 V)

IO9 33 I/O GPIO9. See note 1 under the table.

IO10 34 I/O GPIO10. See note 1 under the table.

IO7 35 I/O GPIO7. See note 1 under the table.

IO8 36 I/O GPIO8. See note 1 under the table.

I36 38 I GPIO36

I37 39 I GPIO37

IO21 40 I/O GPIO21

U1TXD/IO19 41 O UART TX, connected to host RX, GPIO19

VDD33 43 P Power supply (3.0 V ~3.6 V)

U1RXD/IO22 45 I UART RX, connected to host TX, GPIO22

I39 46 I GPIO39

INT_B/IO27 47 O Host interrupt, connected to host GPIO, GPIO27

I38 48 I GPIO38

GND 12, 20, 21, 23 ~32,

37, 42, 44, 49 ~77 P Ground

Note:

1. IO7/IO8/IO9/IO10/IO20 belong to VDD_SDIO power domain and cannot work when VDD_SDIO power shuts down.

2. For peripheral pin configurations, please refer to ESP32User Manual.

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2.Pin Definitions

2.3 Strapping Pins

ESP32 has five strapping pins: MTDI, GPIO0, GPIO2, MTDO, GPIO5. The pin-pin mapping between ESP32 and

the module is as follows, which can be seen in Chapter 5 Schematics:

• MTDI = IO12

• GPIO0 = BOOT/IO0

• GPIO2 = IO2

• MTDO = IO15

• GPIO5 = IO5

Software can read the values of these five bits from register ”GPIO_STRAPPING”.

During the chip’s system reset release (power-on-reset, RTC watchdog reset and brownout reset), the latches

of the strapping pins sample the voltage level as strapping bits of ”0” or ”1”, and hold these bits until the chip

is powered down or shut down. The strapping bits configure the device’s boot mode, the operating voltage of

VDD_SDIO and other initial system settings.

Each strapping pin is connected to its internal pull-up/pull-down during the chip reset. Consequently, if a strapping

pin is unconnected or the connected external circuit is high-impedance, the internal weak pull-up/pull-down will

determine the default input level of the strapping pins.

To change the strapping bit values, users can apply the external pull-down/pull-up resistances, or use the host

MCU’s GPIOs to control the voltage level of these pins when powering on ESP32.

After reset release, the strapping pins work as normal-function pins.

Refer to Table 2for a detailed boot-mode configuration by strapping pins.

Table 2: Strapping Pins

Voltage of Internal LDO (VDD_SDIO)

Pin Default 3.3 V 1.8 V

MTDI Pull-down 0 1

Booting Mode

Pin Default SPI Boot Download Boot

GPIO0 Pull-up 1 0

GPIO2 Pull-down Don’t-care 0

Enabling/Disabling Debugging Log Print over U0TXD During Booting

Pin Default U0TXD Active U0TXD Silent

MTDO Pull-up 1 0

Timing of SDIO Slave

Pin Default

FE Sampling

FE Output

FE Sampling

RE Output

RE Sampling

FE Output

RE Sampling

RE Output

MTDO Pull-up 0 0 1 1

GPIO5 Pull-up 0 1 0 1

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2.Pin Definitions

Note:

• FE: falling-edge, RE: rising-edge.

• Firmware can configure register bits to change the settings of ”Voltage of Internal LDO (VDD_SDIO)” and ”Timing

of SDIO Slave”, after booting.

• The operating voltage of ESP32-PICO-V3-ZERO’s integrated external SPI flash is 3.3 V. Therefore, the strapping

pin MTDI should hold bit ”0” during the module power-on reset.

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3.Electrical Characteristics

3. Electrical Characteristics

3.1 Absolute Maximum Ratings

Stresses beyond the absolute maximum ratings listed in the table below may cause permanent damage to the

device. These are stress ratings only, and do not refer to the functional operation of the device that should follow

the recommended operating conditions.

Table 3: Absolute Maximum Ratings

Symbol Parameter Min Max Unit

VDD33 Power supply voltage 3.0 3.6 V

TST ORE Storage temperature –40 85 °C

Note:

Please see Appendix IO_MUX of ESP32 User Manual for IO’s power domain.

3.2 Recommended Operating Conditions

Table 4: Recommended Operating Conditions

Symbol Parameter Min Typ Max Unit

VDD33 Power supply voltage 3.0 3.3 3.6 V

IV DD Current delivered by external power supply 0.5 — — A

T Operating temperature –40 — 85 °C

Humidity Humidity condition — 85 — %RH

3.3 DC Characteristics (3.3 V, 25 °C)

Table 5: DC Characteristics (3.3 V, 25 °C)

Symbol Parameter Min Typ Max Unit

CIN Pin capacitance - 2 - pF

VIH High-level input voltage 0.75×VDD1- VDD1+0.3 V

VIL Low-level input voltage –0.3 - 0.25×VDD1V

IIH High-level input current - - 50 nA

IIL Low-level input current - - 50 nA

VOH High-level output voltage 0.8×VDD1- - V

VOL Low-level output voltage - - 0.1×VDD1V

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4. Electrical Characteristics

Symbol Parameter Min Typ Max Unit

IOH

High-level source current

(VDD1= 3.3 V,

VOH >= 2.64 V,

output drive strength set

to the maximum)

VDD3P3_CPU

power domain 1,2- 40 - mA

VDD3P3_RTC

power domain 1,2- 40 - mA

VDD_SDIO power

domain 1,3- 20 - mA

IOL

Low-level sink current

(VDD1= 3.3 V, VOL = 0.495 V,

output drive strength set to the maximum)

- 28 - mA

RP U Resistance of internal pull-up resistor - 45 - kΩ

RP D Resistance of internal pull-down resistor - 45 - kΩ

VIL_nRST

Low-level input voltage of CHIP_PU

to power off the chip - - 0.6 V

Note:

1. Please see Appendix IO_MUX of ESP32 User Manual for IO’s power domain. VDD is the I/O voltage for a

particular power domain of pins.

2. For VDD3P3_CPU and VDD3P3_RTC power domain, per-pin current sourced in the same domain is gradually

reduced from around 40 mA to around 29 mA, VOH >=2.64 V, as the number of current-source pins increases.

3. Pins occupied by flash and/or PSRAM in the VDD_SDIO power domain were excluded from the test.

3.4 Current Consumption Characteristics

With the use of advanced power-management technologies, ESP32 can switch between different power modes. For

details on different power modes, please refer to Section RTC and Low-Power Management in ESP32 User Manual.

Table 6: Current Consumption Depending on RF Modes

Work mode Description Average (mA) Peak (mA)

Active (RF working)

802.11b, 20 MHz, 1 Mbps 233 368

802.11g, 20 MHz, 54 Mbps 181 258

802.11n, 20 MHz, MCS7 178 248

802.11n, 40 MHz, MCS7 162 205

RX 802.11b/g/n, 20 MHz 110 111

802.11n, 40 MHz 116 117

Note:

• The current consumption measurements are taken with a 3.3 V supply at 25 °C of ambient temperature at the RF

port. All transmitters’ measurements are based on a 50% duty cycle.

• The current consumption figures for in RX mode are for cases when the peripherals are disabled and the CPU idle.

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