Fujitsu MB1500EB01 Bedienungsanleitung

l2012.Apr.Rev6.0

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-MB1500EB01-

-MB1500EB01

l2012.Apr.Rev6.0

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Table of Contents

1.0 General Description ---------------3

2.0 Design kit content ---------------3

3.0 Setup ---------------3

4.0 Device information ---------------4

5.0 Evaluation board description ---------------5

5.1.Board circuit ---------------5

5.2.Board layout ---------------6

5.3.Components list ---------------7

6.0 Typical Test Data ---------------8

6.1.Measurement condition ---------------8

6.2.Measurement results ---------------8

6.3.Measurement wave form ---------------9

Phase Noise ---------------9

Spurious ---------------9

Lock up time ---------------10

7.0 Additional information ---------------11

Option1 MB1500EB00A ---------------11

l2012.Apr.Rev6.0

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General Description

The MB1500EB01 and MB1500EB01Q are the evaluation board for MB15E0xSL and MB15E0xSR.

The difference of the evaluation board part number is the package type. MB1500EB01 is for TSSOP

or SSOP package. MB1500EB01Q is for QFN package. You can evaluate almost performance for

PLL with the evaluation board. (MB1500EB01Q for MB15E03/E07SL only)

When evaluating MB15E0xSL and MB15E0xSR, you can measure the RF loop characteristics by

putting the VCO and the LPF components.

Each output pad for RF VCO output and the external input for REF, CLK, Data, LE are prepared on

the board. Thus it is easy to connect their input/output. VCO and loop filter are not help you on the

board, so you can mount whatever you want.

Regarding CLK, Data and LE input, Fujitsu prepares the software and the cable or the interface board.

This set (Soft ware&Cable) control the data on a PC easily. (The part number of the cable is

MB1500EB00A. The interface board is MB1500EB00)

The socket for IC is set on the board, by which you can try evaluating many samples.

1.0 Design Kit

The design kit includes the following items.

-Evaluation board with the socket for QFN package or SSOP package.

-Evaluation board manual

3.0 Set up

1.VCO and Loop filter

The VCO and LPF are not mounted on the board, so you mount them on the board.

2.REFin

Connect a signal generator or TCXO to the REF pad. If the TCXO module is used, remove the

51ohm resistor.

3.VCO output

Connect RFVCO output pad to the spectrum analyzer or the modulation domain analyzer.

*SMA connector is not mounted on RF VCO output pad.

4.CLK, Data, LE

Connect the output pin of printer port or the special cable through a PC to the pins of CLK,

Data and LE.

Fujitsu prepare the special cable for the Fujitsu’s software of writing data.

The part number is MB1500EB00A. If you need it, please contact the sales.

5.Vcc and Vp

Connect a DC power supply output to the Vcc and Vp pins.

Vcc and Vp must supply equal voltage. Even if either RF-PLLor IF-PLLis not used, power must

be supplied to both VccRF and Vp To keep them equal, it is recommended that the non-use PLLis

controlled by power saving function.

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6.PLLIC

The socket is attached on the board. It helps you to measure many PLL samples.

7.Power saving switch

There is a switch to control of power saving mode on the board for SSOP package. You can switch

the power saving mode and the normal mode. Regarding the board for QFN package, there is no switch

for controlling Power saving. Please TP3 shorts to VCC or GND to operate PLL.

4.0 Device (PLLIC) information

The evaluation board, MB1500EB01 can evaluate the following devices.

P/N Data sheet number Function Feature

Japanese English

MB15E03SL DS04-21359-4 DS04-21359-5E 1.2G Integer Single PLL Low current

MB15E05SL DS04-21360-4 DS04-21360-5E 2.0G Integer Single PLL Low current

MB15E07SL DS04-21358-4 DS04-21358-5E 2.5G Integer Single PLL Low current

MB15E05SR DS04-21377-1 DS04-21377-2E 2.0G Integer Single PLL Low noise

MB15E06SR DS04-21379-1 DS04-21379-2E 3.0G Integer Single PLL Low noise

MB15E07SR DS04-21378-1 DS04-21378-3E 2.5G Integer Single PLL Low noise

You can down load the data sheet on the web site.

Fujitsu Electrical Device Group web: http://jp.fujitsu.com/fsl/

*The datasheet is not available for QFN version yet(MB15E03SL).

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5.0 Evaluation board description

5.1.Board circuit

MB1500EB01 (SSOP package)

MB1500EB01Q (QFN package)

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5.2.Board layout

MB1500EB01(SSOP package)

Top layer Bottom layer

MB1500EB01B(QFN package) MB15E07SL,MB15E03SL only

Top layer Bottom layer

DATA

CLK

LD/fout

1pin

Vcc

OSCin

Vvco

VCO LPF

fin

Data

Clock

OSCin

fin

ΦR ΦP

LPF area

CO area

OSCout

Vvco

Vcc

GND

Please connect between Do and LPF line.

ZC PS-Low

PS-High

l2012.Apr.Rev6.0

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Item P/N Description TP　name Item P/N Description TP　name

R0 ---- ---- C12 GRM188B11H102KA01D 1000pF

R1 MCR03EZHJ510 51ΩC27 GRM188B11H102KA01D 1000pF

R2 ---- ---- C28 GRM188B11H102KA01D 1000pF

R3 ---- ---- C29 ---- ----

R5 MCR03EZHJ180 18ΩC30 ---- ----

R6 MCR03EZHJ180 18ΩC31 ---- ----

R7 MCR03EZHJ180 18ΩC11A GRM188B11H102KA01D 1000pF

R8 0ΩC25A GRM188B11H102KA01D 1000pF

R9 ---- ---- C26A GRM188B11H102KA01D 1000pF

R10 0ΩC11B SVC1E106M 10uF/25V

R11 ---- ---- C25B SVC1E106M 10uF/25V

R12 0ΩC26B SVC1E106M 10uF/25V

R13 ---- ---- CN1 5045-03A connector

TP1 LC-22-G TP V VCO VCO

TP2 LC-2-G TP GND SMA1 TSSM-LR-PC

TP3 LC-22-G TP PS SMA2 TSSM-LR-PC

TP4 LC-22-G TP LD/fout SW0 G-13AP SW

TP5 LC-2-G TP GND SW1 G-13AP SW

TP6 LC-2-G TP φP

TP7 LC-2-G TP φR

TP8 LC-22-G TP OSCout

TP9 LC-22-G TP VP

TP10 LC-22-G TP VCC

TP11 LC-2-G TP GND

TP12 LC-22-G TP VCO SW

TP13 LC-22-G TP Do

5.2.Components list MB1500EB01(SSOP)

Item P/N Description

1 C1,C4,C5 MCH185C102K(ROHM) Cap.1000pF

2 C2,C3,C9 MSVC1C106M(NEC)

MCH185C102K(ROHM)

Cap.10uF

Cap.1000pF

3 R1 MCR03EZHJ510(ROHM) Res.51Ω

4 R2,R3,R4 MCR03EZHJ180(ROHM) Res.18Ω

5 SW1 G-13AP -

6 SMA1 REF input Open

7 SMA2 VCO output Open

7 TP1,TP2,TP3,TP4,TP5,TP6 LC-2-G -

8 U1 PLL IC Open

10 U2 RFVCO Open

12 R5,R6,C6,C7,C8 LPF Open

Components list MB1500EB01Q(QFN)

Note: Please note the following in case of using MB1500EB01Q.

-R1 with 51ohm is mounted on the board for connecting a signal generator instead of crystal oscillator.

If crystal oscillator is used, please remove R1.

-SW0 is to monitor Do waveform. If the closed loop with VCO is constructed, please connect between

Do and LPF line.

-SW1 is no mounted. If no high impedance mode is needed, please open.

l2012.Apr.Rev6.0

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6.0.Typical Test Data(Ex.MB15E07SR)

6.1Measurement Condition

The data is measured under GSM application using MB15E07SR which has the feature of low noise.

Power supply voltage: :Vcc=Vp=3.75V

Oscillator frequency: :fosc=13MHz

Charge pump current: :ICP=1.5mA

Comparison frequency: :fr=200kHz

VCO frequency: :fvco=1730MHz to 1805MHz

VCO gain :42MHz/V(Vvco=3.3V)

RF Loop filter

C6 C7 C8 R5 R6

CDMA 1000pF 0.015uF 120pF 2.7kΩ27kΩ

*The number of the components is based on the description in 5.0.

6.2 Typical Measurement Results

Parameter Measurement Condition

Lock up time 390us 1730MHz to 1805 MHz +/-1kHz

370us 1805MHz to 1730MHz +/-1kHz

Phase Noise -86.5dBc/Hz Offset 1kHz @1730MHz

Spurious -80.5dBc Offset 200kHz @1730MHz

Do VT(to VCO)

R5

R6

C8

l2012.Apr.Rev6.0

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6.3 Measurement wave form

Phase Noise

Spurious

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Lock up time

1730MHz -> 1805MHz,within +/-1kHz

Lch ->Hch 390 us Hch ->Lch 375 us

1805MHz -> 1730MHz

within +

-1kHz

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