GOWIN RISCV Bedienungsanleitung

Gowin FPGA Development Board RISCV

Programming

Quick Start Guide

IPUG546-1.1E,11/11/2022

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Revision History

Date

Version

Description

04/29/2019

1.0E

Initial version published.

11/11/2022

1.1E

AndeSight RDS v311 software updated.

Reference design updated.

The description of downloading embedded project compilation

results via SPI Flash updated.

Contents

IPUG546-1.1E

Contents

Contents...............................................................................................................i

List of Figures.....................................................................................................ii

List of Tables......................................................................................................iii

1 Introduction......................................................................................................1

1.1 AE250 Introduction .............................................................................................................1

1.2 Preparations ....................................................................................................................... 2

1.3 Developing and Debugging Steps ......................................................................................3

2 Debug Cable Connection Instructions...........................................................4

3 Use Instructions for RDS ................................................................................6

3.1 RDS Installation .................................................................................................................. 6

3.2 Create a New Project..........................................................................................................6

3.3 Import and Export a Project................................................................................................8

3.4 Download Programs to Flash .............................................................................................9

3.5 On-chip Debug..................................................................................................................12

3.6 RDS Built-in Serial Terminal Usage..................................................................................14

4 Reference Design ..........................................................................................16

4.1 Project Code .....................................................................................................................16

4.2 Reference Design .............................................................................................................17

List of Figures

IPUG546-1.1E

List of Figures

Figure 1-1 AE250 Structure Diagram ........................................................................................1

Figure 1-2 Development and Debugging System Structure Diagram....................................... 2

Figure 2-1 AICE-MINI+ Debug Cable and its Pins ....................................................................4

Figure 3-1 Create a New Project............................................................................................... 7

Figure 3-2 Import/Export a Project ............................................................................................ 8

Figure 3-3 Import a Project........................................................................................................ 8

Figure 3-4 Export a Project .......................................................................................................9

Figure 3-5 System Reset Vector Default...................................................................................10

Figure 3-6 SPI1 Configuration................................................................................................... 10

Figure 3-7 Set MSPI Interface to Regular IO ............................................................................11

Figure 3-8 ae250.sag bootloader Parameters Setting .............................................................. 12

Figure 3-9 Debug Configurations .............................................................................................. 13

Figure 3-10 Debug Introduction ................................................................................................ 14

Figure 3-11 Assembly Instruction Code Window....................................................................... 14

Figure 3-12 RDS Built-in Serial Terminal ..................................................................................15

List of Tables

IPUG546-1.1E

iii

List of Tables

Table 2-1 AICE-MINI+ Debug Cable Pin Definition ................................................................... 5

Table 3-1 SPI1 Interface Physical Constraints ..........................................................................11

1 Introduction

1.1 AE250 Introduction

IPUG546-1.1E

1(17)

1Introduction

1.1 AE250 Introduction

AE250 is a 32-bit RISC-V MCU system; its structure is shown in Figure

1-1.

Figure 1-1 AE250 Structure Diagram

Based on Gowin FPGA development board, the RISC-V AE250 MCU

development and debugging system is shown in Figure 1-2.

1 Introduction

1.2 Preparations

IPUG546-1.1E

2(17)

Figure 1-2 Development and Debugging System Structure Diagram

FPGA Chip

AE250 MCU

Debug

Subsys

tem

ILM

AndeSight RDS

Debug

Gowin Programmer

Gowin FPGA Dev Board

Debug

Cable Virtual Hosting

SPI Flash

part 1

SPI Flash

part 2

UART

Terminal

Peripherals

Download

The FPGA chip on the development board is configured as an AE250

MCU using Gowin Programmer in PC, after the Debug Cable is connected,

you can perform the embedded program development and debugging with

AndeSight RDS v311 software.

1.2 Preparations

Before using Gowin FPGA and AE250 for development and debugging,

the following tools need to be prepared:

1. Gowin GW2A series of FPGA development board.

2. Gowin Software installation package for configuring and downloading

the FPGA chip.

3. AndeSight RDS v311 installation package for developing and

debugging the embedded program.

4. Debug Cable is used for downloading and debugging the embedded

program, and the default is AICE-MINI+; users need to purchase it by

themselves.

Note！

If it needs to output information through UART, a UART to USB cable is needed.

Other peripherals to be used are required.

1 Introduction

1.3 Developing and Debugging Steps

IPUG546-1.1E

3(17)

1.3 Developing and Debugging Steps

The basic steps for developing and debugging RISC-V AE250 MCU

based on the GW2A-55C development board are as follows:

1. Install softwares: Gowin Software is used to configure and generate

AE250 RTL design and generate the Bitstream file of the design;

AndeSight RDS v311 software is used to develop and debug

embedded programs; other softwares and drivers for debugging are

also required.

2. Configure the power supply and download cable of the development

board. The Bitstream file of AE250_chip is downloaded to the FPGA

chip on the development board using Gowin Programmer, and AE250

is running on the development board.

3. Open RDS software to create a new embedded project or open an

existing project for encoding, compiling and other operations. Connect

the Debug Cable used for AE250 debugging, download the project

compilation result to the instruction memory (ILM) in AE250, and start

debugging on the chip.

4. During debugging, you can use UART to USB cable to connect the

UART interface of AE250 to PC, use the built-in serial terminal in RDS

to operate the input and output operations. You can use GPIO to

connect to LED indicators, keys, or external pins for input/output

operations; I2C, SPI, Ethernet, and other peripherals can also be

selected to use.

5. AE250 can connect to a Flash via SPI, download the compilation result

of embedded program to Flash using Gowin Programmer; when the

chip is powered on, AE250 will automatically read the embedded

program in SPI Flash and start. You can reuse the Flash that saves the

FPGA Bitstream; some can save the FPGA bitstream, and others can

save the compilation results of embedded programs. This is a practical

and economical method.

You can see chapter 2 Debug Cable Connection Instructions, chapter

3 Use Instructions for RDS, and chapter 4 Reference Design for detailed

steps.

2 Debug Cable Connection Instructions

IPUG546-1.1E

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2Debug Cable Connection Instructions

RDS + AE250 use AICE-MINI+ debug cable by default; the exterior is

shown at left in Figure 2-1, and the pins are shown at right in Figure 2-1. It

is a 12-pin interface. It is should be noted that pin 1 is blank in the figure.

When the cable is correctly connected and RDS is opened, the red LED

light marked with yellow box in the figure will go out.

Figure 2-1 AICE-MINI+ Debug Cable and its Pins

The pin definition of AICE-MINI+ debug cable is as shown in Table 2-1.

It should be noted that Pin 1 is defined as No Connection (NC),

corresponding to the blank one. VREF needs to connect a 3.3V power pin,

and GND only needs to connect the pin 3 or the pin 5.

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