Hisense EG59 Bedienungsanleitung

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CDMA/GSM

Mobile

Phone

EG59

Technical Manual

Apr, 2010

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1. Introduction

EG59 mobile phone is designed and developed for CDMA/GSM network.

Its main features are:

The QUALCOMM single chip QSC6085 and MediaTek MT6223D

chipset are used, which feature Zero-IF and CMOS technology,

resulting high integration and great RF performance

Memory chips are 256MByte NAND/128MByte DDR and 64M bit

NOR/32M bit PSram MCP

65k colors, 320*240 TFT color LCD display

MIDI,MMF,AAC,MP3 ringtone

Camera

T-Flash memory card

Bluetooth

Touch panel

USB storage

2. Key Design Technology

2.1. Hardware:

CDMA/GSM/Bluetooth antenna design

technology Transmit link design technology

Receive link design technology

Frequency synthesize technology

RF control software compensation technology

Integrated system control technology

LCD implementation technology Interface

circuit design technology

Low power consumption design technology

High intensity PCB design technology

Ringtone quality improve technology

Components cost control

EMC/EMI design technology

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Reliability design technology

2.2. Software:

Reliable control of Flash & RAM

User-friendly UI design

Localized system capture optimization technology

Power consumption reducing software optimization technology

Systematic reliability design

3. Technical Specifications and Performance Parameters

3.1. General specifications

Item Content

Mode CDMA/GSM

Frequency Band CDMA 800MHz

Tx: 824 ~ 849MHz

Rx: 869 ~ 894MHz

GSM 900 MHz: (Used in European only)

Tx: 880 ~ 915MHz

Rx: 925 ~ 960MHz

DCS 1800 MHz: (Used in European only)

Tx: 1710-1785MHz

Rx: 1805-1880MHz

BLUETOOTH:

2402MHz to 2480MHz

Dimensions (L*W*D) 116mm×51mm×13.5mm

Working temperature -20 ~ +55°C

Storage temperature -30 ~ +60°C

Relative humidity 5% ~ 95%

Tx Output Power 23±2dBm Max (CDMA)

33±2dBm Max(GSM)

29±2dBm Max(DCS)

-6~+4dBm(BT)

Channel bandwidth 1.23MHz(CDMA)

200kHz(GSM)

Battery capacity 1100mAh

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3.2. Electronic specifications

Tx unit

GSM:

Item Description Marks

Frequency band GSM: 880~ 915MHz

DCS: 1710-1785MHz

Output power GSM: 33±2dBm

DCS: 29±2dBm

Channel bandwidth 200kHz

Modulation GMSK/QPSK

CDMA:

Item Description Marks

Frequency band Tx:824 ~ 849MHz

Output power 23±2dBm Max

Channel bandwidth 1.23MHz

Modulation OQPSK

Rx unit

GSM:

Item Description Marks

Frequency band GSM: 925~ 960MHz

DCS: 1805-1880MHz

Receiver sensitivity –102dBm (Class II

FER<2.44%)

Phase Error Peak -20°-- +20°

Phase Error RMS ≤5°

Frequency Error GSM: ±90Hz

DCS: ±180Hz

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CDMA:

Item Content Comment

Frequency band CELL：869~ 894MHz

Channel bandwidth 1.23MHz

Receiver sensitivity < –104dBm (FER:0.5%)

Single Frequency

Interference Resist

< –101dBm (FER: 1.0%) Frequency

offset: 900KHz

Power: -30dBm

Frequency offset: ±0.9MHz/±1.7MHz, Power:①-

43dBm

Frequency offset: ±0.9MHz/±1.7MHz, Power:②-

32dBm

Inter-modulation

spurious response

attenuation

Frequency offset: ±0.9MHz/±1.7MHz, Power:③-

21dBm

<①–81dBmConductibility

spurious emission <②–61dBm

3.3. Other Electronic Specifications

SIM / UIM interface, Support either 3V or 1.8V

4. Phone Work Principles

4.1 RF circuit

4.1.1 RF circuit of CDMA

4.1.1.1Main

functions

circuit:

The baseband CDMA signal is modulated by transmitting circuit, and

then is transmitted by antenna on the bandwidth: 824MHz~849MHz;

When the receiver circuit receives the signal on 869MHz~894MHz, it is

demodulated and becomes to the forward channel baseband CDMA

signal; and at the same time, provides the constant controllable

19.2MHz frequency source.

4.1.1.2 Structure of RF circuit:

We could divide it to 4 units according to the functions: Antenna unit,

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frequency synthesized unit, receiving unit, transmitting unit.

4.1.1.2.1 Antenna unit

This unit is composed by antenna groupware, antenna switch, diplexer

and duplexer.

This antenna groupware is the transceiver of the wireless signal that is

composed by intside antenna, and could fetch up the disadvantages

such as the low efficiency and the poor radiancy direction by the high

performance match. This phone has the antenna switch, diplexer and

duplexer. The antenna switch is used as the auto-test mechanical

switch, which is located at the RF channel and parallel connected to

the antenna to reduce the 0.47dB loss during using. When producing

and testing, it is connected to the test cable. Duplexer is used to

isolate the received and transmitted signals, which can reduce the

interference.

4.1.1.2.2 Frequency-synthesized unit

QSC6085 platform has a high integration on the frequency-synthesizing

and a flexible design project, which is composed of the following circuits:

crystal oscillator (XO) 19.2MHz, Loop filter and QSC6085 power

management. Crystal oscillator (XO) is provided to TX and RX as the

fiducially source, and also is provided to QSC6085 as the clock source

buffered and filtered by inside power management.

4.1.1.2.3 Transmitting unit

Mainly the following circuits compose this unit: Tx SAW filter, Power

amplifier, burst mode/PA-ON control circuit and high power detect

circuit. CDMA 1X signal is output from QSC6085. For transmitting the

power control correctly, QSC6085 outputs TX_AGC_ADJ PDM signal to

control the output power. PDM pulse wave can realize the plus control

beyond 85dB by RC filter circuit. The frequency of the output signal is

conversed up from analog base band signal to 824MHz-849MHz mixed

by UHF_LO. Output signal go through TX SAW filter (836.5MHz+/-

12.5MHz) to power amplifier, and then output to duplexer. The duplexer

has 55dB isolation to the receiver unit.

4.1.1.2.4Receiving unit

The duplexer gets the 869MHz-894MHz signals received from the

antenna. To the transmitting loop, the duplexer has 56dB isolation, and

the insertion loss of the duplexer is 2.2dB. After entering the integrated

low noise amplifier embedded in QSC6085 chip, the low noise amplifier

has gain switch function, when there are stronger interfering signals

coming in the received band, the gain will be reduced, which will

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weaken distortion generated by inferior processes. When the received

signal is lower than -85dBm, LNA processes the high gain control, at

the same time, QSC6085 controls LNA current offset and gain

compensation of QSC chip. LNA outputs to RX SAW filter and restrains

the 40dB transmitted signal and out-of-band signal. The bandwidth of

the filter is 25MHz, and the frequency range is 881.5+/-12.5MHz, then

output to QSC6085. QSC6085 supports zero intermediate frequency

technology, which can converse the frequency down to base band

signal directly, and then generates two analog signals ( I and Q) to enter

QSC6085 chip for advanced demodulation.

4.1.2 RF circuit of GSM

4.1.2.1

Main

functions

circuit:

The baseband modulate the uplink baseband GSM signal, and then

transmit it on 885MHz--915MHz carrier by the antenna; Demodulate the

received wireless signal transmitted by the base station on 925MHz-

925MHz carriers by the receiving circuit and get the forward

channel GSM signal; at the same time, provide the steady en-control

13MHz frequency source.

4.1.2.2 Structure of RF circuit:

We can divide it to 4 units according to the functions: Antenna unit,

frequency synthesized unit, receiving unit, transmitting unit.

4.1.2.2.1 Antenna unit

Composed by antenna groupware, antenna switch and diplexer. This

antenna groupware is the transceiver of the wireless signal that is

composed by inside antenna, and could fetch up the disadvantages

such as the low efficiency and the poor radiance direction by the high

performance match. This phone has the antenna switch and diplexer.

The antenna switch is used as the auto-test mechanical switch, which is

located at the RF channel and parallel connected to the antenna. When

producing and testing, it is connected to the test cable. Diplexer is used

to isolate the received and transmitted signals, which can reduce the

interference.

4.1.2.2.2 Frequency-synthesized unit

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EG59 uses MT6139 as RF transceiver. MT6139 is a highly-integrated

RF transceiver IC for GSM850/GSM900/DCS1800 bands. It includes 4

LNAs, 2 RF quadrature mixers, a channel filter, a programmable-gain

amplifier for the receiver, a high-precision I/Q modulator for the

transmitter, a 26MHz VCXO reference, a fractional-N frequency

synthesizer with a fully-integrated LC-tank VCO and 3 built-in LDO

regulators for VCO, VCXO and SDM. Its functional block diagram is

shown as below.

The MT6139 includes a Phase-Locked Loop (PLL)-based fractional-N

frequency synthesizer with a fully-integrated LC-tank VCO. It provides

the Local Oscillator (LO) signals for both receiver and transmitter. In

order to reduce the inherent spurs caused by the fractional-N

synthesizer, a 3rd-order sigma-delta modulator with a dithering function

is used to generate the division number N for the prescaler. The

prescaler is composed of a high-frequency divided-by-2 circuit and a

multi-modulus frequency divider with the programmable division number

ranging from 32 to 127. A conventional digital-type Phase-Frequency

Detector (PFD) with a charge pump is used for phase comparison.

4.1.2.2.3. Transmitting unit

MT6139 transmitter adopts the direct-conversion architecture with

higher integration level and simpler frequency plan. It consists of

BaseBand (BB) I/Q filters, I/Q modulators, frequency dividers, output

buffers and a bias-core circuit. BB I/Q differential signals from the BB

chip are fed into the one-pole RC low-pass filter first for better out-of-

the-band noise performance. The 3-dB frequency corner is allocated at

700kHz. Two double balanced mixers (modulators), one for I+/I- and

another for Q+/A- signals, are responsible for translating the filtered BB

I/Q signals to the transmitting frequencies. LO signals are provided by

the divided-by-2 (DCS1800) and divided-by-4 (GSM850/GSM900)

dividers. The output buffers amplify the modulator output signals to an

adequate level to fulfill P-in requirement of Power Amplifier (PA). At last,

the on-chip balun is used to convert the differential signals to single-

ended output signal.

4.1.2.2.4. Receiving unit

The receiver section includes Quad-Band Low-Noise Amplifiers (LNAs),

RF quadrature mixers, channel filters, Programmable-Gain Amplifiers

(PGAs), and on-chip automatic DC-offset correction loops. The

differential inputs are matched to SAW filters using LC networks and the

H/L gain step is 36dB. Following the LNAs are two quadrature RF

mixers that down-convert the RF signal to IF I/Q signals. The LO signals

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for mixers are generated by VCO divided-by-2 (DCS1800) and divided-

by-4 (GSM850/GSM900). The IF I/Q signals are then filtered and

amplified through a low-pass filter and a PGA. The overall channenl

response composes of an anti-blocking low-pass filter with f3dB =

1.5MHz at mixer differential load and a 5th-order Butterworth low-pass

filter with f3dB = 135kHz. The multi-stage PGA is implemented between

filtering staged to control the gain of the receiver. With a 2dB gain step,

a 60dB dynamic range of the PGA ensures a proper signal level for

baseband setting requirement. Two DC-Offset Corretion (DCOC) loops

ensure that the residual static DC-offset voltage held digitally is less

than 200mV at maxium gain case. DC-offset correction is performed

every time the receiver gain is programmed even in the multislot mode.

4.2. Digital base band circuit principle

4.2.1 General

The digital base band circuit is composed by central control and data

processing unit, power management unit, voice processing unit, display

unit and outside interface unit.

4.2.2 The circuit and principle of each unit

4.2.2.1 Central control and data processing unit

QSC6085 is a single chip integrated multiple processors on-chip. The

baseband circuits and system software incorporates a low-power, high-

performance reduced instruction set chip (RISC) microprocessor core

featuring the ARM926EJ-S™ CPU and Jazelle™ accelerator circuit

from ARM® Limited. There are two low-power, high-performance

QDSP4000™ digital signal processor (DSP) cores, one for the modem

and one for applications.

The QSC6085 is High tier device (153.6kbps data, dual memory bus)

within the family of QUALCOMM single chips. It support all the usual

digital signal processing and software functions, eg : processors,

memory support, video, audio, BREW, security, JTAG. At the same time,

The keypad (and its backlighting), USB, UARTs, RUIM, speakers,

microphones, LCD (and its backlighting), vibration motor are also

supported.

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