Intel G31 EXPRESS CHIPSET SPECIFICAT Bedienungsanleitung
Order Number: 317496-003
Notice: The Intel®G31/P31 Express Chipset may contain design defects or errors known as errata which may
cause the product to deviate from published specifications. Current characterized errata are available on
request.
Intel®G31/P31 Express Chipset
Specification Update
— For the Intel®82G31 Graphics and Memory Controller Hub
(GMCH) and Intel®82GP31 Memory Controller Hub (MCH)
February 2008
2Specification Update
Legal Lines and Disclaimers
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OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS DOCUMENT. EXCEPT AS PROVIDED IN INTEL'S TERMS AND CONDITIONS
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MERCHANTABILITY, OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. Intel products are not intended for
use in medical, life saving, life sustaining, critical control or safety systems, or in nuclear facility applications.
Intel may make changes to specifications and product descriptions at any time, without notice.
Designers must not rely on the absence or characteristics of any features or instructions marked “reserved” or “undefined.” Intel reserves these for
future definition and shall have no responsibility whatsoever for conflicts or incompatibilities arising from future changes to them.
The Intel®G31/P31 Express Chipset may contain design defects or errors known as errata which may cause the product to deviate from published
specifications. Current characterized errata are available on request.
Contact your local Intel sales office or your distributor to obtain the latest specifications and before placing your product order.
Intel and the Intel logo are trademarks or registered trademarks of Intel Corporation or its subsidiaries in the United States and other countries.
*Other names and brands may be claimed as the property of others.
Copyright © 2007-2008, Intel Corporation. All Rights Reserved.
Contents—3 Series Chipsets
Specification Update 3
Contents
Preface......................................................................................................................5
Summary Tables of Changes......................................................................................6
Identification Information.........................................................................................8
Errata........................................................................................................................9
Specification Changes..............................................................................................10
Specification Clarifications ......................................................................................11
Documentation Changes..........................................................................................12
3 Series Chipsets—Revision History
4Specification Update
Revision History
§ §
Revision Description Date
-001 •Initial Release July 2007
-002 •AddedErrata#2 August 2007
-003 • Added B0 stepping details February 2008
Preface
Specification Update 5
Preface
This document is an update to the specifications contained in the Affected Documents/
Related Documents table below. This document is a compilation of device and
documentation errata, specification clarifications and changes. It is intended for
hardware system manufacturers and software developers of applications, operating
systems, or tools.
Information types defined in Nomenclature are consolidated into the specification
update and are no longer published in other documents.
This document may also contain information that was not previously published.
Affected Documents/Related Documents
Nomenclature
Errata are design defects or errors. These may cause the Intel 82G31/82P31 (G)MCH
behavior to deviate from published specifications. Hardware and software designed to
be used with any given stepping must assume that all errata documented for that
stepping are present on all devices.
Specification Changes are modifications to the current published specifications.
These changes will be incorporated in any new release of the specification.
Specification Clarifications describe a specification in greater detail or further
highlight a specification’s impact to a complex design situation. These clarifications will
be incorporated in any new release of the specification.
Documentation Changes include typos, errors, or omissions from the current
published specifications. These will be incorporated in any new release of the
specification.
Note: Errata remain in the specification update throughout the product’s lifecycle or until a
particular stepping is no longer commercially available. Under these circumstances,
errata removed from the specification update are archived and available upon request.
Specification changes, specification clarifications and documentation changes are
removed from the specification update when the appropriate changes are made to the
appropriate product specification or user documentation (datasheets, manuals, etc.).
Title Number
Intel®G31/P31 Express Chipset Datasheet 317495-001
Summary Tables of Changes
6Specification Update
Summary Tables of Changes
The following tables indicate the errata, specification changes, specification
clarifications, or documentation changes which apply to the Intel 82G31/82P31 (G)MCH
product. Intel may fix some of the errata in a future stepping of the component, and
account for the other outstanding issues through documentation or specification
changes as noted. These tables uses the following notations:
Codes Used in Summary Tables
Stepping
X: Errata exists in the stepping indicated. Specification Change or
Clarification that applies to this stepping.
(No mark)
or (Blank box): This erratum is fixed in listed stepping or specification change
does not apply to listed stepping.
Page
(Page): Page location of item in this document.
Status
Doc: Document change or update will be implemented.
Plan Fix: This erratum may be fixed in a future stepping of the product.
Fixed: This erratum has been previously fixed.
No Fix: There are no plans to fix this erratum.
Row
Change bar to left of table row indicates this erratum is either
new or modified from the previous version of the document.
Summary Tables of Changes
Specification Update 7
Errata
No. Steppings Status Errata
A2
1 X No Fix Graphics Debug Reset
2XNoFix
Visual Corruption with Integrated Graphics & Intel® Flex Memory Technology
Enabled using Microsoft* Windows Vista*
Specification Changes
No. Specification Changes
There are no specification changes in this revision of the specification update.
Specification Clarifications
No. Specification Clarifications
There are no specification clarifications in this revision of the specification update.
Documentation Changes
No. Documentation Changes
There are no documentation changes in this revision of the specification update.
Identification Information
8Specification Update
Identification Information
Component Identification via Programming Interface
The Intel®G31 Express Chipset may be identified by the following register contents.
:
The Intel®P31 Express Chipset may be identified by the following register contents.
Notes:
1. Vendor ID corresponds to bits 15:0 of the Vendor ID register located at offset 00-01h in the PCI function
0 configuration space.
2. Device ID corresponds to bits 15:0 of the Device ID register located at offset 02-03h in the PCI function
0 configuration space.
3. Revision Number corresponds to bits 7:0 of the Revision ID register located at offset 08h in the PCI
function 0 configuration space.
Component Marking Information
The Intel®G31/P31 Express Chipsets may be identified by the following register
content.
Stepping Vendor ID Device ID Revision ID Notes
A2 8086h 29C0h 02h Intel®G31 Express Chipset
B0 8086h 29C0h 10h Intel®G31 Express Chipset
Stepping Vendor ID Device ID Revision ID Notes
A2 8086h 29C0h 02h Intel®P31 Express Chipset
B0 8086h 29C0h 10h Intel®P31 Express Chipset
Stepping Product S-Spec # Top Marking Notes
A2 GMCH SLAJ3 LE82G31 Intel®G31 Express Chipset Production Sample
A2 GMCH SLAHX LE82P31 Intel®P31 Express Chipset Production Sample
B0 GMCH SLASJ LE82G31 Intel®G31 Express Chipset Production Sample
B0 GMCH SLASK LE82P31 Intel®P31 Express Chipset Production Sample
Errata
Specification Update 9
Errata
1. Graphics Debug Reset
Problem: If the Graphics Reset Enable (PCI Bus 0 Device 2 Function 0; offset C0h, bit 0) is set
and there are new cursor, display, or overlay engine commands, the internal graphics
may not be able to complete its reset.
Implication: Since the internal graphics may not be able to be reset, the system may hang or have
video corruption.
Workaround: Disable the cursor, display, and overlay engines. Wait 1 uS. Issue the graphics reset by
setting this bit to 1. The Intel®Graphics Media Accelerator driver implements this
workaround.
Status: No Fix - See Summary of Tables for affected steppings.
2. Visual Corruption with Integrated Graphics & Intel Flex Memory
Technology Enabled Using Microsoft Windows Vista*
Problem: Visual corruption is observed with the Intel® G31 GMCH using new Microsoft Windows
Vista* paging model when Intel® Flex Memory Technology is enabled in the Dual
Channel Asymmetrice Configuration
Implication: Visual graphics corruption on the display when running 3D applications.
Workaround: Use latest Intel® Graphics Driver (Revision 15.4.4 or newer).
Status: NoFix - See Summary of Tables for affected steppings.
Specification Changes
10 Specification Update
Specification Changes
There are no specification changes in this revision of the specification update.
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