Korg RK-100 Bedienungsanleitung

REMOTE KEYBOARD

SERVICE D|X -4 AA

MANUAL IllV^IUU

CONTENTS

1. SPECIFICATIONS 2

2. MIDI IMPLEMENTATION 2

3. STRUCTURAL DIAGRAM 3

4. BLOCK DIAGRAM 4

5. CIRCUIT DIAGRAM 5

6. PC BOARD 6

7. CIRCUIT DESCRIPTIONS 8

8. TROUBLESHOOTING CHART 12

9. PARTS LIST 13

KEIO ELECTRONIC LABORATORY CORPORATION

TOKYO/JAPAN

1. SPECIFICATIONS

DC- IN

MIDI out (DIN socket)

UM-3 X6/AC adaptor (9V,

100mA minimum)

1,110(W) X293(D) X69(H)

4.4kg (with battery)

Batteries (UM-3 X6)

MIDI cable (5m)

Control: Pitch bend wheel (Up, Down)

Modulation wheel (0—10)

Volume wheel (0-10)

Program up switch

Program down switch

Octave switch (H/M/L)

Modulation destination

1(Modulation wheel/Joy

stick +Ydirection)

2(Joystick -Ydirection)

Program select (1-1—8-8,

0-63 at MIDI)

Keyboard:

Octave:

Matched Model:

Program Select:

Program Number Display:

41 Keys (C-E)

H(60-100 at MIDI)

M(48-88 at MIDI)

L(36-76 at MIDI)

MIDI equipped synthesizer

Program number 0—63 at

MIDI

LED

Bank^ 8(Green)

Program ^7(Red)

Input Jack:

Output Jack:

Strap Pins:

Power Supply:

Dimensions:

Weight:

Accessories:

2. MIDI IMPLEMENTATION

Transmitted data

Status byte 2nd byte 3rd byte Description

10 0 1;0 0000kkkkkkk00 0 00000Note Off event ©o

10 0 10000: 0kk k kkkk01000000Note On event ^OVo

10110000000000010vVV V VVVModulation 1fiO —

1011000o; 0 0 0000100VVVVVVVModulation 2So

1011000o' 0 0000111 0V V V V V V V Output Volume SOO*?- —

1 1 00.0 0 0 o: 00PPPPPP— — Program change CO “*

1110. 000o' 00000000 0 b bb b bbb Pitch bend t®

1 1 1111ro' —— ——— — ——Active Sensing

Note:

1. When power is turned on, the RK-100 sends program

change (0 on MIDI), modulation, volume, and pitch

bend control change data according to positions of con-

trols on RK-100.

2. Note number (kkkkkkk) can be changed by the octave

selector,

L=36-76: M=48-88: H=60-100.

3. Destination switch position has the following effects.

At "1": MG wheel controls joystick +Y direction or

modulation wheel on a2-wheel equipped synth.

At "2": MG wheel controls joystick -Y direction only.

4. Program number (pppppp) covers the range of 0-63

MIDI.

5. Output volume (vvvvvvv) range is 0-127 MIDI.

6. Active sensing is sent every 200msec.

-2-

(a)

PART NO. PART NAME PART CODE

WOOOEM CASE IIVORV)

WOODEN CASE (BLACK)

WOODEN CASE (RED)

WOODEN CASE IWALNUTl

64S06600

fi4S0860l

64S06S0?

64608603

MAIN PANEL (BROWN) 64064701

NECK PLATE (BROWN) 64064901

JACK PLATE (BROWN) 64064901

BATTERY COVER (RED)

BATTERY COVER (IVORY)

BATTERY COVER (BLACK)

64066001

64066002

64065003

METAL PITTING OE DIN JACK 6406SI0D

METAL PITTING OF VR (A) 64065300

METAL FITTING OF VR (Bl 64066301

METAL FITTING OF PC BOARD 64065700

CONTROL WHEEL SPRING (A) 64905600

CONTROL WHEEL SPRING (B) 64906601

SCREWS OF BATTERY COVER 64402400

CONTROL WHEEL 64618900

Num6«r Of Scr*«vt BATTERY CUSHION 60009200

SLIDE SW MASK 55006400

SLIDE SW KNOB 62001600

FE BBZMC 3>8 STOPPER WASHER 64010300

FE BBZMC 6x16 MODEL NUMBER SEAL 68D20B0D

WS 0 BZMC 3.1x13 ADHESIVE TAPE ON BOTH SIDES

WS RBZMC 3.1x13 CORO KEEP PM.106 64010200

VN ZMC SERIAL NUMBER SEAL 40OSO

STRUCTURAL

DIAGRAM

BLOCK

DIAGRAM

1.Modification of CPU mask eliminates necessity of external ROM about CPU; CPU 6303R can be

used as adirect replacement of CPU 6301 -C27. In this case external ROM must be used, and port

(P2t )of this CPU (6303) should be connected to GND through 10k£2.

CIRCUIT

DIAGRAM

ooocia

7. CIRCUIT DESCRIPTIONS

The seven basic sections of the RK-100 are (1} the micro- (1) CPU

computer CPU, (2) memory, (3) A-D converter. (4) input, IC6 (HD6301) is an 8-bit microcomputer with internal 4K

|5) display, (6) MIDI data output, and (7) power supply. ROM and 128# RAM; it has the following four kinds of

We are going to simply explain as follows. PORT.

Port Term Type Furtction

Port 1(P10-P17)

8-bit

P10-P15

P16

P17

Output

Input

Scan address of program indicator, keyboard matrix and shift sw.

A-D converter conversion start signal. Fig-1

A-D converter conversion completion signal. Fig-2

Port 2(P20-P24)

5-bit HOutput

Input

Output

1Output

A-D converter address signal. Fig-3

Selection of internal or external memory.

250kHz clock signal (8 times MIDI clock frequency 31 ,25kHz)

Fig-4

1A-D converter address signal. Fig-5

MIDI signal.

Port 3(P30-P37)

8-bit P30-P37 Input/output

ports

A-D multiplex bus (Low order 8bits of address and data bus).

Port 4(P40-P47)

8-bit

P40-P43

P44-P47

Output

pPD2764 address signal.

Selects 1C using data bus (HC240, M58990, mPD2746).

Fig-2 A/D Converter Conversion Completion Signal

O.lmsec O.lmsec

Fig-3 A/D Converter Address Signal Fig-4 Clock Signal

0.2msec 0.2m$ec

Fig-5 A/D Converter Address Signal -8-

The CPU of the RK-100 runs at 1MHz. The CPU reads in

VR A/D data at any time. For sending out the MIDI signal

from the output port P24, intervals of at least 5ms are

secured.

BLOCK DIAGRAM PIN CONFIGURATION

Vccjl O

xtau[T

extalQ;

NMi 13

^13

ST8y[T

PziH

PzzDo

PzjGI

P,oQ3

p|i [3

pizdl

P|3 [is

P|«[T7

Pi5 [ia

Pis[3

PitIzo

El Pso

5sl P3I

Terminal Function

Term Function

VCC, VSS These two pins are connected to power supply and ground.

XTAL, EXTAL These two pins are clock supply terminals for the internal oscillator circuit. A1/4 divider produces

the unit's 1MHz system clock.

EEnable terminal for 1MHz system clock output.

RESET For resetting the CPU. Requires aminimum of 20msec low signal level, thereby determining the

time constant of the externally connected reset circuit.

IRQ Interrupt request input terminal for detection of sync input start/stop control signal (high to low

pulse).

SCI Address strobe signal output terminal. This signal controls LS373 which is used to latch the

least significant 8bits of the address multiplexed with data output at port 3.

P10-P17

P20-P24

P30-P37

P40-P47

These terminals function as 10 ports, address buses, or data buses depending on the operating mode

and software.

-9-

(2) Memory section

2764 is aprogrammable read only memory chip (erasable

by ultraviolet radiation). The capacity of this EPROM is

65,536 bits (8192 words X8).

AO—All are for address input; 00—07 are for data input/

output. Read mode is selected when CE (chip enable) is 0

and OE is 0.

The standby mode is selected when CE =1, regardless of

the condition of OE. In this case, 00—07 go to high im-

pedance. It is Impossible to output data.

From the CPU, control signal goes to ICIO {HC138}, the

Y7 output of ICIO controls the CE of /iPD2764. When

HC373, using aD-type latch, sets the LE control input to

high level, data is output as is; data is retained when this is

at low level. CPU port 3is aTDM address and data bus so

HC373 is used, distributing data among AO—A7 of

^PD2764.

2764

PIN CONFIGURATION BLOCK DIAGRAM

PIN NAMES

DATA OUTPUTS

(3) A-D Converter

IC7 (M58990P) converts analog signals into 8-bit digital

data; it has an internal multiplexer that selects 8-channel

analog input. BEND, MG, and VOLUME analog values are

received from INO, INI, IN2, IN3; when the M58990P OE

terminal is high, the digital signal is output from 2-1 and

through 2-8 and input to CPU port 3(P30—P37). Conversion

is initiated by the conversion start signal from CPU port 1,

(P16) and aconversion end signal is output from the EOC

terminal when conversion has finished; this goes to CPU

port 1,(PI 7). The A-D converter uses the same IMHz clock

signal as of the CPU machine cycle.

PIN CONFIGURATION

Andlofl Inptii

INi .

ST4ri lnou< START •

Cn<>of>Conv^iof) Ouipvit £OC«

0<9it4il Outpvt 3 S *

Output-EnAOl0Input 0€ ~

Clock Input CLK-

iSV)

Ktl*r«r>c« Voiiagt ('J REF (*)

lOV) GNO

0»giial OuUNi 2*7^

I*-, -c «)•*“ 1'*.

IN. —[7 IN,

IN, ^[T «] •- ‘N. .

IN. -E ^—ADDA

'[I

•Ci

-n.

•d

•Go

•E

El-

E-

«]-

E-

•ADO B

AddriM Input

-AOOC

'ALE Addrto LATcn>€rt«i>l0 Input

•2'^ Mse

.2.3 ^Oi9»W OulpuT

•2-4

'2-e Lse

REF <•) RiUrenc* Voliagt <*l

26D*9kUl Output

BLOCK DIAGRAM

Aratos Input V

Addreu Input

iN 9

IN *

IN i

IN •

IN 7

AOO A

ADO 8

Addtttt-LAIch-Cnablt Input ALE

Start Input

START Clock Input

CL K

REF l-l

Rr**ioncB Voltagr (-1

EOC Entf.ot.Conv«rpon Output

2•I

2-1

2-*

2-3

2-y

2-3

>Otpital Output

Vcc ISVI

GND (OV)

HEE(-1 OE

Rdettno Voltage (-) Output-Enapie Input

-10-

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