Linear Technology DC1791A Kurzanleitung zur Einrichtung

dc1791afa

DEMO MANUAL DC1791A

Description

LTM2887

SPI/Digital or I2C µModule Isolator

with Dual Adjustable 5V Regulators

Demonstration circuit 1791A is a serialperipheral interface

bus (SPI) or inter-IC bus (I2C) µModule isolator with dual

adjustable5V regulatorsfeaturing theLT M

2887. The demo

circuit features an EMI optimized circuit configuration and

printed circuit board layout. All components are integrated

into the µModule isolator. The demo circuit operates

from a single external supply on VCC. The part generates L, LT, LTC, LTM, µModule, Linear Technology and the Linear logo are registered trademarks of

Linear Technology Corporation. All other trademarks are the property of their respective owners.

perForMAnce sUMMArY

operAting principles

output voltages on VCC2 and VL2 which may be adjusted

by external programming resistors. It communicates all

necessary signaling across the isolation barrier through

LTC’s isolator µModule technology.

Design files for this circuit board are available at

http://www.linear.com/demo

(TA= 25°C)

SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS

VCC Input Supply Range LTM2887-3 3.0 3.3 3.6 V

LTM2887-5 4.5 5.0 5.5 V

VCC2 Regulated Output Voltage 4.75 5 5.25 V

Adjustable Output Voltage Range 0.6 5.5 V

Internal Current Limit ∆VCC2 = –5% 110 mA

VL2 Regulated Output Voltage 4.75 5 5.25 V

Adjustable Output Voltage Range 1.62 5.5 V

Internal Current Limit ∆VL2 = –5% 110 mA

fMAX Maximum Data Rate DI1 →O1, Ix →DOx, CL = 15pF 20 MHz

LTM2887-S, Bidirectional Communication

LTM2887-S, Unidirectional Communication

MHz

LTM2883-I 400 kHz

VIORM Maximum Working Insulation Voltage GND to GND2 560 VDC

400 VRMS

Common Mode Transient Immunity 30 kV/µs

The LTM2887 contains an isolated DC/DC conversion

system with multiple LDOs to deliver power to the two

output voltage rails from VCC. Isolation is maintained by

the separation of GND and GND2 where significant operat-

ing voltages and transients can exist without affecting the

operation of the LTM2887. The logic side ON pin enables

or shuts down the LTM2887. All logic side signals are

referenced to the logic supply pin VL. The LTM2887 is

available in two data bus configurations, SPI (–S) or I2C

(–I), and with two input voltage ranges, 3.0 to 3.6 volts

(–3) or 4.5 to 5.5 volts (–5).

dc1791afa

DEMO MANUAL DC1791A

operAting principles

SPI signaling is controlled by the logic inputs CS, SDI,

and SCK. SDOE controls the SDO output and is normally

connected to CS. The corresponding isolated side output

signals are CS2, SDI2, and SCK2. SDO2 is the isolated

side SPI data input. All of the SPI communication channels

may be used as generic digital I/O.

I2C signaling is controlled by the logic inputs SDA and

SCL, corresponding to SDA2 and SCL2 on the isolated

side. The SCL channel is unidirectional supporting master

mode only I2C communication. SCL2 output is standard

CMOS push-pull drive. SDA signaling is bidirectional,

and includes an internal current source pull-up on SDA2

supporting up to 200pF of load capacitance.

Demo circuit 1791A is available in four configurations

supporting all versions of the LTM2887. Table 1 details

the demo circuit configurations.

Table 1.

DEMO CIRCUIT INPUT VOLTAGE COMMUNICATION

DC1791A-A 3.0V to 3.6V SPI/Digital

DC1791A-B 4.5V to 5.5V SPI/Digital

DC1791A-C 3.0V to 3.6V I2C

DC1791A-D 4.5V to 5.5V I2C

The demo circuit has been designed and optimized for low

RF emissions. To this end some features of the LTM2887

are not available for evaluation on the demo circuit. The

logic supply voltage VLis tied to VCC on the demo circuit,

and the ON pin is not available on the input pin header,

but may be controlled by jumper JP1. EMI mitigation

techniques used include the following.

1. Four layer PCB, allowing for isolated side to logic side

“bridge” capacitor. The bridge capacitor is formed be-

tween an inner layer of floating copper which overlaps

the logic side and isolated side ground planes. This

structure creates two series capacitors, each with

approximately .008” of insulation, supporting the full

dielectric withstand rating of 2500VRMS. The bridge

capacitor provides a low impedance return path for

injected currents due to parasitic capacitances of the

LTM2887’s signal and power isolating elements.

2. Discrete bridge capacitors (C3, C4) mounted between

GND2 and GND. The discrete capacitors provide ad-

ditional attenuation at frequencies below 400MHz.

Capacitors are safety rated type Y2, manufactured by

Murata, part # GA342QR7GF471KW01L.

3. Board/ground plane size has been minimized. This

reduces the dipole antenna formed between the logic

side and isolated side ground planes.

4. Top signal routing and ground floods have been opti-

mized to reduce signal loops, minimizing differential

mode radiation.

5. Common mode filtering is integrated into the input and

output pin headers. Filtering helps to reduce emissions

caused by conducted noise and minimizes the effects

of cabling to common mode emissions.

6. A combination of low ESL and high ESR decoupling is

used. A low ESL ceramic capacitor is located close to

the moduleminimizing highfrequency noiseconduction.

A high ESR tantalum capacitor is included to minimize

board resonances and prevent voltage spikes due to

hot plugging of the supply voltage.

EMI performance is shown in Figure 1, measured using

a Gigahertz Transverse Electromagnetic (GTEM) cell and

method detailed in IEC 61000-4-20, “Testing and Mea-

surement Techniques – Emission and Immunity Testing

in Transverse Electromagnetic Waveguides”.

dc1791afa

DEMO MANUAL DC1791A

operAting principles

Figure 1. DC1791A Radiated Emissions

LTM2887 Low EMI Demo Board Radiated Emissions

The demo circuit includes provisions for programming the

two output voltagerails. Resistors R6, R7 andR5, R10 allow

the VL2 and VCC2 power rails, respectively, to be reduced

from their nominal operating voltages. The value of R6 or

R5 should be no greater than 6.04k to minimize errors in

the output voltage caused by the internal voltage dividers.

The formulas presented in Table 2 allow selection of the

appropriate resistor values. In addition the current limit

of each output voltage rail may also be programmed. The

current limit threshold is set by resistors R8 and R9 for

IVL2 and IVCC2 respectively. The current limit is nominally

100mA. The current limit may be reduced for either output

by the following equation:

RIMAX(R8, R9) = [119.22–(0.894) • (VL2, VCC2)]/ILIMIT

Table 2.

VOLTAGE RAIL RESISTOR TO REDUCE OUTPUT

VCC2 = 0.6V(1 + R7/R6)

VL2 = 0.6V(1 + R10/R5)

DETECTOR = QPEAK

RBW = 120kHz

VBW = 300kHz

SWEEP TIME = 17s

# OF POINTS = 501

CISPR 22 CLASS B LIMIT

DC1791A–A

DC1791A–B

FREQUENCY (MHz)

100

200

300

400

500

600

700

800

900

1000

–30

–20

–10

AMPLITUDE (dBµV/m)

DC1791A

dc1791afa

DEMO MANUAL DC1791A

qUick stArt proceDUre

Demonstration circuit 1791A is easy to set up and evalu-

ate the performance of the LTM2887. Refer to Figure 2

for proper measurement equipment setup and follow the

procedure below.

NOTE: When measuring the input or output voltage ripple

or high speed signals, care must be taken to avoid a long

ground lead on the oscilloscope probe.

1. Install JP1 in the ON (default) position.

2. With power off, connect the input power supply to VCC

and GND on pin header J1.

3. Turn on the power at the input.

NOTE: Make sure that the input voltage does not exceed 6V.

4. Check for the proper output voltages. VCC2 = 5V and

VL2 = 5V on pin header J2.

5. Once the proper output voltages are established, con-

nect signals to J1 and J2 pin headers as appropriate.

The header pin names and locations are detailed on the

demo board silkscreen below the pin headers.

TECHNOLOGY

VIN

– +

Figure 2. Demo Board Setup

dc1791afa

DEMO MANUAL DC1791A

pcB lAYoUt

Layer 1. Top Layer

Layer 2. Ground Plane

Layer 3. Signal Layer

Layer 4. Bottom Layer

dc1791afa

DEMO MANUAL DC1791A

pArts list

ITEM QTY REFERENCE PART DESCRIPTION MANUFACTURER/PART NUMBER

Required Circuit Components

1 1 U1 –A

–B

–C

–D

I.C., LTM2887CY-3S

I.C., LTM2887CY-5S

I.C., LTM2887CY-3I

I.C., LTM2887CY-5I

LINEAR LTM2887CY-3S#PBF

LINEAR LTM2887CY-5S#PBF

LINEAR LTM2887CY-3I#PBF

LINEAR LTM2887CY-5I#PBF

Hardware/Components (For Demo Board Only)

2 1 C1 CAP., TANT 10μF 10V 20% 1206 AVX TAJA106M016RNJ

3 1 C2 CAP., CER 1μF 10V 20% 0508 MURATA LLL219R71A105MA01L

4 2 C3, C4 CAP., CER 470pF 250Vac 10% 1808 MURATA GA342QR7GF471KW01L

5 2 J1, J2 0.1” DOUBLE ROW HEADER, 5 ×2 PIN SAMTEC TSW-105-22-G-D

6 2 J1, J2 0.1” FERRITE PLATE, 5 ×2 HOLE FAIR RITE 2644247101

7 1 JP1 Header, 1 ×3 2mm WURTH 62000311121

8 1 JP1 SHUNT, 1 ×2 2mm WURTH 60800213421

9 1 R1 –C

–D

RES., CHIP 10kΩ 1% 0805

YAGEO RC0805FR-0710KL

10 1 R2 –C

–D

RES., CHIP 10kΩ 1% 0805

YAGEO RC0805FR-0710KL

11 1 R3 –C

–D

RES., CHIP 0 0805

YAGEO RC0805FR-070RL

12 1 R4 –A

–B

RES., CHIP 0 0805

YAGEO RC0805FR-070RL

13 2 R6, R7 RES., CHIP 1.15kΩ 1% 0805 YAGEO RC0805FR-071K15L

dc1791afa

DEMO MANUAL DC1791A

Information furnished by Linear Technology Corporation is believed to be accurate and reliable.

However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-

tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.

scheMAtic DiAgrAM

GND2

AVCC2

SCL

DI1

VCC2

SDA

IVCC2

IVL2

DNC

GND1

VCC

SDA2

AVL2

VL2

DO2

DO1

GND

SCL2

DNC

GND2

LTM2887CY-*

470pF

1808

470pF

1808

PCB SUBSTRATE 'BRIDGE' CAPACITOR, 20pF TOTAL

TOP COPPER

INNER LAYER 1

OPEN

1.15k

R10

OPEN

1uF

0508

JP1

10uF

3216

VCC

DI1

DNC

DO1

GND

SDA

SCL

DO2

LTM2887-I

VCC

CSB

DO2

DO1

GND

SDI

SCK

SDO

LTM2887-S

VL2

GND2

SDA2

SCL2

VCC2

GND2

DNC

LTM2887-I

VL2

GND2

SDI2

SCK2

SDO2

VCC2

GND2

CS2B

LTM2887-S

OFF

2ND PROTOTYPE

KEITH B.

3-4-15

TITLE: SCHEMATIC

SIZE

IC NO.

REV.

DATE:

SHEET OF

APPROVALS

SCALE = NONE

CUSTOMER NOTICE

Wednesday, March 04, 2015

SPI/DIGITAL OR I2C uMODULE ISOLATOR, LOW EMI

KEITH B.

LTM2887CY-3S/-5S/-3I/-5I

DEMO CIRCUIT 1791A

ECO

REV

APPROVED

DATE

REVISION HISTORY

DESCRIPTION

1630 McCarthy Blvd.

Milpitas, CA 95035

Phone: (408) 432-1900

Fax: (408) 434-0507

www.linear.com

LTC CONFIDENTIAL

FOR CUSTOMER

USE ONLY

THIS CIRCUIT IS PROPRIETARY TO

LINEAR TECHNOLOGY AND SUPPLIED FOR

USE WITH LINEAR TECHNOLOGY PARTS.

LINEAR TECHNOLOGY HAS MADE A BEST EFFORT

TO DESIGN A CIRCUIT THAT MEETS CUSTOMER -

SUPPLIED SPECIFICATIONS; HOWEVER, IT REMAINS

THE CUSTOMERS RESPONSIBILITY TO VERIFY

PROPER AND RELIABLE OPERATION IN THE ACTUAL

APPLICATION. COMPONENT SUBSTITUTION AND

PRINTED CIRCUIT LAYOUT MAY SIGNIFICANTLY

AFFECT CIRCUIT PERFORMANCE OR RELIABILITY.

CONTACT LINEAR TECHNOLOGY APPLICATIONS

ENGINEERING FOR ASSISTANCE.

TECHNOLOGY

PCB DES.

APP ENG.

KEITH B.

INPUT CONNECTOR

OUTPUT CONNECTOR

N/A

NOTES: UNLESS OTHERWISE SPECIFIED

1. ALL RESISTORS ARE IN OHMS, 0805.

ALL CAPACITORS ARE IN MICROFARADS, 0805.

ASSY

VCC

LTM2887CY-3S

-A

3.0V - 3.6V

OPT

LTM2887CY-5S

-B

4.5V - 5.5V

OPT

LTM2887CY-3I

-C

3.0V - 3.6V

10K

OPT

LTM2887CY-5I

-D

4.5V - 5.5V

10K

OPT

VCC

1.15k

OPEN

dc1791afa

DEMO MANUAL DC1791A

Linear Technology Corporation

1630 McCarthy Blvd., Milpitas, CA 95035-7417

(408) 432-1900 ●FAX: (408) 434-0507 ●www.linear.com

 LINEAR TECHNOLOGY CORPORATION 2014

LT 1015 REV A • PRINTED IN USA

DEMONSTRATION BOARD IMPORTANT NOTICE

Linear Technology Corporation (LTC) provides the enclosed product(s) under the following AS IS conditions:

This demonstration board (DEMO BOARD) kit being sold or provided by Linear Technology is intended for use for ENGINEERING DEVELOPMENT

OR EVALUATION PURPOSES ONLY and is not provided by LTC for commercial use. As such, the DEMO BOARD herein may not be complete

in terms of required design-, marketing-, and/or manufacturing-related protective considerations, including but not limited to product safety

measures typically found in finished commercial goods. As a prototype, this product does not fall within the scope of the European Union

directive on electromagnetic compatibility and therefore may or may not meet the technical requirements of the directive, or other regulations.

If this evaluation kit does not meet the specifications recited in the DEMO BOARD manual the kit may be returned within 30 days from the date

of delivery for a full refund. THE FOREGOING WARRANTY IS THE EXCLUSIVE WARRANTY MADE BY THE SELLER TO BUYER AND IS IN LIEU

OF ALL OTHER WARRANTIES, EXPRESSED, IMPLIED, OR STATUTORY, INCLUDING ANY WARRANTY OF MERCHANTABILITY OR FITNESS

FOR ANY PARTICULAR PURPOSE. EXCEPT TO THE EXTENT OF THIS INDEMNITY, NEITHER PARTY SHALL BE LIABLE TO THE OTHER FOR

ANY INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES.

The user assumes all responsibility and liability for proper and safe handling of the goods. Further, the user releases LTC from all claims

arising from the handling or use of the goods. Due to the open construction of the product, it is the user’s responsibility to take any and all

appropriate precautions with regard to electrostatic discharge. Also be aware that the products herein may not be regulatory compliant or

agency certified (FCC, UL, CE, etc.).

No License is granted under any patent right or other intellectual property whatsoever. LTC assumes no liability for applications assistance,

customer product design, software performance, or infringement of patents or any other intellectual property rights of any kind.

LTC currently services a variety of customers for products around the world, and therefore this transaction is not exclusive.

Please read the DEMO BOARD manual prior to handling the product. Persons handling this product must have electronics training and

observe good laboratory practice standards. Common sense is encouraged.

This notice contains important safety information about temperatures and voltages. For further safety concerns, please contact a LTC applica-

tion engineer.

Mailing Address:

Linear Technology

1630 McCarthy Blvd.

Milpitas, CA 95035

X-ON Electronics

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