Linear Technology DC1774A-C Kurzanleitung zur Einrichtung

dc1774acf

DEMO MANUAL DC1774A-C

DESCRIPTION

LTC6431-15

50ΩGain Block IF Amplifier

Demonstration circuit 1774A-C features the LTC

6431-15

gain block amplifier. The LTC6431-15 has a power gain of

15.5dB and it is part of the LTC643X-YY amplifier series.

DC1774A-C is part of the DC1774A demo boards fam-

ily supporting the LTC643X-YY family. The demo board

DC1774A-C is optimized for a frequency range from

100MHz to 1200MHz. It incorporates a minimum of

passive support components to configure the amplifier

L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear

Technology Corporation. All other trademarks are the property of their respective owners.

PERFORMANCE SUMMARY

for various applications. The LTC6431-15 provides 50Ω

single-ended input and output impedance so that it can

be easily evaluated with most RF test equipment.

Design files for this circuit board are available at

http://www.linear.com/demo

Specifications are at TA= 25°C, VCC = 5V

SYMBOL PARAMETER CONDITIONS VALUE/UNIT

Power Supply

VCC Operating Supply Range All VCC Pins Plus +OUT 4.75V to 5.25V

ICC Current Consumption Total Current 90mA

FREQUENCY

(MHz)

POWER GAIN

S21

(dB)

OUTPUT

THIRD-ORDER

INTERCEPT POINT 1

OIP3

(dBm)

OUTPUT

THIRD-ORDER

INTERMODULATION 1

OIM3

(dBc)

SECOND

HARMONIC

DISTORTION 2

HD2

(dBc)

THIRD

HARMONIC

DISTORTION 2

HD3

(dBc)

OUTPUT 1dB

COMPRESSION

POINT

P1dB

(dBm)

NOISE FIGURE 3

(dB)

100 15.1 46.6 –89.2 –58.0 –88.0 20.0 3.8

200 15.4 46.7 –89.5 –58.0 –88.0 20.0 3.5

240 15.6 46.7 –89.3 –59.0 –88.0 20.3 3.4

300 15.5 46.6 –89.3 –60.0 –86.0 20.1 3.5

400 15.5 46.1 –88.3 –57.0 –87.0 20.3 3.5

500 15.4 45.3 –86.6 –55.6 –77.0 20.3 3.6

600 15.3 43.5 –83.1 –53.6 –69.0 20.4 3.7

700 15.2 42.2 –80.4 –51.9 –69.0 20.2 3.8

800 15.0 41.1 –78.1 –49.2 –65.0 20.1 4.0

900 14.8 39.5 –74.9 –46.7 –63.0 19.7 4.2

1000 14.7 38.7 –73.3 –45.0 –59 19.3 4.2

1100 14.5 38.0 –71.9 –40.8 –56.8 18.8 4.4

1200 14.3 38.0 –71.9 –38.4 –54.2 18.6 4.6

Notes: All figures are referenced to J7 (Input Port) and J10 (Output Port).

1. Two-tone test condition: Output power level = +2dBm/tone; Tone spacing = 1MHz.

2. Single-tone test condition: Output power level = +6dBm.

3. Small signal noise figure.

dc1774acf

DEMO MANUAL DC1774A-C

QUICK START PROCEDURE

Demo circuit 1774A-C can be set up to evaluate the per-

formance of the LTC6431-15. Refer to Figures 7 and 8, for

proper equipment connections and follow the procedure

below:

Single-Tone Measurement:

Connect all test equipment as suggested in Figure 7

1. The power labels of +5V and GND directly correspond

to the power supply. Typical current consumption of

the LTC6431-15 is about 90mA.

2. Apply an input signal to J7. A low-distortion, low noise

signal source with an external high order lowpass filter

will yield the best performance. (i.e. the input signal is

–10dBm. The Input is impedance matched to 50Ω).

3. Observe the output via J10. (The measured power at

the analyzer should be about +5dBm. The output is

impedance matched to 50Ω), suitable for the input of

a network or spectrum analyzer.

Two-Tone Measurement:

Connect all test equipment as suggested in Figure 8.

1. The power labels of +5V and GND directly correspond

to the power supply. Typical current consumption of

the LTC6431-15 is about 90mA.

2. Apply two independent signals f1 and f2 from SG1 and

SG2 at 240MHz and 241MHz respectively.

3. Monitor the output tone level on the spectrum analyzer.

Adjust signal generator levels such that output power

measures +2dBm/tone at the amplifier output J10, after

correcting for external cable losses and attenuators.

4. Change the spectrum analyzer’s center frequency and

observe the two IM3 tones at 1MHz below and above

the input frequencies. (i.e. the frequencies of IM3_LOW

and IM3_HIGH are 239MHz and 242MHz, respectively.

The measurement levels should be approximately

–90dBc; +47dBm is a typical performance of OIP3

at 240MHz). For this setup, the Rohde and Schwarz

FSEM30 spectrum analyzer was used. This SA has a

typical +20dBm third-order intercept point (TOI). So,

the SA input attenuation is set to 20dB with an external

20dB attenuation pad, resulting in an attenuation total

of 40dB. The system as described can measure OIP3

up to +50dBm.

Figure 1. LTC6431-15 Device Block Diagram

OUT

(PIN 18)

T-DIODE

(PIN 16)

GND

(PINS 8, 17, 23 AND EXPOSED PAD 25)

VCC

(PINS 9, 22)

(PIN 24)

dc1774ac F01

BIAS AND

TEMPERATURE

COMPENSATION

dc1774acf

DEMO MANUAL DC1774A-C

QUICK START PROCEDURE

Figure 2. Demo Board S-Parameters

Figure 3. Demo Board DC1774A-C Schematic

+5V

U1=LTC6431-15

GND

Stability

Network

VCC

560nH

R17

0603

J18

GND

R13

0603 C21

1000pF

J11

+5V

+IN

348

62pF

C22

0.1uF

10 21

DNC

GND

DNC

+IN

DNC

GND

N/C DNC

DNC

GND

VCC

DNC

+OUT

T_DIODE

DNC

VCC

N/C

DNC

N/C

DNC

GND

DNC

GND

1000pF

J10

+OUT

1000pF

C20

1000pF

FREQUENCY (MHz)

NOMINAL WORKING

FREQUENCY RANGE

|S21| (dB)

|S11|, |S12|, |S22| (dB)

–8

–16

–24

–4

–12

–20

–28

–6

–14

–22

–2

–10

–18

–26

1600800

dc1774ac F02

20001200400

|S21|

|S12|

|S11|

|S22|

dc1774acf

DEMO MANUAL DC1774A-C

OPERATION

ADDITIONAL INFORMATION

The demo circuit 1774A-C is a high linearity fixed gain

amplifier. It is designed for ease of use. Both the input

and output are internally matched to 50Ω single-ended

source and load impedance which is compatible with most

test equipment input and output. Figure 2 is shown demo

board’s S-parameters.

Figure 3 shows the demo circuit’s schematic. It requires

a minimum of passive supporting components. The input

and output DC blocking capacitors (C1 and C3) are re-

quired because this device is internally biased for optimal

operation. The frequency appropriate choke (L1) and the

decoupling capacitors (C21 and C22) provide bias to the

RF output node. Only a single 5V supply is necessary for

the VCC pins on the device.

The particular element values shown in the demo board

schematic are chosen for wide bandwidth operation.

Depending on the desired frequency, performance may

be improved by properly selecting one of the supporting

components.

As with any RF device, minimizing ground inductance is

critical.Careshouldbetakenwiththeboardlayoutbecause

of these exposed pad packages. The maximum number of

minimumdiameterviasholesshouldbeplacedunderneath

the exposed pad. This will ensure good RF ground and low

thermal impedance. Maximizing the copper ground plane

will also improve heat spreading and low inductance. It is

a good idea to cover the via holes with solder mask on the

back side of the PCB to prevent solder from wicking away

from the critical PCB to exposed pad interface.

The DC1774A-C is a wide bandwidth demo board but

it is not intended for operation down to DC. The lower

frequency cutoff is limited by on-chip matching elements.

TheSchematicDiagramsectionshows thePCB’sschematic

of the amplifier family LTC643X-YY. Hence, the board

can be modified for multiple demo board versions. For

example, both DC1774A-A and DC1774A-B demo boards

have a differential amplifier at U1; therefore, the board

Anoptionalparallel 62pF (C8)and348Ω(R2) input network

has been added to insure low frequency stability.

Table 2 shows the function of each input and output on

the board.

Table 2. DC1774A-C Board I/O Descriptions

CONNECTOR FUNCTION

J7 (IN+) Single-Ended Input. Impedance Matched to 50Ω. Drive

from a 50Ω Network Analyzer or Signal Source.

J10 (OUT+) Single-Ended Output. Impedance Matched to 50Ω. Drive

from a 50Ω Network Analyzer or Spectrum Analyzer.

E3 or J11 (VCC) Positive Supply Voltage Source.

E6 or J18 (GND) Negative Supply Ground.

is using transformers to transform from differential to

single-ended input and output. Likewise, the DC1774A-C

is a single-ended demo board; consequently, it uses the

LTC6431-15 for single-ended input and output.

Setup and Testing Signal Sources

The LTC6431-15 is an amplifier with high linearity per-

formance; therefore, output intermodulation products are

very low. For this reason, it drives most test equipment

and test setups to their limits. Consequently, accurate

measurement of the third-order intercept point for a low

distortion IC such as the LTC6431-15 requires certain

precautions to be observed in the test setup and testing

procedure.

Setup Signal Source

Figure 8 shows a proposed IP3 test setup. This setup has

low phase noise, good reverse isolation, high dynamic

range, sufficient harmonic filtering and wideband imped-

ance matching. The setup is outlined below:

a. High performance signal generator 1 and 2, the

HP8644A, were used to characterize the LTC6431-15.

These generators have low harmonic distortion and

very low phase noise.

dc1774acf

DEMO MANUAL DC1774A-C

b. High linearity amplifier which will help with the genera-

tor’sisolation.Italso prevents the two signal generators

from cross talking with each other and provides higher

output power.

c. A lowpass filter to suppress the harmonic contents

from interfering with the test signal.

d. The signal combiner from mini circuit, ADP-2-9, com-

bines the two isolated input signals. This combiner

has a typical isolation of 27dB. For better VSWR and

isolation, use the H-9 signal combiner from MA/COM.

The H-9 combiner has > 40dB isolation and a wider

frequency range, with about 3dB insertion loss. Even

passivedevices (i.e. combiners) withmagneticelements

can contribute non-linearity to the signal chain.

e. The Attenuator pads, on all three ports of the signal

combiner, will support further isolation of the two input

signal sources. They will reduce reflection and promote

maximum power transfer with wideband impedance

matching.

Testing Signal Source

Thetesting signal should beevaluatedand optimized before

it is used for measurements. The following outlines the

necessary steps to achieve optimization.

a. Apply two independent signals f1 and f2 from signal gen-

erator 1 and signal generator 2 at 240MHz and 241MHz

with the amplitude = –20dBm for each output tone.

b. Connect the combined signal sources output directly

to the spectrum analyzer. (without the DUT).

c. Slowly adjust the amplitude from signal generators so

that the output power level is +2dBm for each tone (i.e.

Thedefault twotonetestingpowerlevel forLTC6431-15).

d. Adjust the spectrum analyzer for maximum possible

resolution of the intermodulation products amplitude

in dBc relative to the main tone power (i.e. adjust fre-

quency span and resolution bandwidth to display the

noise floor. The wider span frequency will take a longer

time to sweep).

e. Insert a small attenuator pad (3dB or 6dB at the signal

combiner inputs) into the setup and observe if the setup

limitstheintermodulationproductslevel.(i.e.foragood

IP3 test setup with sufficient port-to-port isolation,

when measuring the intermodulation products, their

amplitude level (in dBc), will not be changed when a

small attenuation pad insert into the setup). Figure 4

shows the setup at the optimum input Attenuation.

f. Optimizethedynamic range of the spectrum analyzer by

adjusting input attenuation. First increase the spectrum

analyzer input attenuation (normally in steps of 10dB).

If the IMD product levels decrease when the input at-

tenuation is increased, then, the input power level is too

high for the spectrum analyzer to make a valid measure-

ment. Figure 5 is depicted the signal overloaded. (i.e.

these also mean that you are overloading the spectrum

analyzer and it is producing its own IMD products).

If the IMD (dBc) readings are constant, then, a sufficient

amount of attenuation has been added. Adding too

much attenuation will raise the noise floor and bury the

intended IMD signal as shown in Figure 6. Therefore,

select just enough attenuation to achieve a stable and

valid measurement.

In order to achieve good measurement result, the test

system must have lower distortion than the DUT Inter-

modulation. For example, to yield a +47dBm OIP3, the

measuredIntermodulation products mustbeabout –90dBc

than the test system must have better Intermodulation

products than –90dBc.

ADDITIONAL INFORMATION

Figure 4. Optimum Input Attenuation

+2dBm

Typical

Noise Floor at

~ –98dBm

~ –88dBm

dc1774acf

DEMO MANUAL DC1774A-C

ADDITIONAL INFORMATION

Figure 7. Proper Equipment Setup for Gain and Single-Tone Measurement

SPECTRUM

ANALYZER

SIGNAL

GENERATOR (HP8644A)

ROHDE AND

SCHWARZ

FSEM30

COAXIAL CABLE

LOWPASS

FILTER

(OPTIONAL)

3dB

ATTENUATION PAD

(OPTIONAL)

ASSY U1 FREQ

-A LTC6430IUF-15 100MHz TO 300MHz

-B LTC6430IUF-15 400MHz TO 1000MHz

-C LTC6431IUF-15 100MHz TO 1200MHz

DC POWER SUPPLY

GND V+

Figure 6. IMD Buried in the Noise FloorFigure 5. Not Enough Input Attenuation

+2dBm

~ –80 dBm

Noise Floor at

~ –101dBm

+2dBm

Noise Floor at

~ –81dBm

dc1774acf

DEMO MANUAL DC1774A-C

ADDITIONAL INFORMATION

Figure 8. Proper Equipment Setup for IP3 Measurement

SPECTRUM

ANALYZER

SIGNAL

GENERATOR 1 (HP8644A)

AMPLIFIER

(MINI CIRCUIT, ZHL-2

OR EQUIVALENT)

ROHDE AND

SCHWARZ

FSEM30

COAXIAL CABLE

20dB

ATTENUATION

PAD

LOWPASS

FILTER

6dB ATTENUATION

PAD (OPTIONAL)

COMBINER

MINI CIRCUIT

ADP-2-9

3dB

ATTENUATION

PAD

SIGNAL

GENERATOR 2 (HP8644A)

AMPLIFIER

(MINI CIRCUIT, ZHL-2

OR EQUIVALENT)

6dB ATTENUATION

PAD (OPTIONAL)

LOWPASS

FILTER

ASSY U1 FREQ

-A LTC6430IUF-15 100MHz TO 300MHz

-B LTC6430IUF-15 400MHz TO 1000MHz

-C LTC6431IUF-15 100MHz TO 1200MHz

DC POWER SUPPLY

GND V+

dc1774acf

DEMO MANUAL DC1774A-C

PARTS LIST

ITEM QTY REFERENCE PART DESCRIPTION MANUFACTURER/PART NUMBER

DC1774A2 Required Circuit Components

1 4 C1, C3, C7, C20 CAP., X7R, 1000pF, 50V 5%, 0402 AVX, 04025C102JAT2A

2 1 C21 CAP., X7R, 1000pF, 50V 5%, 0603 AVX, 06035C102JAT2A

3 1 C8 CAP., COG, 62pF, 16V 2%, 0402 AVX, 0402YA620GAT2A

4 0 C10, C12 CAP., COG, 62pF, 16V 2%, 0402 OPT

5 0 C11, C13, C16-C19 CAP., X7R, 1000pF, 5%, 0402 OPT

6 1 C22 CAP., X5R, 0.1μF, 10V, 10%, 0603 AVX, 0603ZD104KAT2A

7 2 E3, E6 TESTPOINT, TURRET, 0.064" MILL-MAX, 2308-2-00-80-00-00-07-0

8 0 JP1 HEADER, 2X6, 0.1" OPT

9 0 JP2, JP3 HEADER, 2X4, 0.1" OPT

10 0 J5, J6 CONN., SMA 50Ω EDGE-MOUNTED OPT

11 1 J7 CONN., SMA 50Ω EDGE-MOUNTED JOHNSON, 142-0701-851

12 0 J9 CONN., SMA 50Ω EDGE-MOUNTED OPT

13 2 J11, J18 JACK, BANANA KEYSTONE, 575-4

14 1 L1 INDUCTOR, CHIP, 560nH, 5%, 0603LS-1608 COILCRAFT, 0603LS-561XJLB

15 0 L11, L22 INDUCTOR, CHIP, 1008LS-2520 OPT

16 1 R2 RES., CHIP, 348Ω, 1%, 0402 YAGEO, RC0402FR-07348RL

17 0 R5, R6 RES., CHIP, 348Ω, 1%, 0402 OPT

18 0 R19 RES., CHIP, 0Ω, 5%, 0402 YAGEO, RC0402JR-070RL

19 2 STENCILS FOR BOTH SIDES DC1774A-2

DC1774A2-C Required Circuit Components

1 1 DC1774A-2 GENERAL BOM

2 0 C2, C4 CAP., X7R, 1000pF, 50V 5%, 0402 AVX, 04025C102JAT2A

3 0 C5 CAP., X7R, 1000pF, 50V 5%, 0603 AVX, 06035C102JAT2A

4 0 C9 CAP., COG, 62pF, 16V 2%, 0402 AVX, 0402YA620GAT2A

5 0 C14, C15 CAP., X7R, 1000pF, 25V 5%, 0402 AVX, 04023C102JAT2A

6 0 C23 CAP., X5R, 0.1μF, 10V, 10%, 0603 AVX, 0603ZD104KAT2A

7 0 L2 INDUCTOR, CHIP, 560nH, 5%, 0603LS-1608 COILCRAFT, 0603LS-561XJLB

8 0 J8 CONN., SMA 50Ω EDGE-MOUNTED OPT

9 1 J10 CONN., SMA 50Ω EDGE-MOUNTED JOHNSON, 142-0701-851

10 0 R1 RES., CHIP, 348Ω, 1%, 0402 YAGEO, RC0402FR-07348RL

11 0 R3, R4 RES., CHIP, 0Ω, 1/16W, 5%, 0603 OPT

12 4 R13, R14, R17, R18 RES., CHIP, 0Ω, 1/16W, 5%, 0603 YAGEO, RC0603JR-070RL

13 0 T1, T2 XFMR, MINI-CIRCUITS OPT

14 0 T3, T4 XFMR, 2:1 OPT

15 1 U1 IC, IF AMP., QFN24UF-4X4 LINEAR TECH., LTC6431IUF-15

dc1774acf

DEMO MANUAL DC1774A-C

Information furnished by Linear Technology Corporation is believed to be accurate and reliable.

However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-

tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.

SCHEMATIC DIAGRAM

D D

C C

B B

A A

1. ALL RESISTORS ARE IN OHMS,0402.

ALL CAPACITORS ARE 0402.

2. ALL DNC PINS ON U1 ARE FOR LINEAR USE ONLY.

NOTE: UNLESS OTHERWISE SPECIFIED

CAL IN

CAL OUT

GND

+5V

OPTIONAL CIRCUIT

-C OPT

100-300 MHz-A FREQ.

100-1200 MHz

400-1000 MHzLTC6430IUF-15

ASSY U1 ADT2-1T+

LTC6431IUF-15

T3, T4

-B ADTL2-18

0 OHM

OPT

R13,R14,R17,R18

OPT

R3, R4

0 OHM

OPT

LTC6430IUF-15 J8

STUFF

OPT

1008

+IN

-IN

+OUT

-OUT

J10

OPT

STUFF

OPT

560nH

OPTOPT

0.1uF

C23

0.1uF

C14,C15

1000pF, 0402 L2

OPT

OPT-C OPT

1000pF, 0603-A C5

1000pF, 06031000pF, 0402

ASSY C2,C4 62pF

OPT

-B 62pF

348

OPT

3481000pF, 0402 560nH

OPT

THIS IS A UNIVERSAL PCB, DESIGNED TO

ACCOMMODATE MULTIPLE VERSIONS OF THE IC.

REFER TO THE SIMPLIFIED SCHEMATIC IN FIGURE

3 OF THE DEMO MANUAL.

JOHN C.PRODUCTION2 08-03-12

REVISION HISTORY

DESCRIPTION DATEAPPROVEDECO REV

Tuesday, August 07, 2012

IF AMP/ADC DRIVER

KIM T.

JOHN C.

N/A

LTC643XIUF FAMILY

DEMO CIRCUIT 1774A

SIZE

DATE:

IC NO. REV.

SHEET OF

TITLE:

APPROVALS

PCBDES.

APPENG.

TECHNOLOGY

Fax: (408)434-0507

Milpitas, CA95035

Phone: (408)432-1900

1630 McCarthy Blvd.

LTC Confidential-For Customer Use Only

CUSTOMER NOTICE

LINEAR TECHNOLOGY HAS MADE A BEST EFFORT TO DESIGN A

CIRCUIT THAT MEETSCUSTOMER-SUPPLIED SPECIFICATIONS;

HOWEVER,ITREMAINSTHECUSTOMER'SRESPONSIBILITYTO

VERIFY PROPER ANDRELIABLEOPERATION IN THE ACTUAL

APPLICATION. COMPONENTSUBSTITUTIONANDPRINTED

CIRCUIT BOARD LAYOUT MAY SIGNIFICANTLYAFFECT CIRCUIT

PERFORMANCE OR RELIABILITY. CONTACT LINEAR

TECHNOLOGYAPPLICATIONSENGINEERINGFORASSISTANCE.

THIS CIRCUIT IS PROPRIETARY TO LINEARTECHNOLOGY AND

SCHEMATIC

SUPPLIEDFORUSEWITHLINEARTECHNOLOGYPARTS.

SCALE = NONE

www.linear.com

VCC

1000pF

SMA

348

C11

1000pF

C23

0.1uF

R19

OPT

560nH

C13

1000pF

R17

0603

C18

1000pF

JP2

HD2X4-100

1000pF

R14

0603

L11

OPT

C14

1000pF

SMA

OPT

R13

0603

62pF

JP3

HD2X4-100

C21

1000pF

J11

+5V

1000pF

348

C19

1000pF

L22

OPT

R18

0603

C16

1000pF

SMA

SEEBOM 6

62pF

C22

0.1uF

C17

1000pF

SMA

C10

62pF

0603

C12

62pF

C15

1000pF

348

SEEBOM

JP1

HD2X6-100

910

11 12

10 21

DNC

GND

DNC

+IN

DNC

GND

DNC DNC

DNC

GND

VCC

DNC

+OUT

T_DIODE

DNC

-IN

VCC

DNC

-OUT

DNC

GND

0603

1000pF

348

J18

GND

J10

SMA

1000pF

C20

1000pF

560nH

1000pF

dc1774acf

DEMO MANUAL DC1774A-C

Linear Technology Corporation

1630 McCarthy Blvd., Milpitas, CA 95035-7417

(408) 432-1900 ●FAX: (408) 434-0507 ●www.linear.com

LT 0912 • PRINTED IN USA

DEMONSTRATION BOARD IMPORTANT NOTICE

Linear Technology Corporation (LTC) provides the enclosed product(s) under the following AS IS conditions:

This demonstration board (DEMO BOARD) kit being sold or provided by Linear Technology is intended for use for ENGINEERING DEVELOPMENT

OR EVALUATION PURPOSES ONLY and is not provided by LTC for commercial use. As such, the DEMO BOARD herein may not be complete

in terms of required design-, marketing-, and/or manufacturing-related protective considerations, including but not limited to product safety

measures typically found in finished commercial goods. As a prototype, this product does not fall within the scope of the European Union

directive on electromagnetic compatibility and therefore may or may not meet the technical requirements of the directive, or other regulations.

If this evaluation kit does not meet the specifications recited in the DEMO BOARD manual the kit may be returned within 30 days from the date

of delivery for a full refund. THE FOREGOING WARRANTY IS THE EXCLUSIVE WARRANTY MADE BY THE SELLER TO BUYER AND IS IN LIEU

OF ALL OTHER WARRANTIES, EXPRESSED, IMPLIED, OR STATUTORY, INCLUDING ANY WARRANTY OF MERCHANTABILITY OR FITNESS

FOR ANY PARTICULAR PURPOSE. EXCEPT TO THE EXTENT OF THIS INDEMNITY, NEITHER PARTY SHALL BE LIABLE TO THE OTHER FOR

ANY INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES.

The user assumes all responsibility and liability for proper and safe handling of the goods. Further, the user releases LTC from all claims

arising from the handling or use of the goods. Due to the open construction of the product, it is the user’s responsibility to take any and all

appropriate precautions with regard to electrostatic discharge. Also be aware that the products herein may not be regulatory compliant or

agency certified (FCC, UL, CE, etc.).

No License is granted under any patent right or other intellectual property whatsoever. LTC assumes no liability for applications assistance,

customer product design, software performance, or infringement of patents or any other intellectual property rights of any kind.

LTC currently services a variety of customers for products around the world, and therefore this transaction is not exclusive.

Please read the DEMO BOARD manual prior to handling the product. Persons handling this product must have electronics training and

observe good laboratory practice standards. Common sense is encouraged.

This notice contains important safety information about temperatures and voltages. For further safety concerns, please contact a LTC applica-

tion engineer.

Mailing Address:

Linear Technology

1630 McCarthy Blvd.

Milpitas, CA 95035

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Linear Technology

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Beliebte Hauptplatine Handbücher anderer Marken

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ASROCK

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Asus

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Winmate

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Asus

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Grantech

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Telit Wireless Solutions

Telit Wireless Solutions SL869-3DR Bedienungsanleitung

Gigabyte

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Texas Instruments

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Commell

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IBT Technologies

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Nvidia

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Biostar

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Intel

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Asus

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EPC

EPC EPC9147C Bedienungsanleitung

Asus

Asus EX-B760M-V5 D4 Bedienungsanleitung

EPOX

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