Linear Technology DC2100A Kurzanleitung zur Einrichtung

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DEMO MANUAL DC2100A

Description

Bi-Directional Cell Balancer

Using the LTC3300-1 and the LTC6804-2

Demonstration Circuit DC2100A is a Bi-Directional Cell

Balancer using two LTC

3300-1 ICs to achieve active

balancing of up to 12 Li-Ion cells. The board uses a single

LTC6804-2 Multi-Cell Addressable Battery Stack Monitor

IC to measure cell voltages and two LTC3300-1 ICs to

provide active cell balancing. The DC2100A-C contains

a PIC18F47J53 microcontroller to communicate with the

LTC3300-1 and LTC6804-2 ICs, as well as an LTC6820

isoSPI Interface IC for communication with DC2100A-D

boards. Up to 7 DC2100A-D boards can be connected to

a DC2100A-C to build a stacked system of 8 total boards. L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks and

QuikEval is a trademark of Linear Technology Corporation. All other trademarks are the property

of their respective owners.

performance summary

Demo BoarD Description

A graphical user interface (GUI) uses a USB interface to

communicate with the DC2100A-C. The GUI controls the

LTC3300-1 ICs allowing manual control of the charging/

discharging of cells and reporting the voltage of each

cell. Cell balancing is achieved through the LTC3300-1

ICs by transferring charge from one or more cells per

LTC3300-1 to the stack or from the stack to one or more

cells per LTC3300-1.

Design files for this circuit board are available at

http://www.linear.com/demo/DC2100A

Specifications are at TA= 25°C

Cell Voltage Range 3.2V to 4.5V (2.5V to 4.5V)*

Stack Voltage 60V Max

Average Battery Balancing Charge Current (12 Cell) 4.0A (Typ)

Average Battery Balancing Discharge Current (12 Cell) 4.3A (Typ)

Average Battery Balancing Charge Current (6 Cell) 3.4A (Typ)

Average Battery Balancing Discharge Current (6 Cell) 4.0A (Typ)

Balancing Efficiency 90% (Typ)

DC2100A-C 12 Cell 4A Active Cell Balancer Controller Board

DC2100A-D 12 Cell 4A Active Cell Balancer Stacked Board

The Cell Voltage Range may be expanded to 2.5V to 4.5V by changing the resistors RTONS to 30.9kΩ and resistors RTONP to 47.5kΩ

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DEMO MANUAL DC2100A

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CELL VOLTAGE

2.6

75.0

EFFICIENCY (%)

95.0

90.0

85.0

80.0

100.0

3.2 3.4 3.6 3.8 4.02.8 3.0

12 CELLS

6 CELLS

CELL VOLTAGE

2.6

75.0

EFFICIENCY (%)

95.0

90.0

85.0

80.0

100.0

3.2 3.4 3.6 3.8 4.02.8 3.0

12 CELLS

6 CELLS

Discharge Efficiency Charge Efficiency

Cell Balancer Efficiency vs Cell Voltage

Thermal Image all Cells Active Balancing

The conditions for the Thermal Plot are:

Cell Voltages at 3.6V, Odd Numbered Cells Discharging, Even Numbered Cells Charging

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DEMO MANUAL DC2100A

Quick start proceDure

DC2100A-C Demo Board Photo

Figure 1. DC2100A-C Demo Board Size Equals 5.5" x 12.8"

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DEMO MANUAL DC2100A

operating principle

Quick start proceDure

TheDC2100AhasafivewindowGUI,picturedinFigure25.

The Control Panel is the primary window, which displays

information about the ICs in the stacked system, the state

of the cells on each DC2100A board, and allows manual

control of the balancing mode of the LTC3300-1. The Con-

trol Panel can spawn three more windows: a Calibration

Data window to calibrate cell and balancer characteristics,

an Error Log window to display logged errors, and a Graph

View window to graphically display characteristics of the

stacked system over time. The Graph View window also

spawn a Graph View Option window that controls the set-

tings of the Graph View window. The LTC3300-1 Active

Balancer is a power stage control IC. The LTC3300-1 does

nothaveabalanceralgorithmbuiltintoit.Thedetermination

of the balancing times and directions are performed at a

system level and conveyed to the LTC3300-1 through its

SPI interface. The LTC3300-1 only accepts cell charge or

discharge commands. Charge is transferred to/from a cell

from/to the stack, a series connection of adjacent cells,

through a flyback converter that is operating in boundary

mode. During discharge of a cell the current in the primary

of a coupled inductor transformer with a turns ratio of 1:2,

ramps up to 10A at which point the primary switch turns

off.Thechargein the primaryinductor is transferred to the

secondary inductor which is connected across the 12 cell

sub-stack.This sub-stackcurrentthenpassesthrough the

series connected cells thus distributing the charge equally

across each cell. When charging a cell, the current in the

secondary of the coupled inductor transformer ramps

up to 5.0A at which point the secondary switch turns off.

The charge in the secondary inductor is transferred to the

primary inductor which is connected across the cell. The

secondary current is drawn from the series connected

cells thus removing charge equally across each cell. The

efficiency through the fly-back converter is 90%.

The demonstration circuit is set up per Figure 31 to evalu-

ate the performance of the DC2100A-C Bi-Directional Cell

Balancer using the LTC3300-1.

Using short twisted pair leads for any power connections,

refer to Figure 31 for the proper measurement and equip-

ment setup. When installing the cells start with Cell 1 and

progress to Cell 12. Remove cells in the reverse order.

The DC2100A will support a system of 4 to 12 cells (See

Figures 31 and 34 to 41).

A4 bit board ID code is set by the A0 through A3 jump-

ers on the DC2100A-C must be set to 0000. The jumpers

on the DC2100A-D boards must be set to unique values

between 0001 and 1111.

To use the DC2100A, the PC must first have the proper

driver and software installed. To do this, download

the QuikEval™ software from Linear Technology, at

www.linear.com:

http://www.linear.com/designtools/software/quick_eval.

jsp

1) Install the QuikEval software by running the execut-

able ltcqev.exe. Follow the instructions to connect the

DC2100A.

If you fail to unplug the DC2100A, the DC2100A driver

will not install!

2) When installation of QuikEval is complete, close the

QuikEval program.

3) ReopenQuikEval.Ifproperlyinstalled,QuikEvalwillshow

the following message until the DC2100A is connected:

If not properly installed, QuikEval will be unable to connect

totheDC2100A.Pleaseretrythesoftwareinstallation,with

the DC2100A disconnected.

4) Now connect the DC2100A. The QuikEval software will

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DEMO MANUAL DC2100A

Quick start proceDure

recognize when the DC2100A demo board has been

found, and will offer to download and install the module

from the LTC website:

At this point, select OK.

5) The QuikEval software will now download and open the

software for the DC2100A.

6) Close QuikEval Software, as it is no longer needed for

the DC2100A.

When the DC2100A-C is connected to the PC, the PIC18

willbecomepowered.Thepoweredstatuswillbeindicated

through Green LED D15 flashing with a 1 second period.

When the GUI’s launched, it will begin communicating

with the PIC18 via USB. Proper USB communication will

beindicatedthroughOrange LED D16 lightingduringeach

USB transaction.

When the GUI connects to the DC2100A system, it will

display the boards attached in the Control Panel System

Tree View. The DC2100A GUI Control Panel is able to

display the data and controls for one board at a time.

When a board is selected in the System Tree View, all of

the Windows will begin to display the data and controls for

that board. The Selected Board Indicator in each window

will indicate which board is selected.

When the DC2100A is used with fewer than 12 cells, the

boardmustbeconfiguredintheGUIsothattheunpopulated

cellsarenotinterpretedasan

undervoltagecondition.When

a cell is red in the System Tree View, it has been specified

as unpopulated. To configure a DC2100A for fewer than

12 cells, right click the board in the System Tree View and

select the number of populated cells.

The DC2100A GUI periodically checks for OV and UV

measured on the cells when balancing. To avoid the

program from suspending balancing from a OV and UV

measurement during normal operation, the Max Cell Volt-

age and UV values must be entered in the VOV and Min

Cell Voltages text boxes tab shown in Figure 4.

Figure 2. Board Selection in System Tree View

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DEMO MANUAL DC2100A

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Figure 3. Turning off Cell 1 on Board 3

Figure 4. VOV and VUV Text Boxes

Figure 5. Voltage Display Controls

The cell voltages in the Control Panel can be configured

to stop updating automatically, and only be updated when

the Read Voltages button is clicked (as shown in Figure 5).

This provides the ability to freeze the data for a board at

any instant in time.

An alternative method of viewing the data is available by

pressing the Graph Data button, to open the Graph View

Window. The Graph View Window is detailed in Figure 30,

and allows data for each board and the stacked system to

be graphed over time. The graph data can be saved and

are reloaded later, and the View Options control allows

configuration of the Graph Display. The Stack Summary

provides graphed data for the entire system, where the

Board Summary, Cell Voltages, and Temperatures allow

data to be graphed for boards selected in the Tree View.

Up to 15 values may be graphed at one time, and the graph

is limited to 500 seconds of data.

The Global Channel Monitor tab switches the Control

Panel to a grid view in which all of the cell voltages can

be viewed at the same time. Disabled cells will be color

coded as grey, and cells selected in the System Tree View

will be highlighted in blue. Details of the Global Channel

Monitor View are provided in Figure 27.

SeveralcontrolsareavailableontheControlPanelCellTab

for issuing balancing commands to the selected board.

In the Balance Mode Select Boxes, you can manually

select which cells are to be discharged by clicking the

cell’s DISCHARGE button, which cells are to be charged

by clicking the cell’s CHARGE button.

Note that if a cell is disabled, the balance mode select

box will not be selected and the cell pictured will be grey.

Balancing and overvoltage conditions are also indicated

by color, according to the Cell State Color Key.

Figure 6. Balance Mode Select Boxes

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DEMO MANUAL DC2100A

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Figure 7. Manual Balance Control

Figure 8. LTC3300-1 Register Display

Once the balance modes are selected, they are not im-

mediately written to the LTC3300-1 ICs. Tw o methods

are available for writing the balance modes: Manual and

TimedBalanceControl. When theManualBalancemethod

is selected, the Write Command button will cause the GUI

to write the balance modes to the selected board.

Once the balance mode commands are written to the

LTC3300-1 ICs, balancing will not begin until the Execute

button has been pressed to command the balancing to

begin. The Execute button will cause all of the attached

boards to begin balancing. This allows each board to have

its balancing commands set up when selected in the Sys-

tem Tree View, and to then have all of the balancers turned

on together. To disable any cell from balancing, the cell’s

NONE button must be clicked in the Balance Mode Select

Box followed by clicking the Write Command button and

finally the Execute button. Each time the Execute button

is pressed, the Read Command and Read Status registers

will be updated for the selected board (see Figure 8).

When the Timed Balance method of balance control is

selected, the GUI allows the user to program the balancer

to charge or discharge each cell for a specific amount of

time. The LTC3300-1 is a power stage control IC. The

determination of the balancing times and directions are

done at the System level and conveyed to the LTC3300-1

through its SPI communications port. In order to perform

a timed balance, the TIMED BALANCE check shown in

Figure 9 must be selected to have access to the timed bal-

ance controls as shown in the Balance Mode Select Boxes.

Figure 9. Timed Balance Control

To usetheTimedBalancemethodofbalancecontrol,select

the DISCHARGE, CHARGE, or NONE button for each cell

andthenenterthetimeinsecondsintothecells“BALANCE

TIME” text box. Press the Write button to write the bal-

ance commands and times into the selected board. Select

another board from the System Tree View and repeat until

the balance settings have been loaded into each DC2100A

board. Press the Start button to begin the timed balance

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DEMO MANUAL DC2100A

Quick start proceDure

Figure 10. Timed Balancing

for all of the boards in the stacked system. The balance

times will then begin to count down as the balancing is

performed, and the LTC3300-1 Register Display will be

continuously updated. The NEXT STOP TIME field will

display the earliest time that one of the cells will complete

balancing, and the board on which that cell resides. When

the NEXT STOP TIME arrives, the balance mode for that

cell will change to NONE and a new cell will display for the

NEXT STOP TIME. The TIME REMAINING will display the

total time remaining in the timed balancing, after which

all of the cells will have NONE for their balancing mode.

While balancing is active, the Start button (see Figure 10)

will change to Stop, in case the user wishes to pause the

balancing operation. Selecting the Reset button will reset

all of the balance timers to 0 and all of the cell balance

modes to NONE.

The user can load and store several timed balance profiles

in the Board Configuration control (see Figure 11). The

Demo button in this control will load a pattern of charging

and discharging cells. The user can also recall any bal-

ance configuration and reload it later. The configuration

will also save the over and undervoltage settings, as well

as the disabled cell configuration.

In addition to the Graph View of the data, the DC2100A

system can be monitored over a long period of time with

the results written to a CSV file. The logging interval and

length can be configured, but note that the size of the

data files can grow quite large for stacked systems with

manyboards.The projectedmemorysizewillbe displayed

before the user begins logging by pressing the Start Data

Log button. Once the button is pressed, the user will be

prompted to enter a data file name and location, and the

logging will begin.

Figure 11. Board Configuration Control

Although each DC2100A will balance with currents simi-

lar to those listed in Table 1, each board was tested upon

manufacture and its actual balancing currents are stored

within the DC2100A. These currents can be accessed by

pressing the Calibration Data button on the Control Panel,

which will then launch the Calibration Data window (see

Figure 28). In this window the user has the ability to enter

new calibration current values, or reset the currents to the

Figure 12. Data Log Control

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DEMO MANUAL DC2100A

Quick start proceDure

values from Table 1. It is not recommended to change

these, however, from the factory measured settings. The

capacity of each cell can also be stored in the DC2100A.

The capacity and balance currents will be used in a later

release of firmware for the DC2100A-C, which will employ

an autonomous balancing algorithm.

TheDC2100AGUIinstalledwiththeQuikEvalsoftware,will

always contain the most up to date version of Firmware

for the DC2100A. In order to update the firmware, press

the Update Firmware button in the Control Panel.

Cell Balancer Efficiency Measurements

Figure 32 shows the proper connections for measuring

the efficiency of a cell balancer. The secondary of the cell

balancer connects to the top of stack. This connection

needs to be to an isolated power source through a cur-

rent sensing resistor (0.10Ω). Cells 1 through 6 are

Figure 13. Update Firmware Button

Figure 14. Firmware Update Window

After confirming that the Firmware should be updated, a

commandlinewindow willbelaunched in whichthePIC18

ontheDC2100Aisfirsterased,andthenreprogrammed.Do

not remove power from the DC2100A while the Firmware

is being updated.

connected to the BOT6_TS turret with its return path the

V- turret while Cells 7 through 12 are connected to the

TOP6_TS turret with its return path the C6 turret. These

isolated power sources simulate a stack of cells from 3

to 12 cells. The primary side connection of the cell bal-

ancers are connected to a string of power sources that

simulate the battery stack. Cell 1 power source is a two

wire connection that connects the positive node, through

a current sensing resistor (0.01Ω), to the C1 turret, and

the negative node to the V- turret. Remote sense connec-

tions for power sources with remote sensing capabilities

shouldbeconnectedtotheC1andV-respectively.Allother

connections of the simulated string of cells connect their

positivenode,throughacurrent sensing resistor (0.01Ω),

torespectiveturrets.Cellvoltagemeasurementsshouldbe

made across the C(x) and C(x-1) turrets of the respective

cells. Stack voltage measurements should be made at the

BOT6_TSandTOP6_TSturretsandtheirreturnpathturret.

To calculate cell balancer efficiency use the expressions

below:

Cells 1-6

Charge Mode

Efficiency1=

•Vm

•10

Vm3•Vm4

•100%

Discharge Mode

Efficiency1=

•Vm

•10 •100%

Cells 7-12

Charge Mode

Efficiency11 =

•Vm

•10

•Vm

•100%

Discharge Mode

Efficiency11 =

•Vm

•10 •100%

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DEMO MANUAL DC2100A

Quick start proceDure

Figure 15. 12 Cell Discharge Waveforms

Figure 16. 12 Cell Charge Waveforms

Figure 17. 6 Cell Discharge Waveforms

Cell Balancer Performance Measurements

Table 2 through Table 5 present the typical operational

data for a 12 cell and 6 cell balancer in both Discharge and

Charge modes. The cell voltages were 3.6V and measure-

mentsofCellCurrent,StackCurrent,OperatingFrequency

were taken and transfer Efficiency was calculated from

the data. Figure 15 through Figure 18 are actual in-circuit

waveforms taken on Cell 1 and Cell 7 while operating in

both modes. The waveforms present voltage on the pri-

mary side and secondary side MOSFET’s drain to source

voltage and the primary side and secondary side current

sense inputs to the LTC3300-1.

Figure 14 through Figure 22 are cell and stack currents

taken over a range of cell voltages from 2.6V to 4.0V. The

RTONP and RTONS resistors were set for 2.6V cell voltage

operation. All cells were set to the cell voltage under test.

The slight negative slope in current at higher voltages is

due to the increased operating frequency and the circuit

delays and dead time becoming a higher percentage of

the operating period.

Table 2. Typical 12 Cell Discharge Data

Cell I (A) Stack I

(A)

Frequency

(KHz)

Efficiency

4.250 0.311 95.7 87.9%

Table 3. Typical 12 Cell Charge Data

Cell I (A) Stack I

(A)

Frequency

(KHz)

Efficiency

3.960 0.367 106.6 89.7%

Table 4. Typical 6 Cell Discharge Data

Cell I (A) Stack I

(A)

Frequency

(KHz)

Efficiency

4.000 0.577 88.6 88.4%

Inhaltsverzeichnis

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