Linear Technology DC2226A Kurzanleitung zur Einrichtung

dc2226Afa

DEMO MANUAL DC2226A

DESCRIPTION

LTC6951

Multichannel JESD204B ADC

with Clocking

Demonstration Circuit 2226A-A is a reference design

for a four-channel, 250Msps ADC system consist-

ing of two LT C

2123, dual 14-bit 250Msps ADCs and

a JESD204B Subclass 1 clocking solution based on

the LTC6951 Clock Synthesizer with Integrated VCO.

Other dash options reserved for future use. No external

clock source is required to operate the board;however,

the onboard 100MHz reference oscillator may be by-

passed, allowing synchronization to other equipment.

L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks and

ParallelSync and PScope are trademarks of Linear Technology Corporation. All other trademarks

are the property of their respective owners.

Figure 1 is a block diagram of the DC2226A clock con-

figuration, consisting of two LTC6951s in a JESD204B

subclass 1, ParallelSync™configuration. More detailed

information is available on the LTC6951 product page.

Design files for this circuit board are available at

http://www.linear.com/demo/DC2226A

10k

LTC6951#2

U10

V+VCP+WCO+

TUNE

OUT4+

OUT4–125MHz, FPGA CLOCK

15.625MHz, ADC2 SYSREF

2GHz, MUTED

250MHz, ADC2 CLOCK

PWRDN

OUT3+

OUT3–

OUT0+

OUT0–

OUT1+

OUT1–

OUT2+

OUT2–

1nF

56.2Ω

BVCO

1µF

REF–

CMA

CMB

CMC

1µF

100Ω

REF+

SYNC

1µF

470nF

1.5nF

68nF

10Ω 5V3.3V

LTC6951#1

U13

V+VCP+WCO+

TUNE

OUT4+

OUT4–15.625MHz, FPGA SYSREF

15.625MHz, ADC1 SYSREF

2GHz, MUTED

250MHz, ADC1 CLOCK

PWRDN

DC2226 F01

OUT3+

OUT3–

OUT0+

OUT0–

OUT1+

OUT1–

OUT2+

OUT2–

1nF

56.2Ω

BVCO

1µF

REF–

CMA

CMB

CMC

1µF

100Ω

REF+

SYNC

1µF

470nF

1.5nF

68nF

10Ω 5V3.3V

SYNC

PULSE

LTC6951

REF INPUT

LTC6951

SYNC PULSE SYNC TO REF TIMING

SYNC HELD HIGH A

MINIMUM OF 1ms

LTC6954-4

REFERENCE DISTRIBUTION

IN+

IN–

OUT0SEL

OUT1SEL

OUT2SEL

1µF

100MHz

REFERENCE

50Ω

1µF

D Q

OUT0+

OUT0–

OUT1+

OUT1–

OUT2+

OUT2–

1µF

10k

VCC

Figure 1. Subclass 1 ParallelSync Design Example

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dc2226Afa

DEMO MANUAL DC2226

QUICK START PROCEDURE

1) Install PScope™from http://www.linear.com/solu-

tions/PScope. This step will also install the USB

drivers required to communicate with the DC2226A

demo system. Quit PScope after the installation is

finished. Note that PScope does not directly support

the DC2226A demo system, however the Matlab and

Python scripts can export data filesthat may be opened

in PScope for analysis.

2) Install LinearLabTools from http://www.linear.com/

solutions/linearlabtools,following theprocedure forei-

ther Matlab orPython. Both Matlaband Python codefor

DC2226A are included in the \matlab\DemoBoardEx-

amples\LTC2123and\python\demo_board_examples\

ltc2123 directories, respectively. The main scripts run

through a series of tests, concluding with capturing

data from all four channels and displaying time and

frequency domain plots.

3) Do NOT plug the USB cable into the DC2159 FMC

Communication Interface board before powering up

the KC705 board.

4) Refer to Figure 2. Power up the KC705 board using

the adapter supplied with the KC705. If the board

was obtained from Linear Technology as part of a

kit, the correct bitfile was installed into the onboard

configuration PROM.

5) If necessary, load the .bit file (included in the design

files PDF subdirectory) into the KC705 board using

the appropriate Xilinx tool (Impact, Vivado, or Vivado

lab). Alternatively, create a .mcs file from the bitfile

and load into the onboard configuration PROM. (See

KC705 documentation for details.)

6) Connect the DC2159 FMC board to the host PC with

a USB-A/Mini-B cable.

7) Apply 6V and 3V to the turret posts as shown in

Figure2. Both supplies should be low-noise benchtop

supplies, with current limit set to 2A.

8) Apply analog input signals to J2, J3, J4, J5. The

DC2226A is populated with an input network that has

50Ω characteristic impedance over a wide frequency

range, refer to LTC2123 data sheet for details. A

70MHz, 1.5VP-P sine wave is a good starting point

for testing DC2226A. If an RF generator is used, it

should be followed by a bandpass filter to limit noise

and harmonics. Alternatively, DC1164 High Speed

ADC Signal Source may be used.

9) Run the appropriate test script (Ltc2123Dc2226Du-

alClockingSolution.m for Matlab, ltc2123_dc2226_

dual_clocking_solution.py for Python). Plots similar

to Figures 3 and 4 should appear. At this point, data is

stored in program variables for further manipulation

and testing.

10) The default test scripts set the ADC sample rate to

250MSPS, with a SYSREF frequency of 15.625MHz

(JESD204B K=16). Design examples on the LTC6951

product page detail the process for changing clock

frequencies.

Downloaded from Arrow.com.Downloaded from Arrow.com.

dc2226Afa

DEMO MANUAL DC2226A

QUICK START PROCEDURE

+6V

+3V

ANALOG

INPUTS

GROUND

DC2226 F02

USB TO

HOST PC

12V FROM ADAPTER

SUPPLIED WITH KC705

Figure 2. Basic Connections

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dc2226Afa

DEMO MANUAL DC2226

QUICK START PROCEDURE

Figure 3. Example Time Domain Plot

Figure 4. Example Frequency Domain Plot

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dc2226Afa

DEMO MANUAL DC2226A

Information furnished by Linear Technology Corporation is believed to be accurate and reliable.

However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-

tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.

HARDWARE SETUP

DC2226A Power Connections

E14: +6V Power Input. Connect to a low-noise supply set

to a current limit of 2A.

E12: +3V Power Input. Connect to a low-noise supply set

to a current limit of 2A.

E1, E9: GND - Ground connections for power supplies.

E5, E8: 1.8V test points. Measure 1.8V supply voltages

at these points. (Measurement only, do not apply power.)

E4, E6, E11: 3V3_1, 3V3_2, 3V3_3 test points. Measure

3.3V supply voltages at these points. (Measurement only,

do not apply power.)

E7, E13: 5V_1, 5V_2 test points. Measure 5V supply

voltages at these points. (Measurement only, do not ap-

ply power.)

DC2226A Signal Connections

J2, J3: Analog inputs for U1, 50Ω impedance. Maximum

signal level is 1.5VP-P.

J4, J5: Analog inputs for U3, 50Ω impedance. Maximum

signal level is 1.5VP-P.

J1:External Reference ClockInput. Not connected,requires

component changes, refer to schematic.

J6: FMC HPC interface to FPGA carrier board.

APPENDIX A

Xilinx KC705 Based Evaluation System

The DC2226A system consists of the DC2226A itself,

a Xilinx KC705 FPGA evaluation board, a DC2159 USB

communication board, and a host PC running the various

test programs. Complete systems that ship from Linear

Technology will have the KC705 board configured to

automatically load the default FPGA image for DC2226A

from the onboard configuration EEPROM. The procedure

for bringing up the system is as follows:

1) If the boards were obtained separately, assemble them

as shown in Figure 1 (FMC connectors are fragile,

make sure they are properly aligned before seating.)

2) Connect power supply to the KC705 board and turn

on the power switch. If the assembled system was

obtained from Linear Technology, the FPGA bitstream

will load automatically from the onboard configuration

memory.

3) Boards not obtained from Linear Technology will need

to be configured as described in the Alternate FPGA

Configuration section.

4) Apply power and analog input signals to the DC2226A

board.

5) Verify that PScope software is installed. Connect

DC2159 to the host PC with a USB-mini cable. Driver

installation will start automatically and PScope will

recognize the system when installation finishes. Quit

PScope and run Matlab/Python test scripts.

Note: Power must be applied to the KC705 board when

the USB cable is connected or the driver installation will

not complete properly.

Alternate FPGA Configuration

KC705 boards not obtained from Linear Technology will

need to be configured via JTAG. FPGA images are located

in the PScope installation directory in the FPGA_images

folder. Connect a USB micro cable to the JTAG USB con-

nector on the KC705 board and use a Xilinx tool such as

Impact or Vivado Lab Edition to load the bitfile. Once the

FPGA is configured, remove the USB cable and exit the

software. (The onboard JTAG adapter and the DC2159

USB communication board use the same USB controller

and they may interfere with one another.)

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dc2226Afa

DEMO MANUAL DC2226

Linear Technology Corporation

1630 McCarthy Blvd., Milpitas, CA 95035-7417

(408) 432-1900 ●FAX: (408) 434-0507 ●www.linear.com

LT 1216 REV A • PRINTED IN USA

DEMONSTRATION BOARD IMPORTANT NOTICE

Linear Technology Corporation (LTC) provides the enclosed product(s) under the following AS IS conditions:

This demonstration board (DEMO BOARD) kit being sold or provided by Linear Technology is intended for use for ENGINEERING DEVELOPMENT

OR EVALUATION PURPOSES ONLY and is not provided by LTC for commercial use. As such, the DEMO BOARD herein may not be complete

in terms of required design-, marketing-, and/or manufacturing-related protective considerations, including but not limited to product safety

measures typically found in finished commercial goods. As a prototype, this product does not fall within the scope of the European Union

directive on electromagnetic compatibility and therefore may or may not meet the technical requirements of the directive, or other regulations.

If this evaluation kit does not meet the specifications recited in the DEMO BOARD manual the kit may be returned within 30 days from the date

of delivery for a full refund. THE FOREGOING WARRANTY IS THE EXCLUSIVE WARRANTY MADE BY THE SELLER TO BUYER AND IS IN LIEU

OF ALL OTHER WARRANTIES, EXPRESSED, IMPLIED, OR STATUTORY, INCLUDING ANY WARRANTY OF MERCHANTABILITY OR FITNESS

FOR ANY PARTICULAR PURPOSE. EXCEPT TO THE EXTENT OF THIS INDEMNITY, NEITHER PARTY SHALL BE LIABLE TO THE OTHER FOR

ANY INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES.

The user assumes all responsibility and liability for proper and safe handling of the goods. Further, the user releases LTC from all claims

arising from the handling or use of the goods. Due to the open construction of the product, it is the user’s responsibility to take any and all

appropriate precautions with regard to electrostatic discharge. Also be aware that the products herein may not be regulatory compliant or

agency certified (FCC, UL, CE, etc.).

No License is granted under any patent right or other intellectual property whatsoever. LTC assumes no liability for applications assistance,

customer product design, software performance, or infringement of patents or any other intellectual property rights of any kind.

LTC currently services a variety of customers for products around the world, and therefore this transaction is not exclusive.

Please read the DEMO BOARD manual prior to handling the product. Persons handling this product must have electronics training and

observe good laboratory practice standards. Common sense is encouraged.

This notice contains important safety information about temperatures and voltages. For further safety concerns, please contact a LTC application

engineer.

Mailing Address:

Linear Technology

1630 McCarthy Blvd.

Milpitas, CA 95035

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