Mitsubishi Q Series Bedienungsanleitung

Basic Model QCPU(Q Mode) User's Manual (Function Explanation, Program Fundamentals)

User's Manual (Function Explanation, Program Fundamentals) User's Manual

Mitsubishi Programmable

Logic Controller

Specifications subject to change without notice.

MODEL

CODE

SQCPU(Q)-U-KI-E

13JR44

SH(NA)-080188-A(0108)MEE

Basic Model QCPU(Q Mode)

(Function Explanation,

Program Fundamentals)

When exported from Japan, this manual does not require application to the

Ministry of Economy, Trade and Industry for service transaction permission.

HEAD OFFICE : 1-8-12, OFFICE TOWER Z 14F HARUMI CHUO-KU 104-6212,JAPAN

NAGOYA WORKS : 1-14 , YADA-MINAMI 5 , HIGASHI-KU, NAGOYA , JAPAN

1 - 2 1 - 2

MELSEC-Q

1 OVERVIEW

The following table indicates differences between the Basic model QCPU.

Item Q00JCPU Q00CPU Q01CPU

CPU module CPU module, Power supply

module, Main base unit

(5 slots) Integrated type Stand-alone CPU module

Main base unit Unnecessary Necessary (Q33B, Q35B, Q38B, Q312B)

Extension base unit Connectable (Q52B, Q55B, Q63B, Q65B, Q68B, Q612B)

Number of extension stages Up to 2 stages Up to 4 stages

Number of input/output modules to be

installed 16 modules 24 modules

Power supply module

Main base unit Unnecessary Necessary (Q61P-A1, Q61P-A2, Q62P, Q63P)

Q52B, Q55B Unnecessary

Extension

base unit Q63B, Q65B, Q68B, Q612B Necessary (Q61P-A1, Q61P-A2, Q62P, Q63P)

Extension cable QC05B, QC06B, QC12B, QC30B, QC50B, QC100B

Memory card interface No

RS-232 Yes (transmission rate: 9.6kbps, 19.2kbps, 38.4kbps, 57.6kbps, 115.2 kbps)

External interface USB No

LD X0 0.20µs 0.16µs 0.10µs

Processing speed

(Sequence instruction) MOV D0 D1 0.70µs 0.56µs 0.35µs

Program capacity 8k steps (32 kbyte) 8k steps (32 kbyte) 14k steps (56 kbyte)

Program memory 58 kbyte 94 kbyte

Standard RAM —— 64 kbyte

Memory

capacity Standard ROM 58 kbyte 94 kbyte

Device memory capacity The numberof device points can be changed within the range of 16.4 kbyte

Number of input/output devices points

(Remote I/O is contained.) 2048 points

Number of input/output points 256 points 1024 points

File register No Yes (32k points fixed)

Serial communication function No Yes

(using the RS-232 interface of the CPU module)

: 1 step of the program capacity is 4 Bytes.

1 - 3 1 - 3

MELSEC-Q

1 OVERVIEW

1.1 Features

(1) Many controllable input/output points

As the number of input/output points accessible to the input/output modules

loaded on the base units, 256 points (X/Y0 to FF) are supported by the

Q00JCPU and 1024 points (X/Y0 to 3FF) by the Q00CPU/Q01CPU.

Up to 2048 points (X/Y0 to 7FF) are supported as the number of input/output

device points usable for refreshing the remote input/output of CC-Link and the

link inputs and outputs (LX, LY) of MELSECNET/H.

(2) Lineup according to program capacity

The optimum CPU module for the program capacity to be used can be selected.

Q00JCPU, Q00CPU : 8k steps

Q01CPU : 14k steps

(3) Fast processing

The LD instruction processing speeds are the following values.

Q00JCPU : 0.20µs

Q00CPU : 0.16µs

Q01CPU : 0.10µs

In addition, the high-speed system bus of the MELSEC-Q series base unit

speeds up access to an intelligent function module and the link refresh of a

network.

MELSECNET/H link refresh processing : 2.2ms/2k words 1

*1 This speed only applies when the SB/SW is not used with the Q01CPU and

the MELSECNET/H network module is used as the main base unit.

(4) Increase in debugging efficiency through high-speed

communication with GX Developer

The RS-232 interface of the Basic model QCPU enables program write/read or

monitor at a maximum of 115.2kbps.

(5) Saved space by a reduction in size

The installation area of the Basic model QCPU is about 60% of that of the AnS

series.

1SX10 1SY50 1SX41 1SY41 1SX81 1SY81 1SX42 1SY42

8mm

(3.86

inch)

5 Slot Main Base Unit 245mm(9.65inch)

8 Slot Main Base Unit 328mm(12.92inch)

12 Slot Main Base Unit 439mm(17.30inch)

(depth:98mm(3.86inch))

Comparison of installation space

1 - 4 1 - 4

MELSEC-Q

1 OVERVIEW

(6) Connection of up to four/two extension base units

(a) The Q00JCPU can connect up to two extension base units (three base units

including the main) and accepts up to 16 modules.

(b) The Q00/Q01CPU can connect up to four extension base units (five base

units including the main) and accepts up to 24 modules.

degree of extension base unit arrangement.

POINT

When bus-connecting the GOT, the number of extension base units connected

decreases by one since the GOT uses one stage of the above base units.

(7) Serial communication function for communication with personal

computer or display device

With the RS-232 interface of the Q00CPU or Q01CPU connected with a personal

computer, display device or the like, the MELSEC communication protocol

(hereafter refered to as the MC protocol) can be used to make communication.

RS-232 cable

Communication in

MC protocol

Personal computer,

display device

The serial communication function only allows communication in the MC protocol

(QnA-compatible 3C frame (format 4), QnA-compatible 4C frame (format 4, 5)).

The serial communication function does not allow communication in the

nonprocedure protocol or bidirectional protocol.

Refer to the following manual for the MC protocol.

• Q Corresponding MELSEC Communication Protocol Reference Manual

(8) Built-in standard ROM

The flash ROM for storing parameters and sequential program is installed as a

standard feature for easier protection of important program.

(9) Easy operation of CC-Link system

The I/O signals for up to 32 remote I/O stations can be controlled without

parameters when one master module of the CC-Link system is used.

The remote I/O stations can be controlled in a similar manner to controlling the

input/output modules installed on the base unit.

(10) Blocking an invalid access using the file password

Program can be prevented from being altered through invalid access by

presetting the access level (reading prohibited, writing prohibited) in the file

password.

1 - 5 1 - 5

MELSEC-Q

1 OVERVIEW

1.2 Program Storage and Calculation

(1) Program storage

Program created at GX Developer can be stored in Basic model QCPU's

program memory or standard ROM.

Q00JCPU Q00/Q01CPU

Program memory

Program

Comment

Standard ROM 1

Parameters 3

Program

Comment

Standard RAM 2

File registers

Parameters 3 Program memory

Program

Comment

Parameters 3

Standard ROM 1

Parameters 3

Program

Comment

1: The standard ROM is used when parameters, program and comment

are written to ROM.

2: The standard RAM is used for file registers.

3: Including the intelligent parameters of the intelligent function module

set on GX Configurator.

(2) The Basic model QCPU processes program which are stored in the

program memory.

Program memory Execution of program

in program memory

Q00J/Q00/Q01CPU

Parameter

Program

1 - 6 1 - 6

MELSEC-Q

1 OVERVIEW

(3) Boot operation of program

The program stored on the standard ROM is booted (read) to the program

memory of the Basic model QCPU and executed.

Booting a program from the standard ROM to the program memory requires boot

file setting in the PLC parameter.

Boot

Execution of program booted

from the standard ROM to

the program memory.

Basic model QCPU

Program memory

Parameter

Program

Standard ROM

Parameter

Program

1 - 7 1 - 7

MELSEC-Q

1 OVERVIEW

1.3 Convenient Programming Devices and Instructions

The Q00J/Q00/A01CPU features devices and instructions which facilitate program

creation. A few of these are described below.

(1) Flexible device designation

(a) Word device bits can be designated to serve as contacts or coils.

Switches b10

of D0 ON and

OFF (1/0).

The 1/0 status

of b5 of D0 is used

as ON/OFF data.

b13

D0 b14b15 b12b11b10

1/0 b9 b8 b7 b6 b5

1/0 b4 b3 b2 b1 b0

[For the case of Basic model QCPU]

X0 D0.A

[For the case of AnS]

X0 K4M0

D0MOV

K4M0MOV

M5 M10

: D0.5 Bit designation

Word device designation

Bit designation of

word device

D0.5

(b) Direct processing in 1-point units is possible within a program simply by

using direct access inputs (DX ) and direct access outputs (DY ).

Output tooutput

module at

instructionexecution

[For the case of Basic model QCPU]

M0 DX10 DY100

[For the case of AnS]

M9036 K1B0

K1B0

K1X10

SEG

K1Y100SEG

X10 Y100

M9036 M9052SET

M9036

(X10 to X13 refresh)

(Y100 to Y103 refresh)

(Always ON)

Read from input

module at

instruction

execution

Direct access input

pulses.

ON at leading

edge of X0

[For the case of Basic model QCPU]

X0 X1 Y100

[For the case of AnS]

X0 M0PLS

Y100

Differential contact

1 - 8 1 - 8

MELSEC-Q

1 OVERVIEW

(d) The buffer memory of intelligent function module (e.g. Q64AD, Q62DA) can

be used in the same way as devices when programming.

Readout of Q64AD

buffer memory's

address 12 data

[For the case of Basic model QCPU]

[For the case of AnS]

X0 K1D10K12H4

FROMP

D0D10

U4\G12

:U4\G12 Buffer memory address

designation

Intelligent function

module designation

Input/output Nos.:X/Y40 to X/Y4f

Power supply module

Q00CPU

Input (16 points)

Q64AD (16 points)

Q62AD (16 points)

Output (16 points)

(e) Direct access to link devices (LX, LY, LB, LW, LSB, LSW) of

MELSECNET/H network modules (e.g. QJ71LP21-25) is possible without

refresh settings.

Direct readout of the No.5 network module's

"LW12" link register

X0 D0

J5\W12

Network No.5

:J5\W12 Link register designation

Network No. designation

Power supply module

Q00CPU

QJ71LP21-25

Input (16 points)

Q68AD (16 points)

Q62AD (16 points)

Output (16 points)

(f) If index-qualified, each instruction of the Basic model QCPU does not

increase in processing time, facilitating writing of a structured program.

1 - 9 1 - 9

MELSEC-Q

1 OVERVIEW

(2) Edge relays simplify pulse conversion processing

(a) The use of a relay (V) that comes ON at the leading edge of the input

condition simplifies pulse processing when a contact index qualification has

been made.

X0Z1 V0Z1 M0Z1

K1000FOR

Z1RST

Z1INC

M1000

[Circuit example]

Reset index register (Z1)

Repetition (1000 times) designation

Pulsing M0 to M999

Increment Index Register (Z1) (+1)

Return to FOR instruction

When Z1=0

X0 OFF

V0 OFF

M0 OFF

1 Scan

[Timing chart]

When Z1=1

X1 OFF

V1 OFF

M1 OFF

1 Scan

REMARK

: NUL indicates "00H(character string END)".

Data processing instructions such as table processing instructions, etc., enable

high-speed processing of large amounts of data.

X0 K2R0D0FINSP

Insertion

source R0 FIF0 table

Insertion

designationInsertion position R0 FIF0 table

30R4

D0 15

Instruction for data insertion at table

1 - 10 1 - 10

MELSEC-Q

1 OVERVIEW

(4) Easy shared use of sub-routine programs

Subroutine call instructions with arguments will make it easier to create a

subroutine programs that makes several calls.

Argument designation

M10

100

M0 R0K4X00W0P0CALLP

R10K4X10W10P0CALLP

Argument from FD2

Argument to FD1

Argument to FD0

Argument from FD2

Argument to FD1

Argument to FD0

Argument designation

Subroutine program

designation

FEND

Sub-routine program

FD2FD1MOV

SM400 FD2FD0MOV

RET

P0 Always

source data Destination data

END

Main routine program

REMARK

For details regarding the argument input/output condition, refer to Section 10.3.1.

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