National Instruments R Series Bedienungsanleitung

USER MANUAL

NI PXIe-7865

R Series Reconfigurable I/O Module (AI, AO, TTL-compatible DIO) for

PXI Express, 2 AI, 24 AO, 32 TTL-compatible DIO, 1 MS/s AIO,

512 MB DRAM, Kintex-7 160T FPGA

This document provides compliance, pinout, connectivity, mounting, and power information

for the NI PXIe-7865.

Hardware Overview

The following high-level block diagram represents the NI PXIe-7865.

Figure 1. NI PXIe-7865 Block Diagram

Device

Temperature

NI ASIC

Flash

Memory

DIO

CONNECTOR 0

(RAIO)

CONNECTOR 1

(RDIO)

Data/

Address/

Control

Overvoltage

Protection

+5 V

Reference

AO (x24)

DAC

ADC AI

AI (x2)

INA

DIO (x32)

DDR3 RAM 100 MHz

OSC

Overvoltage

Protection

Overvoltage

Protection

NI PXIe-7865

CONNECTOR 2

(RAO)

Overvoltage

Protection

(x8)

(x16)

PXIe Connector

Kintex-7

FPGA

Bus

Switch

Pinout

AO15

AO14

AO13

AO12

AO11

AO10

AO9

AO8

AOCH23

AOCH22

AOCH21

AOCH20

AOCH19

AOCH18

AOCH17

AOCH16

AOGND15

AOGND14

AOGND13

AOGND12

AOGND11

AOGND10

AOGND9

AOGND8

AOGND23

AOGND22

AOGND21

AOGND20

AOGND19

AOGND18

AOGND17

AOGND16

68 34

67 33

66 32

65 31

64 30

63 29

62 28

61 27

60 26

59 25

58 24

57 23

56 22

55 21

54 20

53 19

52 18

51 17

50 16

49 15

48 14

47 13

46 12

45 11

44 10

43 9

42 8

41 7

40 6

39 5

38 4

37 3

36 2

35 1

CONNECTOR 2

(RAO)

TERMINAL 68

TERMINAL 34 TERMINAL 1

TERMINAL 35

+5V

AO7

AO6

AO5

AO4

AO3

AO2

AO1

AO0

AISENSE

GND

AI1+

AIGND0

AI0+

+5V

GND

AOGND7

AOGND6

AOGND5

AOGND4

AOGND3

AOGND2

AOGND1

AOGND0

GND

AI1–

AIGND1

AI0–

68 34

67 33

66 32

65 31

64 30

63 29

62 28

61 27

60 26

59 25

58 24

57 23

56 22

55 21

54 20

53 19

52 18

51 17

50 16

49 15

48 14

47 13

46 12

45 11

44 10

43 9

42 8

41 7

40 6

39 5

38 4

37 3

36 2

35 1

CONNECTOR 0

(RAIO)

TERMINAL 34 TERMINAL 1

TERMINAL 35

TERMINAL 68

DIO30

GND

DIO28

GND

DIO26

GND

DIO24

GND

DIO22

GND

DIO20

GND

DIO18

GND

DIO16

GND

DIO14

GND

DIO12

GND

DIO10

GND

DIO8

GND

DIO6

GND

DIO4

GND

DIO2

GND

DIO0

GND

EXTCLKIN

GND

DIO31

DIO29

GND

DIO25

GND

DIO23

GND

DIO27

GND

DIO21

GND

DIO19

GND

DIO17

GND

DIO15

GND

DIO13

GND

DIO11

GND

DIO9

GND

DIO7

GND

DIO5

GND

DIO3

GND

DIO1

GND

68 34

67 33

66 32

65 31

64 30

63 29

62 28

61 27

60 26

59 25

58 24

57 23

56 22

55 21

54 20

53 19

52 18

51 17

50 16

49 15

48 14

47 13

46 12

45 11

44 10

43 9

42 8

41 7

40 6

39 5

38 4

37 3

36 2

35 1

CONNECTOR 1

(RDIO)

TERMINAL 68

TERMINAL 34 TERMINAL 1

TERMINAL 35

Table 1. NI PXIe-7865 Signal Descriptions

Signal Description

AI+ Positive analog input signal connection

AI- Negative analog input signal connection

AISENSE Reference connection for NRSE measurements

AIGND Ground reference for the analog input signal

AO Analog output signal connection

AOGND Ground reference for the analog output signal

2| ni.com | NI PXIe-7865 User Manual

Table 1. NI PXIe-7865 Signal Descriptions (Continued)

Signal Description

DIO Digital input/output signal connection

EXTCLKIN External clock input source that can be used for source synchronous

acquisitions. The provided clock source must be stable and glitch-free.

GND Ground connection

Supply (+5 Vout) 5 V power output connection for external devices

NC No connection

The NI PXIe-7865 is protected from overvoltage and overcurrent conditions.

Note Refer to the NI PXIe-7865 Specifications, available at ni.com/manuals for

more information.

Note The pinout label on the lid of the SCB-68A accessory is incompatible with

the NI PXIe-7865. Refer to the NI 78xxR Pinout Labels for the SCB-68A, available

at ni.com/manuals for the compatible pinout labels.

Connecting the NI PXIe-7865

NI recommends using the following cables and accessories with the NI PXIe-7865:

NI PXIe-7865 User Manual | © National Instruments | 3

Table 2. Recommended Cables and Accessories

Connector Type Connector Block Cables

Analog I/O

Connector 0

(RAIO)

SCB-68A Noise

Rejecting, Shielded I/O

Connector Block

(782536-01)

• SHC68-68-RMIO Shielded Cable for the

Reconfigurable MIO Connector, 68-pin

D-Type to 68-pin VHDCI, 1 m

(189588-01)

• SHC68-68-RMIO Shielded Cable for the

Reconfigurable MIO Connector, 68-pin

D-Type to 68-pin VHDCI, 2 m

(189588-02)

Analog Output

Connector 2

(RAO)

Digital

Connector 1

(RDIO)

SCB-68 HSDIO Shielded

68-Pin Connector Block

for Reconfigurable DIO

& HSDIO Products

(782914-01)

• SHC68-C68-RDIO2 Shielded High

Speed Digital Cable for the

Reconfigurable DIO Connector, 1 m

(156166-01)

• SHC68-C68-RDIO2 Shielded High

Speed Digital Cable for the

Reconfigurable DIO Connector, 2 m

(156166-02)

Note The SCB-68A DIP switches must be set for Direct Feedthrough mode for use

with R Series devices. Visit ni.com/info and enter the Info Code scb68acables for

more information on the SCB-68A accessory.

Note NI is not liable for connections that exceed any of the maximum ratings of

input or output signals on the NI PXIe-7865 and on the computer chassis. Refer to

the NI PXIe-7865 Specifications, available at ni.com/info for the maximum input and

output ratings for each signal.

Analog Input

The NI PXIe-7865 provides connections for two AI channels. Each channel has an AI+ pin,

AI- pin, and AIGND pin to which you can connect both single-ended or differential voltage

signals. Use the AISENSE pin to connect non-referenced single-ended signals.

Connecting Single-Ended Voltage Signals

To connect referenced single-ended voltage signals to the NI PXIe-7865, you must connect the

voltage ground signal to AI GND in order to keep the common-mode voltage in the specified

range.

4| ni.com | NI PXIe-7865 User Manual

Figure 2. Connecting Referenced Single-Ended Signals to the NI PXIe-7865

PGIA ADC

AI+

NI PXIe-7865

Connection

Accessory

AISENSE

AIGND

–

Overvoltage

Protection

AI– Overvoltage

Protection

Overvoltage

Protection

To connect non-referenced single-ended voltage signals to the NI PXIe-7865, you must

connect the voltage ground signal to AI SENSE in order to keep the common-mode voltage in

the specified range.

Figure 3. Connecting Non-Referenced Single-Ended Signals to the NI PXIe-7865

PGIA ADC

AI+

NI PXIe-7865

Connection

Accessory

AISENSE

AIGND

Vcm

–

Overvoltage

Protection

AI– Overvoltage

Protection

Overvoltage

Protection

Connecting Differential Voltage Signals

You can connect grounded or floating differential signal sources to the NI PXIe-7865. Connect

the positive voltage signal to the AI+ and the negative voltage signal to AI-. To connect

grounded differential signals to the NI PXIe-7865, you must also connect the signal reference

to AI GND.

NI PXIe-7865 User Manual | © National Instruments | 5

Figure 4. Connecting Grounded Differential Signals to the NI PXIe-7865

PGIA ADC

AI+

NI PXIe-7865

Connection

Accessory

AISENSE

AIGND

Vcm

–

Overvoltage

Protection

AI– Overvoltage

Protection

Overvoltage

Protection

To connect floating differential signals to the NI PXIe-7865, you must connect the negative

and positive signals to AI GND through 1 MΩ resistors to keep the voltage within the

common-mode voltage range. If the voltage source is outside the common-mode voltage

range, the NI PXIe-7865 does not read data accurately.

Figure 5. Connecting Floating Differential Signals to the NI PXIe-7865

PGIA ADC

AI+

NI PXIe-7865

Connection

Accessory

AISENSE

AIGND

–

Overvoltage

Protection

AI– Overvoltage

Protection

Overvoltage

Protection

Analog Output

The NI PXIe-7865 provides connections for 24 analog output channels. Each channel has an

AO pin and AOGND pin to which you can connect a load.

6| ni.com | NI PXIe-7865 User Manual

Figure 6. Connecting a Load

NI PXIe-7865

Connection

Accessory

AOGND

LOAD

DAC

Digital I/O

The NI PXIe-7865 provides connections for 32 digital input/output (DIO) channels. Connector

1 contains 32 high-speed DIO channels that can run up to 20 MHz signal frequencies. You can

configure each channel as input or output.

Each DIO line on the NI PXIe-7865 are TTL-compatible. When configured as inputs, they can

receive signals from 5 V TTL, 3.3 V LVTTL, and 3.3 V LVCMOS. When configured as

outputs, they can send signals to 5 V TTL, 3.3 V LVTTL, and 3.3 V LVCMOS devices.

Because the digital outputs can provide nominal output swing of 0 V to 3.3 V, which will meet

the 5 V TTL threshold for a digital logic high, despite not being at a 5 V logic level. Refer to

the device specifications on ni.com/manuals for more information.

Figure 7. Connecting to the DIO Channels

NI PXIe-7865

Power

FPGA

Connection

Accessory

DIO0

DIO1

DIO30

DIO31

Connector 1 (DIO)

1. High-speed signal frequencies up to 20 MHz that is compatible with 5 V TTL, 3.3 V LVTTL, and 3.3 V

LVCMOS.

2. LED

The DIO channels connect to the FPGA through digital bus switches, which have overvoltage

and undervoltage protection as well as over current protection with a Positive Thermal

Coefficient (PTC) resistor. Refer to the device specifications on ni.com/manuals for more

information about the maximum voltage and current.

When the system powers on, the DIO channels are set as input low with pull-down resistors.

To set another power-on state, you can configure the NI PXIe-7865 to load a VI when the

system powers on. The VI can then set the DIO lines to any power-on state. Visit ni.com/info

and enter RSeries_PowerUpStates to learn more about configuring the power-up states

for the NI PXIe-7865.

All the high-speed DIO channels on Connector 1 are routed with a 50 Ω characteristic trace

impedance. Route all external circuitry with a similar impedance to ensure best signal quality.

NI recommends performing signal integrity measurements to test the effect of signal routing

with the cable and connection accessory for your application.

Field Wiring Considerations

Environmental noise can seriously affect the measurement accuracy of the device if you do not

take proper care when running signal wire between signal sources and the device. The

following recommendations mainly apply to AI signal routing to the device, as well as signal

routing in general.

Take the following precautions to minimize noise pickup and maximize measurement

accuracy:

• Use differential AI connections to reject common-mode noise.

• Use individually shielded, twisted-pair wires to connect AI signals to the device. With

this type of wire, the signal attached to the positive and negative inputs are twisted

together and then covered with a shield. You then connect this shield only at one point to

the signal source ground. This kind of connection is required for signals traveling through

areas with large magnetic fields or high electromagnetic interference.

• Route signals to the device carefully. Keep cabling away from noise sources, such as

video monitors and analog signals.

Use the following recommendations for all signal connections to the NI PXIe-7865:

• Separate NI PXIe-7865 signal lines from high-current or high-voltage lines. These lines

can induce currents in or voltages on the NI PXIe-7865 signal lines if they run in parallel

paths at a close distance. To reduce the magnetic coupling between lines, separate them

by a reasonable distance if they run in parallel or run the lines at right angles to each

other.

• Do not run signal lines through conduits that also contain power lines.

• Protect signal lines from magnetic fields caused by electric motors, welding equipment,

breakers, or transformers by running them through special metal conduits.

• To minimize signal-to-signal skew within each digital channel, maintain signal lines'

length within 1 inch of difference.

+5 V Power Source

Use the +5 V terminals on the I/O connector supply +5 V referenced to GND to power

external circuitry.

Caution Never connect the +5 V power terminals to analog or digital ground or

any other voltage source on the NI PXIe-7865 or any other device. Doing so can

8| ni.com | NI PXIe-7865 User Manual

damage the device and the computer. National Instruments is not liable for damage

resulting from such a connection.

The power rating is 4.75 to 5.1 V DC at 0.5 A.

Worldwide Support and Services

The NI website is your complete resource for technical support. At ni.com/support, you have

access to everything from troubleshooting and application development self-help resources to

email and phone assistance from NI Application Engineers.

Visit ni.com/services for information about the services NI offers.

Visit ni.com/register to register your NI product. Product registration facilitates technical

support and ensures that you receive important information updates from NI.

NI corporate headquarters is located at 11500 North Mopac Expressway, Austin, Texas,

78759-3504. NI also has offices located around the world. For support in the United States,

create your service request at ni.com/support or dial 1 866 ASK MYNI (275 6964). For

support outside the United States, visit the Worldwide Offices section of ni.com/niglobal to

access the branch office websites, which provide up-to-date contact information.

Information is subject to change without notice. Refer to the NI Trademarks and Logo Guidelines at ni.com/trademarks for

information on NI trademarks. Other product and company names mentioned herein are trademarks or trade names of their

respective companies. For patents covering NI products/technology, refer to the appropriate location: Help»Patents in your

software, the patents.txt file on your media, or the National Instruments Patent Notice at ni.com/patents. You can find

information about end-user license agreements (EULAs) and third-party legal notices in the readme file for your NI product. Refer

to the Export Compliance Information at ni.com/legal/export-compliance for the NI global trade compliance policy and how

to obtain relevant HTS codes, ECCNs, and other import/export data. NI MAKES NO EXPRESS OR IMPLIED WARRANTIES AS

TO THE ACCURACY OF THE INFORMATION CONTAINED HEREIN AND SHALL NOT BE LIABLE FOR ANY ERRORS. U.S.

Government Customers: The data contained in this manual was developed at private expense and is subject to the applicable

limited rights and restricted data rights as set forth in FAR 52.227-14, DFAR 252.227-7014, and DFAR 252.227-7015.

378153A-03 January 12, 2020

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