Opal Kelly XEM6310 Bedienungsanleitung

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Find the Opal Kelly XEM6310-LX45 at our website: Click HERE

Opal Kelly

A compact (75mm x 50mm) integration board featur-

ing the Xilinx Spartan-6 FPGA, SuperSpeed USB

3.0, on-board DDR2 memory, and two 16 MiB Flash

memories.

XEM6310 User’s Manual

The XEM6310 is a compact USB 3.0 (SuperSpeed) FPGA integration module featuring the Xilinx Spar-

tan-6 FPGA, 1 Gib (64 Mx16-bit) DDR2 SDRAM, two 128 Mib SPI Flash devices, high-efciency switch-

ing power supplies, and two high-density 0.8-mm expansion connectors. The USB 3.0 SuperSpeed

interface provides fast conguration downloads and PC-FPGA communication as well as easy access

with our popular FrontPanel application and SDK. A low-jitter, 100 MHz crystal oscillator is attached to

the FPGA.

Software, documentation, samples, and related materials are

Opal Kelly Incorporated

Portland, Oregon

http://www.opalkelly.com

excerpts in published reviews is prohibited without the express written permission of Opal Kelly Incorporated.

Opal Kelly, the Opal Kelly Logo, and FrontPanel are trademarks of Opal Kelly Incorporated.

Linux is a registered trademark of Linus Torvalds. Microsoft and Windows are both registered trademarks of

Microsoft Corporation. All other trademarks referenced herein are the property of their respective owners and no

trademark rights to the same are claimed.

Revision History:

Date Description

20120610 Initial release.

20120927 Added note regarding FPGA Bank 2 pins on JP1 and JP2.

20130115 Fixed error in XEM6010 comparison page (U12 is the correct pin. U22 was in the previous rev).

20130115 Added language about the host interface RESET pin.

20130115 Fix reference to Bank 2 I/O voltage. Corrected to 1.8v. (Previous rev said 3.3v.)

20140123 Fix incorrect non-volatile memory amount on page 5.

20140402 Added remarks about Pins reference.

20150303 Added additional information about Pins.

20160107 Added missing oscillator pin locations.

Contents

Introducing the XEM6310 ......................5

PCB Footprint .....................................5

BRK6110 Breakout Board.........................5

Functional Block Diagram............................6

FPGA ...........................................6

Power Supply .....................................6

DC Power Connector ............................7

SuperSpeed USB 3.0 Interface .......................7

On-board Peripherals ...............................7

Low-Jitter Crystal Oscillator .......................7

128-MByte Word-Wide DDR2 Synchronous DRAM ....7

FPGA Flash - 16 MiB Serial Flash Memory ...........7

System Flash - 16 MiB Serial Flash Memory ..........7

LEDs.........................................7

Expansion Connectors ..............................8

FrontPanel Support.................................8

Programmer’s Interface ..........................8

Applying the XEM6310 ........................9

Powering the XEM6310 .............................9

Power Budget ..................................9

Example XEM6310-LX150 FPGA Power Consumption..10

Supply Heat Dissipation (IMPORTANT!!).............10

Host Interface .....................................11

Reset Prole RESET ............................11

System Flash .....................................11

Layout........................................11

Loading a Power-On FPGA Conguration ............11

FPGA Flash ......................................12

LEDs ............................................12

Low-Jitter 100 MHz Oscillator.........................12

DDR2 SDRAM ....................................12

Clock Conguration (Source Synchronous) ...........13

Memory Controller Blocks ........................13

MIG Settings...................................13

JTAG ............................................14

Key Memory Storage (LX150 only) .....................14

Volatile Encryption Key Storage (Vbatt)..............14

Non-Volatile Encryption Key Storage (eFUSE) ........15

Expansion Connectors ..............................15

JP1 ..........................................15

JP2 ..........................................16

Setting I/O Voltages .............................16

Considerations for Differential Signals...............16

BRK6110 Breakout Board ............................17

Pins .............................................17

Toolbar .......................................17

XEM6310 User’s Manual

www.opalkelly.com

Pin Lists ......................................18

Filters ........................................18

Search .......................................18

Export (PDF, CSV, Constraints Files)................18

Peripherals ....................................19

Migrating Hardware from the XEM6010 to the XEM6310....20

FPGA Boot Conguration.........................20

Clock PLL → Clock Oscillator .....................20

Expansion Connector Differences ..................20

PCB Version History ................................21

20120517 .....................................21

XEM6310 Mechanical Drawing ..................22

BRK6110 Mechanical Drawing...................23

XEM6310 Quick Reference .....................24

XEM6310 Quick Reference .....................25

XEM6310 User’s Manual

www.opalkelly.com

The XEM6310 is a compact FPGA board featuring the Xilinx Spartan-6 FPGA and SuperSpeed

USB 3.0 connectivity via a USB 3.0 Micro-B receptacle. Designed as a full-featured integration

system, the XEM6310 provides access to over 110 I/O pins on its 484-pin Spartan-6 device and

has a 128-MiByte DDR2 SDRAM available to the FPGA. Two SPI Flash devices provide a total

of 32 MiB of non-volatile memory, one attached to the USB microcontroller and one attached to

the FPGA. Available with LX45 and LX150 FPGA densities, the XEM6310 is designed for me-

dium- to large-sized FPGA designs with a wide variety of external interface requirements.

PCB Footprint

A mechanical drawing of the XEM6310 is shown at the end of this manual. The PCB is 75mm

x 50mm with four mounting holes (M2 metric screws) spaced as shown in the gure. These

mounting holes are electrically isolated from all signals on the XEM6310. The two connectors

(USB and DC power) overhang the PCB by approximately 1mm in order to accommodate mount-

ing within an enclosure.

The XEM6310 has two high-density 80-pin connectors on the bottom side which provide access

to many FPGA pins, power, and JTAG.

BRK6110 Breakout Board

A simple breakout board (the BRK6110) is provided as an optional accessory to the XEM6310.

This breakout board provides DC power, JTAG connector, and easy access to the high-density

connectors on the XEM6310 by routing them to lower-density 2mm-spaced thru-holes. The

breakout board also provides a convenient reference for building boards that will mate to the

XEM6310.

Introducing the XEM6310

XEM6310 User’s Manual

www.opalkelly.com

Opal Kelly reserves the right to change the form-factor and possibly pinout of the BRK6110.

Therefore, unlike the XEM6310, it is not intended or recommended for production integration.

Full schematics and Gerber artwork les for the BRK6110 are provided free of charge. If your

application depends on the existing form-factor, you may reproduce this board from these docu-

ments.

A mechanical drawing of the BRK6110 is also shown at the end of this document.

Functional Block Diagram

USB Micro Spartan-6 FPGA

XC6SLX45-2FGG484

XC6SLX150-2FGG484

Samtec Expansion Connector

100 MHz

Clock

Host

Interface

Bus

63 I/O61 I/O

USB 3.0

8 LEDs

DDR2 SDRAM

128 MiB

FPGA Flash

16 MiB

System Flash

16 MiB

LVDS

FPGA

The XEM6310 is offered in two variants. These two variants are identical except for the FPGA

provided. The table below lists some of the differences between the two devices. Please consult

the Xilinx documentation for a more thorough comparison.

Feature XEM6310-LX45 XEM6310-LX150

FPGA XC6SLX45-2FGG484C XC6SLX150-2FGG484C

Slice Count 6,822 23,038

D Flip-Flops 54,576 184,304

Distributed RAM 401 Kib 1,355 Kib

Block RAM 2,088 Kib 4,824 Kib

DSP Slices 58 180

Clock Management Tiles 4 6

Power Supply

The XEM6310 is designed to be operated from a 5-volt power source supplied through the DC

power jack on the device or the expansion connectors on the bottom of the device. This provides

power for the three high-efciency switching regulators on-board to provide 3.3v, 1.8v and 1.2v.

0.9v is derived from the 3.3-volt supply using a small low-dropout (LDO) regulator for use as a

XEM6310 User’s Manual

www.opalkelly.com

DDR2 termination voltage. Each of the three switching regulators can provide up to 2A of cur-

rent.

DC Power Connector

The DC power connector on the XEM6310 is part number PJ-102AH from CUI, Inc. It is a stan-

dard “canon-style” 2.1mm / 5.5mm jack. The outer ring is connected to DGND. The center pin is

connected to +VDC.

SuperSpeed USB 3.0 Interface

The XEM6310 uses a Cypress CYUSB3014-BZXI FX3 USB microcontroller to make the XEM

a USB 3.0 peripheral. As a USB peripheral, the XEM is instantly recognized as a plug and play

peripheral on millions of PCs. More importantly, FPGA downloads to the XEM happen quickly,

virtual instruments under FrontPanel update quickly, and data transfers are blazingly fast.

On-board Peripherals

The XEM6310 is designed to compactly support a large number of applications with a small num-

ber of on-board peripherals. These peripherals are listed below.

Low-Jitter Crystal Oscillator

A xed-frequency, 100 MHz, low-jitter oscillator is included on-board and outputs LVDS to the

FPGA. The Spartan-6 FPGA can produce a wide range of clock frequencies using the on-chip

DCM and PLL capabilities.

128-MByte Word-Wide DDR2 Synchronous DRAM

The XEM also includes a 128-MiByte DDR2 SDRAM with a full 16-bit word-wide interface to the

FPGA. This SDRAM is attached exclusively to the FPGA and does not share any pins with the

expansion connector. The maximum clock rate of the SDRAM is 333 MHz. With the -2 speed

grade of the Spartan-6, the maximum clock rate is 312.5 MHz for a supported peak memory

bandwidth of 10 Gb/s.

The DDR2 SDRAM is a Micron MT47H64M16HR-3:G (or compatible).

FPGA Flash - 16 MiB Serial Flash Memory

A 128 Mib serial ash device (Numonyx N25Q128A11B1240E or equivalent) provides on-board

non-volatile storage for the FPGA. This device is attached directly to the FPGA for use in your

design.

System Flash - 16 MiB Serial Flash Memory

A 128 Mib serial ash device (Numonyx N25Q128A11B1240E or equivalent) provides on-board

non-volatile storage accessible to the USB microcontroller. This device is used to store device

rmware and conguration settings as well as other user assets such as FPGA conguration les

or calibration data. Erase, read, and write functions are available at all times (with or without a

congured FPGA) through the use of FrontPanel API methods.

LEDs

Eight LEDs and are available for general use as indicators.

XEM6310 User’s Manual

www.opalkelly.com

Expansion Connectors

Two high-density, 80-pin expansion connectors are available on the bottom-side of the XEM6310

PCB. These expansion connectors provide user access to several power rails on the XEM6310,

the JTAG interface on the FPGA, and 124 non-shared I/O pins on the FPGA, including several

GCLK inputs.

The connectors on the XEM6310 are Samtec part number: BSE-040-01-F-D-A. The table below

lists the appropriate Samtec mating connectors along with the total mated height.

Samtec Part Number Mated Height

BTE-040-01-F-D-A 5.00mm (0.197”)

BTE-040-02-F-D-A 8.00mm (0.315”)

BTE-040-03-F-D-A 11.00mm (0.433”)

BTE-040-04-F-D-A 16.10mm (0.634”)

BTE-040-05-F-D-A 19.10mm (0.752”)

FrontPanel Support

The XEM6310 is fully supported by Opal Kelly’s FrontPanel Application. FrontPanel augments

the limited peripheral support with a host of PC-based virtual instruments such as LEDs, hex

displays, pushbuttons, toggle buttons, and so on. Essentially, this makes your PC a recongu-

rable I/O board and adds tremendous value to the XEM6310 as an experimentation or prototyp-

ing system.

Programmer’s Interface

In addition to complete support within FrontPanel, the XEM6310 is also fully supported by the

FrontPanel SDK, a powerful C++ class library available to Windows, Mac OS X, and Linux pro-

grammers allowing you to easily interface your own software to the XEM.

In addition to the C++ library, wrappers have been written for C#, Java, and Python making the

API available under those languages as well. Sample wrappers (unsupported) are also provided

for Matlab and LabVIEW.

Complete documentation and several sample programs are installed with FrontPanel.

XEM6310 User’s Manual

www.opalkelly.com

Applying the XEM6310

Powering the XEM6310

The XEM6310 requires that this supply be clean, ltered, and within the range of 4.5v to 5.5v.

This supply must be delivered through the +VDC pins on the two device’s two expansion connec-

tors or the DC power connector.

The expansion bus has several power supply pins, described below:

• +VDC is provided by an external device to the XEM6310. It must be a clean, filtered sup-

ply within the range of +4.5 volts and +5.5 volts.

• +3.3v is the output of a 2-Amp switching regulator on the XEM6310.

• +1.8v is the output of a 2-Amp switching regulator on the XEM6310.

• +1.2v is the output of a 2-Amp switching regulator on the XEM6310.

• +VCCO0 is the bank-0 I/O voltage to the FPGA. Factory default is +3.3v

• +VCCO1 is the bank-1 I/O voltage to the FPGA. Factory default is +3.3v

Power Budget

The table below can help you determine your power budget for each supply rail on the XEM6310.

All values are highly dependent on the application, speed, usage, and so on. Entries we have

made are based on typical values presented in component datasheets or approximations based

on Xilinx power estimator results. Shaded boxes represent unconnected rails to a particular

component. Empty boxes represent data that the user must provide based on power estimates.

The user may also need to adjust parameters we have already estimated (such as FPGA Vcco

values) where appropriate.

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