Philips CBT3384 Betriebshandbuch

1. General description

The CBT3384 provides ten bits of high-speed TTL-compatible bus switching. The low

ON resistance of the switch allows connections to be made with minimal propagation

delay.

The CBT3384 device is organized as two 5-bit bus switches with two separate output

enable (1OE, 2OE) inputs. When nOE is LOW, the switch is on and port A is connected to

the B port. When nOE is HIGH, each switch is disabled.

The CBT3384 is characterized for operation from −40 °C to +85 °C.

2. Features

n5Ωswitch connection between two ports

nTTL-compatible control input levels

nMultiple package options

nSee CBTD3384 for CBT3384 with level shifting diodes

nLatch-up protection exceeds 100 mA per JESD78

nESD protection:

uHBM JESD22-A114E exceeds 2000 V

uCDM JESD22-C101C exceeds 1000 V

3. Ordering information

[1] Also known as QSOP24 package

CBT3384

10-bit bus switch with 5-bit output enables

Rev. 06 — 2 November 2009 Product data sheet

Table 1. Ordering information

Type

number Package

Temperature range Name Description Version

CBT3384D −40 °C to +85 °C SO24 plastic small outline package; 24 leads; body width 7.5 mm SOT137-1

CBT3384DB −40 °C to +85 °C SSOP24 plastic shrink small outline package; 24 leads;

body width 5.3 mm SOT340-1

CBT3384DK −40 °C to +85 °C SSOP24[1] plastic shrink small outline package; 24 leads; body

width 3.9 mm; lead pitch 0.635 mm SOT556-1

CBT3384PW −40 °C to +85 °C TSSOP24 plastic thin shrink small outline package; 24 leads;

body width 4.4 mm SOT355-1

Product data sheet Rev. 06 — 2 November 2009 2 of 14

NXP Semiconductors CBT3384

10-bit bus switch with 5-bit output enables

4. Functional diagram

5. Pinning information

5.1 Pinning

Fig 1. Logic diagram

001aak877

1A1

1A5

1B1

1B5

1OE

2A1

2A5

2B1

2B5

2OE

Fig 2. Pin conﬁguration for SO24 (SOT137-1) Fig 3. Pin conﬁguration for SSOP24 (SOT340-1) and

TSSOP24 (SOT355-1)

CBT3384

1OE VCC

1B1 2B5

1A1 2A5

1A2 2A4

1B2 2B4

1B3 2B3

1A3 2A3

1A4 2A2

1B4 2B2

1B5 2B1

1A5 2A1

GND 2OE

001aak878

CBT3384

1OE VCC

1B1 2B5

1A1 2A5

1A2 2A4

1B2 2B4

1B3 2B3

1A3 2A3

1A4 2A2

1B4 2B2

1B5 2B1

1A5 2A1

GND 2OE

001aak879

Product data sheet Rev. 06 — 2 November 2009 3 of 14

NXP Semiconductors CBT3384

10-bit bus switch with 5-bit output enables

5.2 Pin description

6. Functional description

[1] H = HIGH voltage level; L = LOW voltage level; Z = high-impedance OFF-state.

Fig 4. Pin conﬁguration for SSOP24 (SOT556-1)

CBT3384

1OE VCC

1B1 2B5

1A1 2A5

1A2 2A4

1B2 2B4

1B3 2B3

1A3 2A3

1A4 2A2

1B4 2B2

1B5 2B1

1A5 2A1

GND 2OE

001aak880

Table 2. Pin description

Symbol Pin Description

1OE, 2OE 1, 13 output enable input (active LOW)

1A1 to 1A5 3, 4, 7, 8, 11 data input/output (A port)

2A1 to 2A5 14, 17, 18, 21, 22 data input/output (A port)

1B1 to 1B5 2, 5, 6, 9, 10 data input/output (B port)

2B1 to 2B5 15, 16, 19, 20, 23 data input/output (B port)

GND 12 ground (0 V)

VCC 24 positive supply voltage

Table 3. Function selection[1]

Input Input/output

1OE 2OE 1An, 1Bn 2An, 2Bn

L L 1An = 1Bn 2An = 2Bn

L H 1An = 1Bn Z

H L Z 2An = 2Bn

HHZZ

Product data sheet Rev. 06 — 2 November 2009 4 of 14

NXP Semiconductors CBT3384

10-bit bus switch with 5-bit output enables

7. Limiting values

[1] Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the

device at these or any other conditions beyond those indicated under Section 8. is not implied. Exposure to absolute-maximum-rated

conditions for extended periods may affect device reliability.

[2] The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.

8. Recommended operating conditions

9. Static characteristics

Table 4. Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134).

[1]

amb

−

C to +85

C, unless otherwise speciﬁed.

Symbol Parameter Conditions Min Max Unit

VCC supply voltage −0.5 +7.0 V

VIinput voltage [2] −0.5 +7.0 V

IOoutput current VO<0V - ±128 mA

IIK input clamping current VI/O =0V −50 - mA

Tstg storage temperature −65 +150 °C

Table 5. Operating conditions

All unused control inputs of the device must be held at V

or GND to ensure proper device operation.

Symbol Parameter Conditions Min Typ Max Unit

VCC supply voltage 4.5 - 5.5 V

VIH HIGH-state input voltage 2.0 - - V

VIL LOW-state input voltage - - 0.8 V

Tamb ambient temperature operating in free air −40 - +85 °C

Table 6. Static characteristics

Voltages are referenced to GND (ground = 0 V).

Symbol Parameter Conditions Tamb = −40 °C to +85 °C Unit

Min Typ[1] Max

VIK input clamping voltage VCC = 4.5 V; II=−18 mA - - −1.2 V

IIinput leakage current VCC = 5.5 V; VI= GND or 5.5 V - - ±1µA

ICC supply current VCC = 5.5 V; IO= 0 mA;

VI=V

CC or GND --3µA

∆ICC additional supply current per input pin; VCC = 5.5 V; one input at

3.4 V, other inputs at VCC or GND [2] - - 2.5 mA

Vpass pass voltage output HIGH; VI=V

CC = 5.0 V;

IO=−100 µA3.6 3.9 4.2 V

CIinput capacitance control pins; VI= 3 V or 0 V - 4.0 - pF

Cio(off) off-state input/output

capacitance port off; VI= 3 V or 0 V; nOE = VCC - 10.0 - pF

Product data sheet Rev. 06 — 2 November 2009 5 of 14

NXP Semiconductors CBT3384

10-bit bus switch with 5-bit output enables

[1] All typical values are at VCC =5V,T

amb =25°C.

[2] This is the increase in supply current for each input that is at the speciﬁed TTL voltage level rather than VCC or GND.

[3] Measured by the voltage drop between the nAn and the nBn terminals at the indicated current through the switch. ON resistance is

determined by the lowest voltage of the two (nAn or nBn) terminals.

10. Dynamic characteristics

[1] The propagation delay is the calculated RC time constant of the typical ON resistance of the switch and the speciﬁed load capacitance,

when driven by an ideal voltage source (zero output impedance).

[2] tpd is the same as tPLH and tPHL.

RON ON resistance VCC = 4.5 V; VI=0V;I

I=64mA [3] -57Ω

VCC = 4.5 V; VI=0V;I

I=30mA [3] -57Ω

VCC = 4.5 V; VI= 2.4 V; II=−15 mA [3] -1015Ω

Table 6. Static characteristics

…continued

Voltages are referenced to GND (ground = 0 V).

Symbol Parameter Conditions Tamb = −40 °C to +85 °C Unit

Min Typ[1] Max

Table 7. Dynamic characteristics

Voltages are referenced to GND (ground = 0 V). For test circuit see Figure 7.

Symbol Parameter Conditions Tamb = 25 °C Tamb =−40 °C to +85 °C Unit

Min Typ Max Min Max

tpd propagation delay nAn, nBn to nBn, nAn;

see Figure 5 [1][2]

VCC = 5.0 V ±0.5 V - - 0.25 - 0.25 ns

tPZH OFF-state to HIGH

propagation delay nOE to nAn or nBn;

see Figure 6

VCC = 5.0 V ±0.5 V 1.2 2.3 5.7 1.2 5.6 ns

tPZL OFF-state to LOW

propagation delay nOE to nAn or nBn;

see Figure 6

VCC = 5.0 V ±0.5 V 1.2 2.3 5.7 1.2 6.0 ns

tPHZ HIGH to OFF-state

propagation delay nOE to nAn or nBn;

see Figure 6

VCC = 5.0 V ±0.5 V 1.7 3.6 5.2 1.7 5.5 ns

tPLZ LOW to OFF-state

propagation delay nOE to nAn or nBn;

see Figure 6

VCC = 5.0 V ±0.5 V 1.7 2.7 5.2 1.7 6.6 ns

Product data sheet Rev. 06 — 2 November 2009 6 of 14

NXP Semiconductors CBT3384

10-bit bus switch with 5-bit output enables

11. Waveforms

Measurement points are given in Table 8.

Logic levels: VOL and VOH are typical output voltage levels that occur with the output load.

Fig 5. The data input (nAn, nBn) to output (nBn, nAn) propagation delay times

001aak881

VMVM

nAn, nBn input

GND

VOH

nBn, nAn output

VOL

tPHL tPLH

Measurement points are given in Table 8.

Logic levels: VOL and VOH are typical output voltage levels that occur with the output load.

Fig 6. Enable and disable times

001aak298

tPLZ

tPHZ

outputs

disabled outputs

enabled

outputs

enabled

output

LOW to OFF

OFF to LOW

output

HIGH to OFF

OFF to HIGH

nOE input

3.5 V

VMVM

VOL

VOH

GND

tPZL

tPZH

Table 8. Measurement points

Supply voltage Input Output

VCC VIVMVMVXVY

VCC = 5.0 V ±0.5 V GND to 3.0 V 1.5 V 1.5 V VOL + 0.3 V VOH −0.3 V

Product data sheet Rev. 06 — 2 November 2009 7 of 14

NXP Semiconductors CBT3384

10-bit bus switch with 5-bit output enables

12. Test information

Test data is given in Table 9.

All input pulses are supplied by generators having the following characteristics: PRR ≤10 MHz; Zo=50Ω.

The outputs are measured one at a time with one transition per measurement.

Deﬁnitions for test circuit:

RL= Load resistance.

CL= Load capacitance including jig and probe capacitance.

RT= Termination resistance should be equal to output impedance Zoof the pulse generator.

VEXT = External voltage for measuring switching times.

Fig 7. Test circuit for measuring switching times

VMVM

10 %

90 %

0 V

negative

pulse

positive

pulse

0 V

VMVM

90 %

10 %

001aae331

VEXT

VCC

VIVO

DUT

Table 9. Test data

Supply voltage Input Load VEXT

VItr, tfCLRLtPLH, tPHL tPLZ, tPZL tPHZ, tPZH

VCC = 5.0 V ±0.5 V GND to 3.0 V ≤2.5 ns 50 pF 500 Ωopen 7.0 V open

Product data sheet Rev. 06 — 2 November 2009 8 of 14

NXP Semiconductors CBT3384

10-bit bus switch with 5-bit output enables

13. Package outline

Fig 8. Package outline SOT137-1 (SO24)

UNIT A

max. A1A2A3bpcD

(1) E(1) (1)

ELL

pQZ

ywv θ

REFERENCES

OUTLINE

VERSION EUROPEAN

PROJECTION ISSUE DATE

IEC JEDEC JEITA

inches

2.65 0.3

0.1 2.45

2.25 0.49

0.36 0.32

0.23 15.6

15.2 7.6

7.4 1.27 10.65

10.00 1.1

1.0 0.9

0.4 8

0.25 0.1

DIMENSIONS (inch dimensions are derived from the original mm dimensions)

Note

1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.

1.1

0.4

SOT137-1

detail X

vMA

(A )

0.25

075E05 MS-013

pin 1 index

0.1 0.012

0.004 0.096

0.089 0.019

0.014 0.013

0.009 0.61

0.60 0.30

0.29 0.05

1.4

0.055

0.419

0.394 0.043

0.039 0.035

0.016

0.01

0.25

0.01 0.004

0.043

0.016

0.01

0 5 10 mm

scale

SO24: plastic small outline package; 24 leads; body width 7.5 mm SOT137-1

99-12-27

03-02-19

Product data sheet Rev. 06 — 2 November 2009 9 of 14

NXP Semiconductors CBT3384

10-bit bus switch with 5-bit output enables

Fig 9. Package outline SOT340-1 (SSOP24)

UNIT A1A2A3bpcD

(1) E(1) (1)

ELL

pQZywv θ

REFERENCES

OUTLINE

VERSION EUROPEAN

PROJECTION ISSUE DATE

IEC JEDEC JEITA

mm 0.21

0.05 1.80

1.65 0.38

0.25 0.20

0.09 8.4

8.0 5.4

5.2 0.65 1.25

7.9

7.6 0.9

0.7 0.8

0.4 8

0.13 0.10.2

DIMENSIONS (mm are the original dimensions)

Note

1. Plastic or metal protrusions of 0.2 mm maximum per side are not included.

1.03

0.63

SOT340-1 MO-150 99-12-27

03-02-19

detail X

vMA

(A )

112

24 13

0.25

pin 1 index

0 2.5 5 mm

scale

SSOP24: plastic shrink small outline package; 24 leads; body width 5.3 mm SOT340-1

max.

Product data sheet Rev. 06 — 2 November 2009 10 of 14

NXP Semiconductors CBT3384

10-bit bus switch with 5-bit output enables

Fig 10. Package outline SOT556-1 (SSOP24)

UNIT A1A2A3HELp

bpcD

(1) E(1) Z(1)

eL ywv θ

REFERENCES

OUTLINE

VERSION EUROPEAN

PROJECTION ISSUE DATE

IEC JEDEC JEITA

mm 0.25

0.10 1.55

1.40 0.25 0.31

0.20 0.25

0.18 8.8

8.6 4.0

3.8 0.635 1

6.2

5.8 0.89

0.41 1.05

0.66 8

0.180.25 0.1

DIMENSIONS (millimetre dimensions are derived from the original inch dimensions)

Note

1. Plastic or metal protrusions of 0.2 mm (0.008 inch) maximum per side are not included.

SOT556-1 99-12-27

03-02-18

vMA

112

24 13

detail X

(A )

MO-137

0 2.5 5 mm

scale

SSOP24: plastic shrink small outline package; 24 leads; body width 3.9 mm; lead pitch 0.635 mm SOT556-1

max.

1.73

inches 0.0098

0.0040 0.061

0.055 0.01 0.012

0.008 0.0098

0.0075 0.344

0.337 0.157

0.150 0.025 0.041

0.244

0.228 0.035

0.016 0.040

0.026

0.0070.01 0.004

0.068

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