Samsung SCH-E159 Bedienungsanleitung

CDMA TELEPHONE

SCH-E159

CDMA TELEPHONE CONTENTS

1. Specification

2. Flow Chart of Troubleshooting

3. Exploded Views and Parts List

4. Electrical Parts List

5. PCB Diagrams

6. Block Diagrams

1. SCH-E159 Specification

1-1

1-1. General

ITEM CDMA

Tx Freq. range 824 ~ 849MHz

Rx Freq. range 869 ~ 894MHz

Channel Bandwidth 1.23MHz

Channel Spacing 30kHz

Number of Channel 832

Duplex Separation 45MHz

Type of Emission 40K0F8W, 40K0F1D

In/Output Impedance 50 ohm

Tx Intermediate Freq. Not Used(Zero IF)

Rx Intermediate Freq. Not Used(Zero IF)

Tx Local Freq. 1738.08 ~ 1787.94MHz

Rx Local Freq 1738.08 ~ 1787.94MHz

TCXO freq. 19.2MHz

Freq. Stability (FRX - 45MHz)±300Hz

Operating Temperature -30˚C~+50

˚C

Supply Voltage 3.75 volts

Size and Weight DIMENSION : 91.5(H) X 48.8(W) X 29.3(D) mm

WEIGHT : 125.3g (1000mA Battery)

SCH-E159 Specification

1-2

1-2. CDMA Mode

Waveform Quality 0.944 or more

Time Reference ±1uS or less

Rx Sensitivity and Dynamic Range -104dBm, FER=0.5% or less

-25dBm, FER=0.5% or less

Maximum TX Output Power 24.5dB(282mW)

TX Frequency Deviation ±300Hz or less

Occupied Band Width 1.23MHz

TX Conducted Spurious Emission 900kHz : -42dBc / 30kHz below

1.98MHz : -54dBc / 30kHz below

Minimum TX Power Control below -50dBm

Open Loop Power Control

-25dBm: -57.0dBm ~ -38.5dBm

-65dBm: -17.5dBm ~ +1.5dBm

-104dBm: +18.0dBm ~ +30.0dBm

Standby Output Power below -61dBm

Colsed Loop TX Power Control Range

Test1: ±24dB or more

Test2: 0mS ~ 2.5mS

Test3: ±24dB or more

Test4: ±24dB or more

Test5: ±24dB or more

2. SCH-E159 Flow Chart of Troubleshooting and Circuit Diagrams

2-1

2-1. LOGIC SECTION

2-1-1 No Power

Push PWR Button

END

Check Battery,U301 and it's neighboring circuits

Check KeyPad circuit,U301 and it's neighboring circuits

Check Regulators Output,U301 and it's neighboring circuits

Check U301 and it's neighboring circuits

Check D300,U301 and it's neighboring circuits

Yes

No

U301 V_IN=

"H" Level?

U301 Pin 24=

+2.8V

U301 regulators

On state?

U301 Pin 9=

"H" Level?

U301 Pin 57=

"H" Level?

SCH-E159 Flow Chart of Troubleshooting and Circuit Diagrams

2-2

R509

C365

L302

C311

R361C319

C399

D301

C322

ZD308

L301

C364

C398

VBAT

R312

V_2.6A

C325

R324

C392

V_IN

R327

C329

R315

C326

C312

C306

C315

C335

C397

263R

V_2.85TX

R371

ZD303

C310C307

R320

R316

C304

0

C395

C309

C303

C313

V_2.85SYNTH

R365

U409

R314

R304

6

3

GS

4

S

Q300

125

C324

R301

C318

R317

V_2.6D

4Q303

3

1

2

5

6

C320

V_1.8LCDC

C317

V_1.375C

R310

C321

XTAL_OUT

46

VREG_TCXO84

VREG_USB10

VREG_WLAN64

VSW_5V14

VSW_MSMC31

VSW_MSME37

VSW_PA27

XTAL_IN

44

VREG_MSME36

VREG_MSMP50

VREG_PA28

VREG_RFRX169

VREG_RFRX267

VREG_RFTX73

VREG_RUIM42

VREG_SYNT81

VDD_RF

41

VDD_RUIM

VDD_SPKR77

65

VDD_WLAN

25

VIB_DRV_N

VREG_5V12

39

VREG_MMC

VREG_MSMA56

VREG_MSMC32

2

VCOIN

60

54

VDD_ANA

83

VDD_MAIN

VDD_MSM52

33

VDD_MSMC

VDD_MSME35

VDD_PA29

71

53

USB_CTL_N

15

USB_DAT

17

USB_D_M

20

18USB_D_P

USB_ID

11

13USB_OE_N

19USB_SE0

USB_VBUS

16

VBACKUP

48

VBAT

6

VCHG

51

SLEEP_CLK

45

SPKR_BYP74

78

SPKR_IN_M

SPKR_IN_P76

79

SPKR_OUT_M

75

SPKR_OUT_P

TCXO_EN

55

TCXO_IN

58

TCXO_OUT

61

REF_OUT

80

38RUIM_CLK

26RUIM_IO

RUIM_M_CLK

34

RUIM_M_IO

30

RUIM_M_RST

40

43RUIM_RST

49SBCK

SBDT

47

SBST

23

22

LCD_DRV_N

59MSM_INT_N

CN

68

CN

78

9PON_RESET_N

PS_HOLD

57

REF_BYP63

REF_GND62

REF_ISET

CBL0PWR_N

68

66CBL1PWR_N

CHG_CTL_N

4

8

FLSH_DRV_N

DNG

58

GP1_DRV_N21

ISNS_M

5

ISNS_P

3

24KPDPWR_N

KPD_DRV_N

U301

ADC_BYP

1

AMUX_IN1

70

AMUX_IN2

72

AMUX_OUT

82

BAT_FET_N

7

C314

R364

R305

C330

V_IN

R313

C301

C367

R326

C393

C305

R370

953R

23

1

PM_VBUS_D

Q305

V_2.6D

R322

773R

V_3.0UIM

OSC301

23

4

1

R303

C302

V_2.85RX

V_1.8E

ZD301

R309

C323

R318

C394

R307

R302

C316

V_2.85TCXO

VBAT

V_IN

R363

HP_PWR

D302

TA+

BAT_FET_N

ZHK867.23

V_REC_MIC

JTAG_RESIN_N

PMPS_HOLD

ON_SW

PM_AMUX

MSM_RESIN_N

SBCK

SBST

PM_INT_N

USB_VP

USB_VM

USB_D+

USB_D-

UIM_M_DATA

UIM_DATA

UIM_M_CLK

UIM_CLK

UIM_M_RESET

SBDT

UIM_RESET

TCXO

TCXO_EN

USB_OE_N

NI_LATX_PEELS

TCXO_OUT

PM_VBUS

SCH-E159 Flow Chart of Troubleshooting and Circuit Diagrams

2-3

GND

2

3

OUT VCC

4

1

VCON

OSC101

R111

C135

C132

C126

C131

R134

V_2.85TCXO

TRK_LO_ADJ

5

TCXO

SCH-E159 Flow Chart of Troubleshooting and Circuit Diagrams

2-4

2-1-2 Abnormal initial operation

Press PWR Button

END

Check OSC101 and it's neighboring circuits

Check U201(MSM6500)

Check LED and it's neighboring circuits

Check LCD pins and it's neighboring circuits

Yes

No

Yes

No

TCXO CLK outputted

From OSC101 pin3?

NAND_CLE singnal

Inputted to U202

U202 DRAM_CLK

Inputted

LED ON?

Normal initial display

On LCD?

SCH-E159 Flow Chart of Troubleshooting and Circuit Diagrams

2-5

GND

2

3

OUT VCC

4

1

VCON

OSC101

R111

C135

C132

C126

C131

51

R134

V_2.85TCXO

TRK_LO_ADJ

5

TCXO

C204

R214

C207

0

2

L

U421

U419

U422

V_2.6D

U423

1

0

2

L

_RAS

E5 _RE

E6 _R/B

D6 _WE

F8 _WED

F5 _WP N5

N8

VSS

VSSQ E2

VSSQ J2

L2

VSSQ

F7 _CAS

C6 _CE

E9 _CS

E7

VDDQ

F2 VDDQ

K2 VDDQ

VSS C2

G2

VSS N4

VSS

VSS F9

B5

VSS

UDQM

VCC N7

B6

VCC N6

VCCQ

M2 VDD

VDD

H2

B4 VDD

VDD

G9

D2

NC

B9

F3 NC

NC

F6

E8 NC

NC

G4

G5 NC

NC

G6

H3

NC

K8

M5 NC

B7 NC

M6

NC M7

NC M8

NC

NC 1

NC 2

B2

NC

H5

H6 NC

J3 NC

NC

N2

N9 NC

NC

K5

NC

K6

NC

K7

J6

IO2

IO3 L6

J7

IO4

IO5 L7

IO6 J8

L8

IO7

G3 LDQM

NC

N3

C3

DQ2

DQ3 D4

D3

DQ4

DQ5 E4

E3

DQ6

DQ7 F4

J4

DQ8

DQ9 K3

J5

IO0

IO1 L5

DNU

DNU P2

N10

DNU

B3

DQ0

DQ1 C4

K4

DQ10

DQ11 L3

L4

DQ12

DQ13 M3

M4

DQ14

DQ15

DNU

DNU P9

DNU P10

DNU B1

A9

DNU

DNU A10

B10

DNU

DNU N1

P1

H8 A9

D5 ALE

D7 BA0

D8 BA1

CKE

G8

C5 CLE

H4 CLK

A2

A11

G7 A12

A2

C9

B8 A3

A4

M9

A5

L9

K9 A6

J9 A7

A8

H7

U202

A0

C7

C8 A1

A10

D9

H9

TP205

TP204

C205 C209

U420

V_1.8E

C206

C208

D2(6)

D2(7)

D1(15)

D1(2)

D1(3)

D1(4)

D1(5)

D1(6)

D1(7)

D1(8)

D1(9)

D2(0)

D2(1)

D2(2)

D2(3)

D2(4)

D2(5)

D1(0)

D1(1)

D1(10)

D1(11)

D1(12)

D1(13)

D1(14)

DRAM1A(7)

DRAM1A(6)

DRAM1A(5)

DRAM1A(4)

DRAM1A(3)

DRAM1A(2)

DRAM1A(12)

DRAM1A(11)

DRAM1A(10)

DRAM1A(1)

DRAM1A(0)

DRAM_DQM1

DRAM_DQM0

NAND_CLE

CLOCK_EN

DRAM1A(14)

DRAM1A(13)

NAND_ALE

DRAM1A(9)

DRAM1A(8)

RESET_OUT

DRAM_WE1_N

WE2_N

NAND_BUSY

RE2_N

DRAM_RAS

DRAM_CS

NAND_CE

DRAM_CAS

DRAM1A(12:0)

D2(7:0)

D1(15:0)

DRAM_CLK

5 5

SCH-E159 Flow Chart of Troubleshooting and Circuit Diagrams

2-6

V_2.6D

C219

C223

12nF

R242

C238

R254

C235

C248

R221

C249

R212

C213

C228

R233

3

0

2

P

T

R210

R220

R223

C480

C479

R217

C252

C217

R215

V_2.85TCXO

R237

C216

V_2.6D

R244

C239

C231

R227

V_1.375C

R228

C212

C250

R232

V_IN

V_1.8E

C247

V_1.8E

R222

V_2.6D

C236

R230

R231

V_1.375C

TP201

C251

R224

C245

R219

R209

C242

R206

C214

C222

U412

2

0

2

P

T

C226

V_2.6D

R246 C237

C224

C244

R495

V_2.6A

R213

C215

V_1.375C

R251

R226

R245

C240

AF17 WDOG_EN_2

8

UN

_

1

E

W

WE2_N AF4

6

W0

N

_

S

C

_

1

M

E

M

X

6

7

O

I

P

G

|

1

N

_

S

C

_

1

M

E

M

X

1

B

A

4

Y2

N

_

S

C

_

1

M

E

M

X

7

O

I

P

G

|

N

_

S

C

_

1

M

A

R

D

S

|

3

N

_

S

C

_

1

M

E

M

X

6

Y

W14

XMEM2_CS_N0

AA14

XMEM2_CS_N1

AF12

VDD_P3_1

R25

VDD_P3_2

R26

VDD_P3_3

K25

K26 VDD_P3_4

VDD_P3_5

A17

VDD_P3_6

B17

VDD_P3_7

A12

B12 VDD_P3_8

VDD_P3_9

A3

WDOG_EN_1

AE17

D19

B9 VDD_C_9

F1 VDD_P1_1

F2 VDD_P1_2

M1 VDD_P1_3

VDD_P1_4

M2

U1 VDD_P1_5

VDD_P1_6

U2

AE6 VDD_P2_1

AF6 VDD_P2_2

AE12 VDD_P2_3

VDD_P2_4

VDD_APA_CTL_DAC

P25

D17 VDD_APLL

VDD_C_1

D2

VDD_C_10

B5

N4 VDD_C_2

VDD_C_3

AB2

VDD_C_4

AC14

VDD_C_5

T26

F25 VDD_C_6

F26 VDD_C_7

VDD_C_8

N25

1

A

N

I

_

8

4

L

A

T

X

_

B

S

U1

1

B

T

U

O

_

8

4

L

A

T

X

_

B

S

U

VDD_ABBR_1

U19

T19 VDD_ABBR_2

VDD_ABBR_3

W25

VDD_ABBR_4

T21

VDD_ACDC

AA20

D13 VDD_ADAC

VDD_AEAR

W16

AC16 VDD_AHPH

K

C

T

A18

TCXO

4

9

O

I

P

G

|

N

E

_

O

X

C

T

8

1

F

I

D

T5

1

D

6

1

F

O

D

T

5

1

F

S

M

T

4

1

HJ

D

A

_

O

L

_

K

R

T

N

_

T

S

R

T5

1

H

4

1

LJ

D

A

_

C

G

A

_

X

T

6

MN

_

1

B

U

5

A8

2

O

I

P

G

|

L

E

_

1

_

O

C

V

_

F

H

U

USB_OE_TP_N

3

4

O

I

P

G

|

B

1

T

A

T

S

E

P

I

P

_

M

T

E

|

L

E

S

_

O

C

V

_

X

R

9

H

K

C

B

S

1

2

KT

D

B

S

3

2

J

6

2

HT

S

B

S

H2

SDRAM1_CLK_EN

SLEEP_XTAL_IN A16

SLEEP_XTAL_OUT B16

2

9

O

I

P

G

|

0

M

D

P

_

P

G

|

0

H

T

N

Y

S

9

1

F

3

2

H1

4

O

I

P

G

|

C

R

S

_

Q

R

I

_

O

I

P

G

_

M

T

E

|

1

H

T

N

Y

S

5

6

O

I

P

G

|

C

N

Y

S

E

C

A

R

T

_

M

T

E

|

2

H

T

N

Y

S

8

1

D

6

1

D

Q_IP_CH0 Y26

Q_IP_CH1 U23

B13

Q_OUT A13

Q_OUT_N

F14 RESIN_N

RESOUT_N

F12

4

A

A1

I

B

E

_

N

_

T

U

O

S

E

R

1

GN

_

V

D

A

_

1

M

O

R

K

L

C

_

1

M

O

R

1

C

A

N

_

T

I

A

W

_

1

M

O

R

8

K

C

T

R6

1

H

7

6

C

N2

7

C

N3

B

4

2

B

8

C

N

9

C

N5

2

B

2

VN

_

1

E

O

9

1

B0

N

O

_

A

P

9

1

A2

O

I

P

G

|

1

N

O

_

A

P

6

2

PL

T

C

_

R

E

W

O

P

_

A

P

Y25

Q_IM_CH0

U21

Q_IM_CH1

7

5

C

N2

E

A

3

E

A

8

5

C

N

9

5

C

N4

2

E

A

6

C

N2

B

0

6

C

N5

2

E

A

1

6

C

N6

2

E

A

1

F

A

2

6

C

N2

F

A

3

6

C

N5

2

F

A

4

6

C

N

5

6

C

N6

2

F

A

1

6

C

N

7

4

C

N6

1

T

8

W

8

4

C

N

9

4

C

N9

1

W

5

C

N1

B

6

A

0

5

C

N

1

5

C

N1

2

A

4

C

A

2

5

C

N

3

5

C

N3

2

C

A

2

D

A

4

5

C

N

5

C

N5

2

D

A

1

E

A

6

5

C

N

5

1

P

1

R

8

3

C

N

9

3

C

N2

1

R

6

2

A

4

C

N

3

1

R

0

4

C

N

1

4

C

N4

1

R

5

1

R

2

4

C

N

3

4

C

N6

1

R

1

T

4

C

N

5

4

C

N2

1

T

6

4

C

N5

1

T

8

2

C

N5

1

M

9

2

C

N6

1

M

3

C

N5

2

A

0

3

C

N2

1

N

1

3

C

N3

1

N

4

1

N

2

3

C

N

3

C

N5

1

N

4

3

C

N2

1

P

5

3

C

N3

1

P

4

1

P

6

3

C

N

7

3

C

N

8

1

C

N

9

1

C

N0

1

K

2

C

N2

A

1

L

0

2

C

N

1

2

C

N2

1

L

5

1

L

2

C

N

3

2

C

N6

1

L

1

M

4

2

C

N2

1

M

5

2

C

N

3

1

M

6

2

C

N

7

2

C

N4

1

M

NAND2_CLE|UB2_N

NAND2_RE_N|OE2_N AF7

1

A

1

C

N

6

2

B

0

1

C

N

1

C

N2

C

2

1

C

N5

2

C

3

1

C

N4

D

4

1

C

N3

2

D

5

1

C

N6

F

1

2

F

6

1

C

N

7

1

C

N8

H

9

1

H

AC20 MICFBP

MICINN

AE22

MICINP

AF22

W18 MICOUTN

MICOUTP

AA19

0

E

D

O

M3

2

Y

1

_

1

E

D

O

M5

2

A

6

2

A

2

_

1

E

D

O

M

1

_

2

E

D

O

M5

2

U

6

2

U

2

_

E

D

O

M

AE4

9

1

P

6

1

P

6

4

T

N

I

_

O

I

P

G

|

2

T

A

T

S

E

P

I

P

_

M

T

E

|

N

_

2

E

S

N

E

S

Y

E

K

7

4

T

N

I

_

O

I

P

G

|

3

T

A

T

S

E

P

I

P

_

M

T

E

|

N

_

3

E

S

N

E

S

Y

E

K3

2

R

1

2

R

8

4

T

N

I

_

O

I

P

G

|

4

T

A

T

S

E

P

I

P

_

M

T

E

|

N

_

4

E

S

N

E

S

Y

E

K

2

LN

_

1

B

L

AF20 MIC1N

AE20 MIC1P

AA18 MIC2N

MIC2P

AC19

MICBIAS

AE23

AC21 MICFBN

M

V

_

0

E

S

_

B

S

U

|

L

C

S

_

C

2

I

9

1

N

1

2

J6

2

O

I

P

G

|

A

D

S

_

C

2

I

P

V

_

T

A

D

_

B

S

U

|

A

D

S

_

C

2

I

1

2

N

V21

I_IM_CH0

V25

I_IM_CH1

I_IP_CH0 W21

I_IP_CH1 W26

B14

I_OUT

I_OUT_N A14

1

2

P

2

6

T

N

I

_

O

I

P

G

|

0

T

A

T

S

E

P

I

P

_

M

T

E

|

N

_

0

E

S

N

E

S

Y

E

K

3

6

T

N

I

_

O

I

P

G

|

1

T

A

T

S

E

P

I

P

_

M

T

E

|

N

_

1

E

S

N

E

S

Y

E

K

1

E

G

N

A

R

_

A

P

|

2

M

D

P

_

P

G

0

2

A

N

O

_

X

T

|

0

1

C

F

R

G2

1

H

3

2

A

A0

N

I

A

K

H

5

2

B

A1

N

I

A

K

H

1

2

Y2

N

I

A

K

H

6

2

C

A3

N

I

A

K

H

5

2

C

A4

N

I

A

K

H

3

2

B

A5

N

I

A

K

H

6

2

D

A6

N

I

A

K

H

HPH_R W15

9

1

J7

2

O

I

P

G

|

L

C

S

_

C

2

I

C1

GPIO89|UIM_PWR_EN|UART2_DP_RX_DATA

G6

GPIO90|UIM_RESET|UART2_CTS_N

E4

GPIO91|USM_CLK|UART2_RFR_N

H18

GPIO93|SBST1

L26

GPIO95|NAND_BOOT_ERR|UART1_DP_TX_DATA

M23

GPIO96|UART1_DP_RX_DATA

N16

GPIO97|UART1_CTS_N

M21

GPIO98|UART1_RFR_N

6

C

F

R

G

|

9

O

I

P

G9

1

R

1

2

H3

1

O

I

P

G

|

E

B

O

R

P

_

F

I

M

A

C

|

N

M

_

P

G

0

E

G

N

A

R

_

A

P

|

1

M

D

P

_

P

G

7

1

H

GPIO75|SDRAM1_DQM3 V8

9

1

K

L

C

_

C

A

D

S

|

K

L

C

_

M

C

P

_

X

U

A

|

0

8

O

I

P

G

6

2

J

N

_

R

_

L

_

C

A

D

S

|

C

N

Y

S

_

M

C

P

_

X

U

A

|

1

8

O

I

P

G

3

2

K

L

C

M

_

C

A

D

S

|

N

I

D

_

M

C

P

_

X

U

A

|

2

8

O

I

P

G

T

U

O

D

_

C

A

D

S

|

T

U

O

D

_

M

C

P

_

X

U

A

|

3

8

O

I

P

G5

2

J

M19

GPIO84|UIM2_DATA|UART3_DP_TX_DATA

L21

GPIO85|UIM2_PWR_EN|UART3_DP_RX_DATA

L23

GPIO86|UIM2_RESET|UART3_CTS_N

L25

GPIO87|UIM2_CLK|UART3_RFR_N

D1

GPIO88|UIM_DATA|UART2_DP_TX_DATA

F11

GPIO64|ETM_PIPESTAT2

GPIO66|ETM_TRACECLK F8

GPIO67|SDRAM1_D16 U6

V4

GPIO68|SDRAM1_D17

GPIO69|SDRAM1_D18 W1

0

1

F

3

C

F

R

G

|

6

O

I

P

G

W2

GPIO70|SDRAM1_D19

GPIO71|SDRAM1_D20 Y1

Y2

GPIO72|SDRAM1_D21

GPIO73|SDRAM1_D22 V6

W4

GPIO74_SDRAM1_D23

0

C

F

R

G

|

3

O

I

P

G

GPIO40|ETM_GPIO_CS_N D6

D7

GPIO42|ETM_PIPESTAT2B

GPIO44|ETM_PIPESTAT0B D8

A4

GPIO45|ETM_TRACESYNC_B

F9

GPIO49|ETM_TRACE_PKT3

B7

GPIO50|ETM_TRACE_PKT4

GPIO51|ETM_TRACE_PKT5 A7

D10

GPIO52|ETM_TRACE_PKT6

H11

GPIO53|ETM_TRACE_PKT7

E

G

N

A

R

_

A

N

L

_

M

F

|

2

C

F

R

G

|

5

O

I

P

G9

D

G26

GPIO29|USB_RX_DATA N23

GPIO30|MMC_CMD L13

D12

GPIO31|MMC_CLK

GPIO32|MMC_DATA H13

AE16

GPIO33|NAND2_FLASH_READY

GPIO35|XMEM2_CS_N2 AC15

AF16

GPIO36|XMEM2_CS_N3

T14

GPIO37|LCD2_EN

AF14

GPIO38|LCD2_CS_N

F7

GPIO39|ETM_KEYSENSE_IRQ_SRC

8

B

H25

GPIO0|SBCK1|WDOG_STB

3

2

T

7

C

F

R

G

|

0

1

O

I

P

G

8

C

F

R

G

|

1

O

I

P

G4

B

5

D

9

C

F

R

G

|

2

1

O

I

P

G

5

2

D

K

L

C

P

_

F

I

M

A

C

|

4

1

O

I

P

G

C

N

Y

S

H

_

F

I

M

A

C

|

5

1

O

I

P

G3

2

E

4

2

A

C

N

Y

S

V

_

F

I

M

A

C

|

6

1

O

I

P

G

N26

GPIO17|USB_SUSPEND

L19 GPIO18|RINGER

GPIO19|SYNTH_LOCK|GP_VLK C26

GPIO1|SBDT1

9

1

V

3

2

V8

3

D

N

G

9

3

D

N

G

3

2

W

4

D

N

G

4

1

E

A

6

2

V0

4

D

N

G

5

D

N

G

5

2

T

6

D

N

G

5

2

G

0

2

B7

D

N

G

9

A8

D

N

G

6

A9

D

N

G

AC22 GND_RET

0

1

B8

2

D

N

G

3

2

F

A9

2

D

N

G

3

D

N

G

2

C

A

4

1

D0

3

D

N

G

1

3

D

N

G

8

1

E

A

6

2

B

A2

3

D

N

G

6

1

A

A3

3

D

N

G

3

2

P4

3

D

N

G

5

3

D

N

G

8

1

B

7

1

F6

3

D

N

G

7

3

D

N

G

0

1

F

A8

1

D

N

G

9

1

D

N

G

5

1

E

A

2

D

N

G

4

P

0

2

D

N

G

5

1

F

A

5

2

M1

2

D

N

G

2

D

N

G

6

2

M

3

2

D

N

G

1

2

A

4

2

D

N

G

1

2

B

5

1

A5

2

D

N

G

5

1

B6

2

D

N

G

0

1

A7

2

D

N

G

AF18

W17 EAR2O

1

D

N

G

2

E

0

1

D

N

G

6

B

1

K1

1

D

N

G

2

1

D

N

G

2

K

1

R3

1

D

N

G

4

1

D

N

G

2

R

1

A

A5

1

D

N

G

6

1

D

N

G

2

A

0

1

E

A7

1

D

N

G

AF3

D2_2

AA7

D2_3 AE5

D2_4

D2_5 AC6

AF5

D2_6

D2_7 AC7

D2_8 AA8

D2_9 W9

F13

DAC_IREF

AC17 EAR1ON

EAR1OP

H4

D1_7

D1_8 H1

D1_9 J4

AB4

D2_0

D2_1 AD1

AA9

D2_10

AE7

D2_11 AC8

D2_12

D2_13 AE8

AF8

D2_14 AC9

D2_15

D1_10

D1_11 K6

J1

D1_12

D1_13 K4

L8

D1_14

D1_15 L6

G4

D1_2

D1_3 H6

J8

D1_4

D1_5 J6

G2

D1_6

2

D

3

2

B5

5

O

I

P

G

|

9

T

K

P

_

E

C

A

R

T

_

M

T

E

|

1

A

T

A

D

_

F

I

M

A

C

6

5

O

I

P

G

|

0

1

T

K

P

_

E

C

A

R

T

_

M

T

E

|

2

A

T

A

D

_

F

I

M

A

C

3

2

A

0

2

F7

5

O

I

P

G

|

1

T

K

P

_

E

C

A

R

T

_

M

T

E

|

3

A

T

A

D

_

F

I

M

A

C

8

5

O

I

P

G

|

2

1

T

K

P

_

E

C

A

R

T

_

M

T

E

|

4

A

T

A

D

_

F

I

M

A

C

2

B

1

2

D9

5

O

I

P

G

|

3

1

T

K

P

_

E

C

A

R

T

_

M

T

E

|

5

A

T

A

D

_

F

I

M

A

C

0

6

O

I

P

G

|

4

1

T

K

P

_

E

C

A

R

T

_

M

T

E

|

6

A

T

A

D

_

F

I

M

A

C

2

A

0

2

D1

6

O

I

P

G

|

5

1

T

K

P

_

E

C

A

R

T

_

M

T

E

|

7

A

T

A

D

_

F

I

M

A

C

CCOMP

AF24

F4

D1_0

D1_1 E1

J2

4

O

I

P

G

|

1

C

F

R

G

|

T

D

B

S

_

X

U

A

8

A

1

D8

O

I

P

G

|

5

C

F

R

G

|

T

S

B

S

_

X

U

A

1

_

E

D

O

M

_

T

O

B

1

2

E

A

1

2

F

A2

_

E

D

O

M

_

T

O

B

3

2

G5

2

O

I

P

G

|

K

L

C

_

T

B

0

2

O

I

P

G

|

A

T

A

D

_

T

B

6

2

D

6

2

E3

2

O

I

P

G

|

K

C

B

S

_

T

B

2

O

I

P

G

|

T

D

B

S

_

T

B

5

2

E

3

2

F4

2

O

I

P

G

|

T

S

B

S

_

T

B

1

2

O

I

P

G

|

N

_

X

R

_

X

T

_

T

B

1

2

G

4

5

O

I

P

G

|

8

T

K

P

_

E

C

A

R

T

_

M

T

E

|

0

A

T

A

D

_

F

I

M

A

C

AF9

AC10 A2_5

A2_6

W11

AA11 A2_7

AC11 A2_8

W12 A2_9

AF19 AUXIN

AE19 AUXIP

AUXON

AC18

AUXOP

AA17

0

1

H7

O

I

P

G

|

4

C

F

R

G

|

K

C

B

S

_

X

U

A

AC12 A2_13

A2_14

T13

A2_15

W13

AA13 A2_16

AE13 A2_17

A2_18

AF13

A2_19

AC13

A2_2

AE9

AA15 A2_20|GPIO34

AA10 A2_3

A2_4

M4 A1_4

N11 A1_5

N8 A1_6

N6 A1_7

A1_8

N2

A1_9

N1

AC5 A2_0

W10 A2_1

A2_10

AE11

AF11 A2_11

AA12 A2_12

A1_16|SDRAM1_D25

A1_17|SDRAM1_D26

T1

T2 A1_18|SDRAM1_D27

A1_19|SDRAM1_D28

R8

A1_2

L4

T4 A1_20|SDRAM1_D29

T6 A1_21|SDRAM1_D30

A1_22|SDRAM1_D31

T8

A1_23|SDRAM1_DQM2|GPIO78

U4

V1 A1_24|SDRAM1_A0|GPIO79

A1_3

M8

U201

A1-11

P2

A1_1

L1

P1 A1_10

A1_12

P6

A1_13

P8

P11 A1_14

R4 A1_15|SDRAM1_D24

R6

C243

R216

V_2.6D V_1.8E

R241

C246

V_2.6A

C210

C232

W_DOG

RCV_P USB_EN

C241

0

R

_

A

P

SPK_EARR

PS_HOLD

GPS_MODE

FOL_CAM

M

I

D

_

L

B

_

D

C

L

M

N

E

_

L

B

_

D

C

L

S

N

E

_

L

B

_

D

C

L

M

CDMA_MODE

MSM_JACK_S

HINT

TA_DET_N

KEY_LED_ON

DRAM1A(7)

DRAM1A(6)

DRAM1A(5)

DRAM1A(4)

DRAM1A(3)

DRAM1A(0)

DRAM1A(2)

DRAM1A(14)

DRAM1A(13)

DRAM1A(12)

DRAM1A(10)

DRAM1A(1)

DRAM1A(11)

A2(4)

A2(3)

A2(20)

A2(2)

A2(19)

A2(18)

A2(17)

A2(16)

A2(15)

A2(14)

A2(13)

A2(12)

A2(11)

A2(10)

A2(1)

NAND_ALE

DRAM1A(9)

DRAM1A(8)

2

_

E

D

O

M

_

T

O

B

1

_

E

D

O

M

_

T

O

B

T

S

B

S

_

X

U

A

T

D

B

S

_

X

U

A

K

C

B

S

_

X

U

A

A2(9)

A2(8)

A2(7)

A2(6)

A2(5)

7

Y

6

Y

5

Y

4

Y

3

Y

2

Y

1

Y

0

Y

2

W

S

_

L

A

H

T

S

R

_

C

D

C

L

R

E

D

L

O

F

D2(15)

D2(14)

D2(13)

D2(12)

D2(11)

D2(10)

D2(1)

D2(0)

D1(9)

D1(8)

D1(7)

D1(6)

D1(5)

D1(4)

D1(3)

D1(2)

D1(15)

D1(14)

D1(13)

D1(12)

D1(11)

D1(10)

D1(1)

D1(0)

C

N

Y

S

V

_

M

A

C

N

Y

S

H

_

M

A

C

K

L

C

P

_

M

A

C

N

O

_

A

D

R

I

DAC_IREF

D2(9)

D2(8)

D2(7)

D2(6)

D2(5)

D2(4)

D2(3)

D2(2)

KEY_SCAN(3)

KEY_SCAN(4)

KEY_SCAN(5)

KEY_SCAN(6)

MA5_IRQ

LCDC_CS

LCDC_SCS

MA5_CS_N

NAND_BUSY

SDA

SCL

SYNTH_LOCK

FOLDER2

N

O

_

X

T

L

E

S

_

K

P

S

DP_RX_DATA1

DP_TX_DATA1

UIM_M_CLK

UIM_M_RESET

UIM_M_DATA

IRDA_RX_DATA

IRDA_TX_DATA

KEY_SCAN(0)

KEY_SCAN(1)

C

R

_

D

X

T

KEY_SCAN(2)

TX_I_M

TX_I_P

RX_I_P

RX_I_M

P

V

_

B

S

U

A

D

S

_

M

A

C

M

V

_

B

S

U

L

C

S

_

M

A

C

T

E

D

_

H

X

U

M

A

_

M

P

C

D

A

_

R

A

E

1

O

P

M

E

T

D

I

_

T

A

B

MIC1P

0

M

Q

D

_

M

A

R

D

ON_SW_SENSE

)

3

(

E

S

N

E

S

_

Y

E

K

)

2

(

E

S

N

E

S

_

Y

E

K

)

1

(

E

S

N

E

S

_

Y

E

K

)

0

(

E

S

N

E

S

_

Y

E

K

L

C

_

M

A

R

D

S

A

R

_

M

A

R

D

MSM_RESIN_N

TX_Q_M

TX_Q_P

RX_Q_P

RX_Q_M

N

O

_

A

P

RE2_N

NAND_CLE

2

_

2

E

D

O

M

1

_

2

E

D

O

M

1

E

D

O

M

0

E

D

O

M

S

M

T

O

D

T

I

D

T

N

E

_

O

X

C

T

TCXO_OUT

K

C

T

N

_

T

N

I

_

M

P

N

O

C

_

T

O

M

SLEEP_XTAL_IN

CLOCK_EN

T

S

B

S

T

D

B

S

K

C

B

S

_

K

C

A

J

K

C

T

R

S

A

C

_

M

A

R

D

5

S

C

_

M

A

R

D

WE2_N

N

_

1

E

W

_

M

A

R

D

555

T

U

O

_

Z

H

M

8

4

N

I

_

Z

H

M

8

4

USB_OE_N

1

M

Q

D

_

M

A

R

D

TRST_N

A2(20:1)

D2(15:0)

DRAM1A(14:0)

RESET_OUT

MICBIAS

5

BAT_ID V_F

TX_AGC_ADJ

5

SPK_EARL

REC_MIC

TRK_LO_ADJ

NAND_CE

RCV_N

LINE_OUT

5

D1(15:0)

KEY_SENSE(3:0)

SCH-E159 Flow Chart of Troubleshooting and Circuit Diagrams

2-7

2-1-3 Abnormal Key Data Input

Check initial status

Check U201 and it's neighboring circuits

Replace key dome sheet

END

Yes

No

Scan1-6,keysense

0-3 signal outputted

From U201?

Normal key data

Input?

Samsung SCH-E159 Bedienungsanleitung

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