RadioProcessor
Specifications
The RadioProcessor is currently available with a 75 MHz Analog-to-Digital A/D) sampling clock frequency.
Specifications for this configuration are given in the table below. For information specific to a certain
RadioProcessor firmware revision, see Appendix VII or contact SpinCore Technologies, Inc.
Parameter Min Typ Max Units
Analog Input A/D Sampling Frequency 75 1) 80 MHz
A/D Sampling Precision 14 bits
Input Voltage Range peak-peak) 1.13 V
Input Frequency Range 100 MHz
Analog Output D/A Sampling Rate 300 MHz
D/A Sampling Precision 14 bits
Output Voltage Range peak-peak) 1.2 2) V
Phase resolution 0.09 deg.
Frequency resolution .28 3) Hz
Digital Output Number of Digital Outputs 4 624 4)
Logical 1 output voltage 3.3 5) V
Logical 0 output voltage 0 V
Output drive current 25 mA
Rise/Fall time < 1 ns
Digital Input
HW_Trig, HW_Reset)
Logical 1 Input voltage 1.7 4.1 V
Logical 0 Input voltage -0.5 0.7 V
Data acquisition Spectral width SW) of acquired data 0.28 Hz 6) 10 MHz 7)
# Complex points 8192 8) 16k
Pulse Program # of Instruction words 1024 9) words
Pulse resolution 10) 13.3 ns
Pulse length 11) 66.6 ns 693 days
Table 1: Product Specifications.
Notes
1): If the signal to be detected is very close to ¼ of the sampling rate, there will be problems with aliasing during the detection
process. To alleviate this problem, a slightly higher or lower clock speed can be used.
2): Analog output voltage is factory adjustable up to 4V. See Transmitter Output Level section on the next page for more
information.
3): Frequency resolution is 30 Hz when using an 80 MHz clock.
4): Custom designs are available. Please contact SpinCore if you require more digital outputs or DDS registers).
5): This is the value seen without using termination. When the line is terminated with 50Ω, the output voltage will be slightly lower.
6): This value is with the FIR filter Enabled. With FIR bypassed, min SW is 72 Hz. Some older designs have a min SW of 4.5 Hz
1.2 kHz with FIR Enabled).
7): This number is dependent on the A/D clock frequency i.e., A/D clock frequency divided by 8). NOTE: when acquiring data
directly from A/D, the spectral width is ½ the A/D clock frequency.
8): Fewer points may be observed, however, the number of points retrieved from board memory must be a multiple of 8k.
9): 4096 maximum words for several firmware versions, including, 12-15. Please contact SpinCore for more information.
10): Pulse resolution equals one clock period of the master clock oscillator.
11): Minimum pulse width is five clock periods of the master clock oscillator. Maximum pulse width is 2^52 clock periods of the
master clock oscillator.
2020-10-07 9
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