Texas Instruments C2000 Piccolo LaunchPad Bedienungsanleitung

C2000™ Microcontroller Workshop

Workshop Guide and Lab Manual

F28xMcuMdw

Revision 5.0

May 2014

Technical Training

Organization

Important Notice

ii C2000 Microcontroller Workshop - Introduction

Important Notice

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safeguards must be provided by the customer to minimize inherent or procedural hazards.

TI assumes no liability for applications assistance or customer product design. TI does not warrant or

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Revision History

September 2009 – Revision 1.0

May 2010 – Revision 2.0

December 2010 – Revision 2.1

July 2011 – Revision 3.0

September 2011 – Revision 3.1

October 2012 – Revision 4.0

May 2014 – Revision 5.0

Mailing Address

Texas Instruments

Training Technical Organization

6500 Chase Oaks Blvd Building 2

M/S 8437

Plano, Texas 75023

C2000™ Microcontroller Workshop

C2000 Microcontroller Workshop - Introduction iii

C2000™ Microcontroller Workshop

Texas Instruments

Technical Training

C2000 is trademarks of Texas Instruments.

The objective of this workshop is to gain a fully understand and a complete working knowledge

of the C2000 microcontroller. This will be accomplished through detailed presentations and

hands-on lab exercises.

The workshop will start with the basic topics and progress to more advanced topics in a logical

flow such that each topic and lab exercise builds on the previous one presented. At the end of the

workshop, you should be confident in applying the skills learned in your product design.

C2000™ Microcontroller Workshop

iv C2000 Microcontroller Workshop - Introduction

C2000™ Microcontroller Workshop Outline

1. Architecture Overview

2. Programming Development Environment Lab: Linker command file

3. Peripheral Register Header Files

4. Reset and Interrupts

5. System Initialization Lab: Watchdog and interrupts

6. Analog-to-Digital Converter Lab: Build a data acquisition system

7. Control Peripherals Lab: Generate and graph a PWM waveform

8. Numerical Concepts Lab: Low-pass filter the PWM waveform

9. Direct Memory Access (DMA) Lab: Use DMA to buffer ADC results

10. Control Law Accelerator (CLA) Lab: Use CLA to filter PWM waveform

11. Viterbi, Complex Math, CRC Unit (VCU)

12. System Design Lab: Run the code from flash memory

13. Communications

14. Support Resources

Required Workshop Materials

http://processors.wiki.ti.com/index.php/

C2000_Piccolo_Multi-Day_Workshop

F28069 Experimenter’s Kit

(TMDXDOCK28069)

Install Code Composer Studio v6.0.0

Run the workshop installer

C2000 Microcontroller Workshop-5.0-Setup.exe

Lab Files / Solution Files

Student Guide and Documentation

The materials required for this workshop are available using the links shown at the top of this

slide. An F28069 Experimenter’s Kit and a jumper wire will be needed for the lab exercises. The

C2000™ Microcontroller Workshop

C2000 Microcontroller Workshop - Introduction v

lab directions are written based on the version of Code Composer Studio as shown on this slide.

The workshop installer will automatically install the lab files, solution files, workshop manual,

and documentation.

C2000™ Experimenter Kit

controlCARD

USB Docking Station

The development tool for this workshop will be the TMS320F28069 Experimenter’s Kit. The kit

consists of a controlCARD and USB Docking Station. It is a self-contained system that plugs

into a free USB port on your computer. The USB port provides power, as well as communicates

to the onboard JTAG emulation controller. LED LD1 on the Docking Station and LED LD1 on

the controlCARD illuminates when the board is powered. LED LD2 on the controlCARD is

connected to GPIO34. We will be using this LED as a visual indicator during the lab exercises.

The GPIO and ADC lines from the F28069 device are pinned out to the Docking Station headers.

We will be using a jumper wire to connect various GPIO and ADC lines on these headers.

C2000™ Microcontroller Workshop

vi C2000 Microcontroller Workshop - Introduction

C2000 Delfino / Piccolo Comparison

F2833x F2803x F2806x

Clock

150 MHz 60 MHz 90 MHz

Flash / RAM

128Kw / 34Kw 64Kw / 10Kw 128Kw / 50Kw

-chip Oscillators - 2 2

VREG / POR / BOR

- 

Watchdog

Timer 

-bit ADC SEQ -based SOC -based SOC -based

Analog COMP

w/ DAC - 

FPU

-

-Channel DMA -

CLA

- 

VCU

- - 

ePWM

/ HR ePWM /   /   / 

eCAP

/ HR eCAP / -/ -/ 

eQEP



SCI / SPI / I2C



LIN

--

McBSP

-

USB

- - 

External Interface

- -

When comparing the Delfino and Piccolo product lines, you will notice that the Piccolo F2806x

devices share many features with the Delfino product line. The Delfino product line is shown in

the table by the F2833x column; therefore, the F28069, being the most feature-rich Piccolo

device, was chosen as the platform for this workshop. The knowledge learned from this device

will be applicable to all C2000 product lines.

C2000 Microcontroller Workshop - Architecture Overview 1 - 1

Architecture Overview

Introduction

This architectural overview introduces the basic architecture of the C2000™ Piccolo™ series of

microcontrollers from Texas Instruments. The Piccolo™ series adds a new level of general

purpose processing ability unseen in any previous DSP/MCU chips. The C2000™ is ideal for

applications combining digital signal processing, microcontroller processing, efficient C code

execution, and operating system tasks.

Unless otherwise noted, the terms C28x, F28x and F2806x refer to TMS320F2806x devices

throughout the remainder of these notes. For specific details and differences please refer to the

device data sheet and user’s guide.

Module Objectives

When this module is complete, you should have a basic understanding of the F28x architecture

and how all of its components work together to create a high-end, uniprocessor control system.

Module Objectives

Review the F28x block diagram and

device features

Describe the F28x bus structure and

memory map

Identify the various memory blocks on

the F28x

Identify the peripherals available on

the F28x

Module Topics

1 - 2 C2000 Microcontroller Workshop - Architecture Overview

Module Topics

Architecture Overview...............................................................................................................................1-1

Module Topics..........................................................................................................................................1-2

What is the TMS320C2000™?.................................................................................................................1-3

TMS320C2000™ Internal Bussing .....................................................................................................1-4

F28x CPU + FPU + VCU and CLA........................................................................................................1-5

Special Instructions..............................................................................................................................1-6

Pipeline Advantage..............................................................................................................................1-7

F28x CPU + FPU + VCU Pipeline......................................................................................................1-8

Memory....................................................................................................................................................1-9

Memory Map.......................................................................................................................................1-9

Code Security Module (CSM)...........................................................................................................1-10

Peripherals.........................................................................................................................................1-10

Fast Interrupt Response.........................................................................................................................1-11

Summary ................................................................................................................................................1-12

What is the TMS320C2000™?

C2000 Microcontroller Workshop - Architecture Overview 1 - 3

What is the TMS320C2000™?

The TMS320C2000™ is a 32-bit fixed point microcontroller that specializes in high performance

control applications such as, robotics, industrial automation, mass storage devices, lighting,

optical networking, power supplies, and other control applications needing a single processor to

solve a high performance application.

TMS320F2806x Block Diagram

Sectored

Flash

Program Bus

Data Bus

RAM

Boot

ROM

32-bit

Timers

PIE

Interrupt

Manager

eQEP

Watchdog

I2C

SCI

SPI

GPIO

eCAP

CLA

CAN 2.0B

12-bit ADC

CLA Bus

32x32 bit

Multiplier

CPU

R-M-W

Atomic

ALU

FPU

VCU

DMA

6 Ch.

DMA Bus

McBSP

ePWM

USB 2.0

This block diagram represents an overview of all device features and is not specific to any one

device. The F28069 device is designed around a multibus architecture, also known as a modified

Harvard architecture. This can be seen in the block diagram by the separate program bus and data

bus, along with the link between the two buses. This type of architecture greatly enhances the

performance of the device.

In the upper left area of the block diagram, you will find the memory section, which consists of

the boot ROM, sectored flash, and RAM. Also, you will notice that the six-channel DMA has its

own set of buses.

In the lower left area of the block diagram, you will find the execution section, which consists of

a 32-bit by 32-bit hardware multiplier, a read-modify-write atomic ALU, a floating-point unit,

and a Viterbi complex math CRC unit. The control law accelerator coprocessor is an independent

and separate unit that has its own set of buses.

The peripherals are grouped on the right side of the block diagram. The upper set is the control

peripherals, which consists of the ePWM, eCAP, eQEP, and ADC. The lower set is the

communication peripherals and consists of the multichannel buffered serial port, I2C, SCI, SPI,

CAN, and USB.

The PIE block, or Peripheral Interrupt Expansion block, manages the interrupts from the

peripherals. In the bottom right corner is the general-purpose I/O. Also, the CPU has a watchdog

module and three 32-bit general-purpose timers available.

What is the TMS320C2000™?

1 - 4 C2000 Microcontroller Workshop - Architecture Overview

TMS320C2000™ Internal Bussing

As with many DSP-type devices, multiple busses are used to move data between the memories

and peripherals and the CPU. The F28x memory bus architecture contains:

•A program read bus (22-bit address line and 32-bit data line)

•A data read bus (32-bit address line and 32-bit data line)

•A data write bus (32-bit address line and 32-bit data line)

Program-read Data Bus (32)

F28x CPU Internal Bus Structure

Data-write Address Bus (32)

Program Address Bus (22)

Execution

R-M-W

Atomic

ALU

Real-Time

JTAG

Emulation

Program

Decoder

XAR0

XAR7

DP @X

ARAU MPY32x32

ACC

ALU

Registers Debug

Data/Program-write Data Bus (32)

Data-read Address Bus (32)

Data-read Data Bus (32)

FPU

R0H-R7H

Program

Memory

Data

Memory

Peripherals

VCU

VR0-VR8

CLA

MR0-MR3

The 32-bit-wide data busses provide single cycle 32-bit operations. This multiple bus

architecture, known as a Harvard Bus Architecture, enables the F28x to fetch an instruction, read

a data value and write a data value in a single cycle. All peripherals and memories are attached to

the memory bus and will prioritize memory accesses.

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