Texas Instruments ADS8028EVM-PDK Bedienungsanleitung

SBAU198A–April 2012–Revised February 2016

ADS8028EVM-PDK

ADCPro is a trademark of Texas Instruments.

Microsoft, Windows are registered trademarks of Microsoft Corporation.

SPI is a trademark of Motorola.

All other trademarks are the property of their respective owners.

User's Guide

SBAU198A–April 2012–Revised February 2016

ADS8028EVM-PDK

Figure 1. ADS8028EVM-PDK

This user's guide describes the characteristics, operation, and use of the ADS8028EVM-PDK. This

evaluation module and performance development kit (EVM-PDK) is an evaluation system for the

ADS8028, a 12-bit, 1-MSPS, 8-channel, successive approximation register (SAR) analog-to-digital

converter (ADC). The EVM-PDK allows evaluation of all aspects of the ADS8028 device.

This document includes an EVM QuickStart section, hardware and software details, bill of materials, and

schematic.

The following related documents are available through the Texas Instruments web site at

http://www.ti.com.

Table 1. EVM-Compatible Device Data Sheets

Device Literature Number

ADS8028 SBAS549

OPA836 SLOS712

REF5025 SBOS410

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ADS8028EVM-PDK

Contents

1 EVM Overview ............................................................................................................... 3

2 EVM Setup.................................................................................................................... 4

3 ADS8028EVM Hardware Details .......................................................................................... 6

4 Using the ADS8028EVM-PDK with ADCPro ........................................................................... 11

5 Schematics and Bill of Materials ......................................................................................... 13

List of Figures

1 ADS8028EVM-PDK ......................................................................................................... 1

2 Jumper Locations and Default Settings................................................................................... 4

3 Headers and Pin Numbers ................................................................................................. 6

4 Analog Input Header Schematic........................................................................................... 7

5 Digital Interface Header Schematic ....................................................................................... 8

6 Power Header Schematic .................................................................................................. 9

7 EVM Voltage Reference Schematic ..................................................................................... 10

8 ADCPro: ADS8028EVM Panel ........................................................................................... 11

9 ADCPro: Channel Selection Tab......................................................................................... 12

10 ADCPro: Controls Tab..................................................................................................... 12

List of Tables

1 EVM-Compatible Device Data Sheets .................................................................................... 1

2 Related Documents.......................................................................................................... 3

3 Default Jumper Configurations............................................................................................. 4

4 Critical Connections ......................................................................................................... 6

5 ADS8028EVM Bill of Materials .......................................................................................... 14

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EVM Overview

SBAU198A–April 2012–Revised February 2016

ADS8028EVM-PDK

1 EVM Overview

The ADS8028EVM-PDK is designed to evaluate the ADS8028. The ADS8028 is a 12-bit, 8-channel,

multiplexed, SAR ADC, with a maximum throughput rate of 1 MSPS. The ADS8028 also offers an internal

2.5-V voltage reference and internal temperature sensor with 0.25°C resolution. The ADS8028EVM allows

access to every pin of the converter and makes it easy to connect the ADS8028 SPI™-compatible serial

interface to any host microprocessor or TI DSP based system with 1.8-V, 3.3-V, or 5-V logic capability.

The ADS8028EVM-PDK combines the ADS8028EVM daughtercard with the digital sensor processor

(DSP)-based MMB0 motherboard and ADCPro™ evaluation software for complete evaluation of the

ADS8028.

1.1 Features

ADS8028EVM Features

• Easy-to-use ADCPro evaluation software for Microsoft®Windows®operating systems

• Built-in analysis tools for ADCPro, including scope, FFT, and histogram displays

• Simple device operation with full control of single 16-bit control register

• Data collection to text files

• 1.8-V, 3.3-V, or 5-V logic compatible with 16-bit, 20-MHz SPI Interface

• Contains all support circuitry needed for the ADS8028:

– Voltage reference options: ADS8028 (2.5 V) internal reference, on-board REF5025 (2.5 V)

reference, or external reference

– Two on-board OPA836 (205-MHz unity-gain bandwidth / 1-mA quiescent current) ADC input drivers

– Power supplied by MMB0 motherboard

• Compatible with the TI modular EVM system

ADS8028EVM-PDK Features

The ADS8028EVM-PDK includes the ADS8028EVM board with the DSP-based MMB0 motherboard, that

can be used with ADCPro to quickly evaluate the device.

This manual covers the operation of the ADS8028EVM-PDK. Throughout this document, the abbreviation

EVM and the term evaluation module are synonymous with the ADS8028EVM.

Related Documentation from Texas Instruments

The related documents listed in Table 2 are available for download through the Texas Instruments web

site at www.ti.com.

Table 2. Related Documents

Device Literature Number

ADS8028 SBAS549

EVM Setup

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4SBAU198A–April 2012–Revised February 2016

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ADS8028EVM-PDK

2 EVM Setup

This section is a quick guide to begin evaluating the ADS8028EVM with ADCPro.

2.1 Default Jumper Configuration

Figure 2 shows the location of jumpers on the EVM and their respective factory default settings.

Figure 2. Jumper Locations and Default Settings

Table 3 lists the jumpers on the ADS8028EVM and their factory default settings.

Table 3. Default Jumper Configurations

Jumper Default Position Description

J-1 Open 1.8-V logic not selected

J-3 Short 3.3-V logic selected (BVDD = 3.3 V)

J-5 Open 5-V logic not selected

J-CS Pins 1-2 (Down) MMB0 FSX pin connected to CS

J-REF Pins 2-3 (Right) Allows for external voltage reference input or internal voltage reference output

CAUTION

Only one of the digital interface jumpers (J-1, J-3, or J-5) should be shorted at a

time to prevent large reverse currents that could potentially damage voltage

regulators on the MMB0 motherboard.

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EVM Setup

SBAU198A–April 2012–Revised February 2016

ADS8028EVM-PDK

2.2 ADS8028EVM-PDK Kit Operation

To prepare to evaluate the ADS8028 with the ADS8028EVM-PDK, complete the following steps:

1. Verify the ADS8028EVM jumper settings from the factory as shown in Figure 2 and also listed in

Table 3.

2. Install ADCPro and the ADS8028EVM plug-in software. Complete hardware connections and driver

installation as per the ADCPro HW/SW Installation Manual. Use the following jumper settings on the

MMB0 to configure power with the external supply.

• MMB0 J12 →Short (power supplied to the MMB0 through MMB0 J2 jack)

• MMB0 J13A →Open (+VA supply is not used on the ADS8028EVM)

• MMB0 J13B →Short (power supplied to the ADS8028EVM through the MMB0 J5 header)

• No additional power connections are required

3. Plug the ADS8028EVM onto the MMB0 motherboard. The female portion of J-ANALOG, J-DIGITAL,

and J-POWER on the bottom of the EVM align with male connectors J7, J4, and J5 (respectively) on

the MMB0.

4. Connect the included USB cable to J1 on the MMB0 and to an unused USB port on the computer with

ADCPro installed.

5. Connect an external supply (using the included CA-2186 cable) to the MMB0.

Pin 1 2

3 4

9 10

15 16

Pin 1 2

3 4

9 10

15 16

Pin 1

2 4 6 8 10

3 5 7 9

J-ANALOG.1 J-DIGITAL.1

J-POWER.1

ADS8028EVM Hardware Details

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ADS8028EVM-PDK

3 ADS8028EVM Hardware Details

Figure 3 shows the location of headers J-ANALOG, J-DIGITAL, and J-POWER and their assigned pin

numbers. The notation J-NAME.<#> is used in this user's guide for identifying header pins. For example,

J-ANALOG.1 refers to pin 1 on the J-ANALOG header.

Figure 3. Headers and Pin Numbers

Table 4 provides a quick summary of the connections required for operation of the ADS8028. The purpose

of the MMB0 motherboard is to provide power and SPI communication to the ADS8028EVM. Analog

inputs of interest must be applied to the ADS8028EVM by the user. For a complete list of connections and

pins, refer to the ADS8028EVM schematic in Section 5.2.

(1) Only one digital supply connection (BVDD) is required when evaluating the ADS8028EVM as a stand-alone board. Check that

the corresponding jumper (J-1, J-3, or J-5) is correctly selected to power the ADS8028 digital interface.

(2) AGND and DGND are shorted on the ADS8028EVM.

(3) All ADS8028 analog inputs are single-ended and connect between the even and odd pins on the J-ANALOG header. All odd

pins on J-ANALOG are connected to AGND.

Table 4. Critical Connections

Function Header and Pin Pin Name Description

SPI

CS J-DIGITAL.7 FSX Chip select; active low logic input

SCLK J-DIGITAL.3 CLKX SCLK

DIN J-DIGITAL.11 DX Data In

DOUT J-DIGITAL.13 DR Data Out

TM_BUSY J-DIGITAL.15 INT Busy output; high during temperature conversion

Power

1.8V J-POWER.7 +1.8VD Digital interface supply (BVDD)(1)

3.3V J-POWER.9 +3.3VD Digital interface supply (BVDD)(1)

5.0V J-POWER.10 +5VD Digital interface supply (BVDD)(1)

5.0V (AVDD) J-POWER.3 +5VA Analog operation supply (AVDD)

GND J-POWER.5 and

J-POWER.6 DGND and

AGND Digital and Analog supply grounds(2)

Analog inputs Channels 0 and 1 J-ANALOG.1-4 — Analog Inputs (Buffered)(3)

Channels 2 to 7 J-ANALOG.5-16 — Analog Inputs(3)

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ADS8028EVM Hardware Details

SBAU198A–April 2012–Revised February 2016

ADS8028EVM-PDK

3.1 Analog Inputs

The ADS8028 provides eight single-ended input channels plus an internal temperature sensor. The eight

analog input channels to the ADS8028 (AIN0 to AIN7) are connected to J-ANALOG on the ADS8028EVM.

Channels 0 and 1 are buffered converter inputs. The OPA836 is configured as a unity-gain buffer on these

channels. Channels 2 to 7 connect directly to the converter with an option to add an RC filter before the

converter input. Figure 4 shows the EVM schematic portion of the analog inputs. All discrete resistors and

capacitors shown in Figure 4 are size 0603 and can be modified to adjust circuit gain and filtering. Note

that not all components shown in Figure 4 are installed and have values "NI" (not installed).

Optionally, the user can add an SMA connector at J-SMA and use an SMA input for channels 0 and 1 if

an SMA connection is more convenient. RS0 and RS1 resistors select the SMA input channel. If the SMA

input has a 50-Ωsource impedance, R10 and other input resistors can be modified for impedance

matching, otherwise they can provide signal attenuation and input current limiting.

Figure 4. Analog Input Header Schematic

NOTE: All odd pins on J-ANALOG connect to GND. Therefore, all analog input connections can be

easily made across even and odd pin numbers (The channel 0 input connects to J-

ANALOG.1-2, channel 1 input connects to J-ANALOG.3-4, etc.).

ADS8028EVM Hardware Details

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ADS8028EVM-PDK

3.2 Digital Control

The SPI digital control signals are applied directly to the J-DIGITAL header on the ADS8028EVM. When

using the ADS8028EVM-PDK (the combination of the ADS8028EVM, MMB0 motherboard, and ADCPro

software), these signals are supplied by the MMB0 motherboard through J4. If the ADS8028EVM is

instead evaluated as a stand-alone board, these signals must be supplied by another microcontroller or

processor according to the timing characteristics in the ADS8028 data sheet.

Figure 5 shows the schematic connections to the J-DIGITAL header. The CS signal can be routed to J-

DIGITAL.1 or J-DIGITAL.7 (default) through the J-CS jumper. Ensure that the J-CS jumper is positioned to

route CS to J-DIGITAL.7 (short pins J-CS.1-2) for proper SPI communication when using the

ADS8028EVM-PDK. Additionally, the S1 push-button switch allows the user to manually reset and power-

down the ADS8028 and OPA836 op amps on the ADS8028EVM while the button is held. When the button

is released, the ADS8028 powers up with default conditions.

Figure 5. Digital Interface Header Schematic

NOTE: By default, the J-CS jumper on the ADS8028EVM is shorted between pins J-CS.1-2. This

setting is required for proper SPI communication between the MMB0 motherboard and the

ADS8028.

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ADS8028EVM Hardware Details

SBAU198A–April 2012–Revised February 2016

ADS8028EVM-PDK

3.3 Power Supply

The ADS8028EVM requires two power-supply rails: one 5-V analog supply (AVDD) and a configurable

digital interface (BVDD). Three selectable voltages are available for the digital interface to make the EVM

compatible with different logic levels. Jumpers J-1, J-3, and J-5 on the ADS8028EVM select 1.8-V, 3.3-V,

or 5-V BVDD digital interface voltages, respectively. Refer to Table 3 for the ADS8028EVM jumper

functions and default settings. The default jumper settings of J-1 (open), J-3 (short), and J-5 (open) are

recommended when using the ADS8028EVM with the MMB0 3.3-V logic.

Power rails are supplied to the ADS8028EVM through the J-POWER header. If the ADS8028EVM is being

evaluated as a stand-alone board, the user must supply power to the J-POWER header by direct

connections to a power supply. Otherwise, the MMB0 motherboard supplies the ADS8028EVM with power

through J-5 when the ADS8028EVM daughtercard is mounted on the MMB0. Check the MMB0 jumper

settings listed in the ADS8028EVM-PDK Kit Operation section if the ADS8028EVM is not receiving power

when connected to the MMB0 motherboard. Figure 6 shows a schematic of J-POWER header

connections on the ADS8028EVM.

Figure 6. Power Header Schematic

CAUTION

Do not apply voltages that the exceed the absolute maximum ratings of the

installed components. The absolute maximum supply voltage of the OPA836

limits the maximum analog supply voltage of the ADS8028EVM to 5.5 V. The

digital supply voltage should not exceed the analog supply voltage.

ADS8028EVM Hardware Details

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ADS8028EVM-PDK

3.4 Voltage Reference

The ADS8028EVM allows the user flexibility to select different voltage reference sources for the ADS8028.

Options include the:

• ADS8028 internal 2.5-V voltage reference,

• Onboard REF5025 2.5-V reference, or

• External reference source

When the ADS8028 powers up, the internal 2.5-V reference is selected as the reference source by

default. To use an external reference source, the internal voltage reference must be disabled by

performing a serial interface write to the ADS8028 control register to update bit 2. When using an external

source, shorting pins J-REF.1-2 uses the REF5025 external 2.5-V reference. If a reference voltage other

than 2.5 V is needed, the REF5025 can be replaced with any other reference in the REF50xx family.

Shorting pins J-REF.2-3 connects J-ANALOG.20 to the ADS8028 reference input. This short allows the

user to output the internal ADS8028 voltage reference to another circuit or allows a external reference

voltage to be applied to the ADS8028 reference input when the internal reference is disabled. The

allowable voltage range for an external voltage reference is 1 V to AVDD (5 V when the ADS8028EVM is

used with the MMB0).

Figure 7. EVM Voltage Reference Schematic

CAUTION

The user should avoid connecting any external voltage reference to the

ADS8028 before a serial write to the ADS8028 control register disables the

internal reference source. Providing an external source prior to this

communication draws additional current from the external source. The

ADS8028 internal protection circuitry limits this current to 20 mA.

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