Texas Instruments CDC7005 Bedienungsanleitung

CDC7005 (BGA Package)

Evaluation Module Manual

High Performance Analog/CDC

2005 Clock Drivers

User’s Guide

SCAU005C

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EVM IMPORTANT NOTICE

Texas Instruments (TI) provides the enclosed product(s) under the following conditions:

This evaluation kit being sold by TI is intended for use for ENGINEERING DEVELOPMENT OR EVALUATION

PURPOSES ONLY and is not considered by TI to be fit for commercial use. As such, the goods being provided

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As a prototype, this product does not fall within the scope of the European Union directive on electromagnetic

compatibility and therefore may not meet the technical requirements of the directive.

Should this evaluation kit not meet the specifications indicated in the EVM User’s Guide, the kit may be returned

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The user assumes all responsibility and liability for proper and safe handling of the goods. Further, the user

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TI assumes no liability for applications assistance, customer product design, software performance, or

infringement of patents or services described herein.

Please read the EVM User’s Guide and, specifically, the EVM Warnings and Restrictions notice in the EVM

User’s Guide prior to handling the product. This notice contains important safety information about temperatures

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EVM WARNINGS AND RESTRICTIONS

It is important to operate this EVM within the supply voltage range of 3 V and 3.6 V.

Exceeding the specified input range may cause unexpected operation and/or irreversible

damage to the EVM. If there are questions concerning the input range, please contact a TI

field representative prior to connecting the input power.

Applying loads outside of the specified output range may result in unintended operation and/or

possible permanent damage to the EVM. Please consult the EVM User’s Guide prior to

connecting any load to the EVM output. If there is uncertainty as to the load specification,

please contact a TI field representative.

During normal operation, some circuit components may have case temperatures greater than

45°C. The EVM is designed to operate properly with certain components above 60°C as long

as the input and output ranges are maintained. These components include but are not limited

to linear regulators, switching transistors, pass transistors, and current sense resistors. These

types of devices can be identified using the EVM schematic located in the EVM User’s Guide.

When placing measurement probes near these devices during operation, please be aware

that these devices may be very warm to the touch.

Mailing Address:

Texas Instruments

Post Office Box 655303

Dallas, Texas 75265

Related Documentation From Texas Instruments

iii

Preface

Read This First

About This Manual

This manual explains how to use the CDC7005 evaluation module and to pro-

vide the guidelines to build the customer’s own systems. The manual includes

schematics, layout, bill of materials, and a software description.

How to Use This Manual

This document contains the following chapters:

-Chapter 1—Introduction

-Chapter 2—Quick Start

-Chapter 3—EVM Hardware

-Chapter 4—Serial Peripheral Interface (SPI) Software

-Chapter 5—Schematics, Board Layout, and Parts List

Related Documentation From Texas Instruments

-CDC7005 Data Sheet, SCAS685, Texas Instruments

FCC Warning

This equipment is intended for use in a laboratory test environment only. It

generates, uses, and can radiate radio frequency energy and has not been

tested for compliance with the limits of computing devices pursuant to subpart

J of part 15 of FCC rules, which are designed to provide reasonable protection

against radio frequency interference. Operation of this equipment in other

environments may cause interference with radio communications, in which

case the user at his own expense will be required to take whatever measures

may be required to correct this interference.

If You Need Assistance. . .

If you need assitance with this device, please email

[email protected]

Contents

1 Introduction 1-1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

1.1 CDC7005 Functional Block Diagram 1-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

2 Quick Start 2-1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

3 EVM Hardware 3-1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

3.1 Board View and Connector Location 3-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

3.2 Connector Description 3-4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

3.3 Hardware Configuration 3-4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

3.3.1 Power Supply (P1, P2) 3-4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

3.3.2 Onboard Switches and Indicators (S1−S2, D1−D4) 3-4. . . . . . . . . . . . . . . . . . . . . .

3.3.3 Programming Interfaces (J27, J28) 3-5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

3.3.4 Loop Filter (J29−J35) 3-5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

3.3.5 High-Speed Outputs and Inputs (J6−J15 and J19−J20) 3-5. . . . . . . . . . . . . . . . . . .

3.3.6 VCXO Inputs and Outputs (J23−J28) 3-6. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

4 Serial Peripheral Interface (SPI) Software 4-1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

4.1 Functional Description 4-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

4.2 Software Installation 4-3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

5 Application Level Circuit Diagram 5-1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

5.3.1 Passive Loop Filter 5-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

5.3.2 Active Loop Filter—Internal Operational Amplifier 5-3. . . . . . . . . . . . . . . . . . . . . . . .

5.3.3 Active Loop Filter—External Operational Amplifier 5-4. . . . . . . . . . . . . . . . . . . . . . .

6 Parts List, Board Layouts, and Schematics 6-1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

6.1 Parts List 6-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

6.2 Board Layout 6-4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

6.3 Schematic 6-9. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Contents

Figures

3−1 Board View 3-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

4−1 Screen View 4-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

5−2 CDC7005 With a Passive Loop Filter Configuration 5-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

5−3 CDC7005 With an Active Loop Filter Using a CDC7005 Integrated OPA 5-3. . . . . . . . . . . . . .

5−4 CDC7005 With an Active Loop Filter Using OPA341 5-4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

6−1 Component View and Silkscreen 6-5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

6−2 Top Layer View 6-6. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

6−3 Bottom Layer View 6-7. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

6−4 Ground Plane View 6-8. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

6−5 Power Layer View 6-9. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Tables

3−1 Connectors, Switches, and Indicators 3-4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

3−2 Filter Configurations 3-5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

1-1

Introduction

The CDC7005 is a high-performance, low phase noise and low skew clock

synchronizer that synchronizes an on-board voltage controlled crystal

oscillator (VCXO) frequency to an external reference clock. The device

operates up to 800 MHz. The PLL loop bandwidth and damping factor can be

adjusted to meet different system requirements by selecting the external

VCXO, loop filter components, frequency for PFD, and charge pump current.

Each of the five differential LVPECL outputs can be programmed by a serial

peripheral interface (SPI). The SPI allows individual control of the frequency

and enable/disable state of each output. As the system requires external

components like a loop filter and VCXO, this EVM provides an excellent way

to evaluate and modify the performance and parameters of the clock system

in conjunction with the specific customer application. Loop bandwidth can be

selected as low as 10 Hz or less, allowing this device to clean the system’s

clock jitter. The CDC7005 can be used as a simple 1:5 LVPECL buffer with

output dividing options.

Topic Page

1.1 CDC7005 Functional Block Diagram 1-2. . . . . . . . . . . . . . . . . . . . . . . . . . . .

Chapter 1

CDC7005 Functional Block Diagram

1-2

1.1 CDC7005 Functional Block Diagram

/16

PFD Charge

Pump

HOLD

OPA

SPI LOGIC

MUX_SEL

REF_IN

CTRL_LE

CTRL_DATA

CTRL_CLK

VCXO_IN

VCXO_INB

Y4B

Y3B

Y2B

Y1B

Y0B

CP_OUT

STATUS_LOCK

STATUS_VCXO

STATUS_REF

OPA_OUT

OPA_IN

OPA_IP

P Divider

Reference

I_REF

NRESET

NPD

PECL

Latch

PECL

Input

PECL

MUX0

PECL

Latch

PECL

Latch

PECL

Latch

PECL

Latch

PECL

MUX1

PECL

MUX2

PECL

MUX3

PECL

MUX4

PECL

Output

PECL

Output

PECL

Output

PECL

Output

PECL

Output

PECL-TO-

LVTTL

LVCMOS

Input

Prgm Delay

−

Prgm Divider

Prgm Delay

Prgm Divider

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