Texas Instruments LP8754EVM Bedienungsanleitung

Using the LP8754EVM Evaluation Module

User's Guide

Literature Number: SNVU369

August 2014

SmartReflex is a trademark of Texas Instruments Incorporated.

All other trademarks are the property of their respective owners.

Contents

1 Overview............................................................................................................................. 4

2 Quick Setup Guide ............................................................................................................... 4

2.1 Installing/Opening the Software ....................................................................................... 5

2.2 Power Supply Setup ..................................................................................................... 6

2.3 Notes on Efficiency Measurement Procedure........................................................................ 7

3 GUI Overview....................................................................................................................... 7

3.1 Main Tab .................................................................................................................. 7

3.2 Other Tabs and Menus.................................................................................................. 8

3.3 Console.................................................................................................................... 9

4 Bill of Materials .................................................................................................................. 10

5 Board Layout..................................................................................................................... 11

6 LP8754 Schematic.............................................................................................................. 14

2Table of Contents SNVU369–August 2014

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List of Figures

1 LP8754EVM .................................................................................................................. 4

2 Evaluation Software Graphical User Interface (GUI) When USB Board Connected................................ 5

3 Evaluation Software GUI Showing Steps Needed to Power up the LP8754 ........................................ 6

4 Top view of the LP8754EVM ............................................................................................. 11

5 Component placement near the LP8754. Capacitors marked with X are optional. ............................... 12

6 Top-layer. Input capacitors are placed close to the LP8754 and routed on top layer. GND nets are

connected to the GND plane (2nd layer) with microvias. VIN nets are connected to the VIN plane (3rd

layer) with vias in pads of the input capacitors. VOUT pads of the output capacitors and inductors are

connected together with large copper area. ............................................................................ 12

7 2nd Layer (GND). GND plane kept intact under the high current traces to provide shortest possible

return path for high frequencies. ........................................................................................ 12

8 3rd Layer (VIN). Plane kept intact around the LP8754. Below the LP8754 is small ground area

connecting the microvias (from 3rd to bottom layer) and buried vias (from 2nd to 3rd layer). .................. 12

9 Bottom-Layer and Silk. Footprints for optional input capacitors C32 and C33. GND filling in bottom layer

for sinking heat through the GND vias................................................................................... 12

10 3D View Showing the LP8754 and Nearest Components ........................................................... 12

List of Tables

1 Mode Information ............................................................................................................ 8

2 I2C-Compatible Bus Support ............................................................................................... 8

3 Console Macros.............................................................................................................. 9

SNVU369–August 2014 List of Figures

User's Guide

SNVU369–August 2014

The LP8754 Evaluation Module

This user’s guide describes the operation of the evaluation module for the LP8754 Multi-Phase 6-Core

Step-Down Converter from Texas Instruments (TI). The user’s guide also provides design information

including the schematic and Bill of Materials (BOM).

1 Overview

The LP8754EVM customer evaluation module demonstrates the integrated circuit LP8754 from TI. The

LP8754 is a high-performance, multi-phase step-down converter designed to meet the power

management requirements of the latest applications processors in portable applications. The device

contains six step-down converter cores, which are bundled together in a 6-phase buck converter. This

document covers user software provided with the EVM and design documentation that includes

schematics and parts list.

Figure 1. LP8754EVM

The evaluation module consists of two PCB boards, the LP8754 Evaluation Board, and the USB Interface

Board. The boards are of the same size, and the LP8754 board is stacked on top of the USB Interface

Board.

2 Quick Setup Guide

Many of the components on the LP8754 are susceptible to damage by electrostatic discharge (ESD).

Customers are advised to observe proper ESD handling precautions when unpacking and handling the

EVM, including the use of a grounded wrist strap at an approved ESD workstation.

On opening the LP8754EVM package, ensure that the following items are included:

• LP8754 Evaluation Board

• USB Interface Board

• USB Cable

If any of the items are missing, contact the closest Texas Instruments Product Information Center to

inquire about a replacement.

4The LP8754 Evaluation Module SNVU369–August 2014

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Quick Setup Guide

2.1 Installing/Opening the Software

The EVM software is controlled through a graphical user interface (GUI). The software communicates with

the EVM through an available USB port. The minimum hardware requirements for the EVM software are:

• IBM PC-compatible computer running a Microsoft Windows® XP or newer operating system

• Available USB port

• Mouse

The latest downloadable software is available at www.ti.com. Download the zip file onto your local hard

drive, then unzip this folder. Make sure the USB Interface Board is connected to the Evaluation Board,

and connect the USB Interface Board to the PC with the USB cable. Refer to Figure 1.

1. With the power supply disconnected from the unit under test (UUT), open the un-zipped folder, and

click on lp8754_nnn.exe (nnn is the version number) to start the software.

2. On the Evaluation SW window bottom right corner you should see text “USB Board connected”. Refer

to Figure 2.

Figure 2. Evaluation Software Graphical User Interface (GUI)

When USB Board Connected

SNVU369–August 2014 The LP8754 Evaluation Module

Quick Setup Guide

www.ti.com

2.2 Power Supply Setup

To power up the EVM, one power supply is needed. For full-load testing of the LP8754EVM, a DC-power

supply capable of at least 10 A and 4 V is required. 5 A is suggested as a practical minimum for partial

load. The power supply is connected to the EVM using connector X3. The power supply and cabling must

present low impedance to the UUT; the length of power supply cables must be minimized. Remote sense,

using connector X4, can be used to compensate for voltage drops in the cabling.

With the power supply disconnected from the UUT, set the supply to 3.7 V DC and the current limit to 5-A

minimum. Set the power supply output OFF. Connect the power supply's positive terminal (+) to VIN and

negative terminal (-) to GND on UUT (X3 Power-in terminal block). Check that jumpers on the boards are

set as shown in Figure 1 (factory default jumper configuration).

Set power supply output ON, and then continue with the following steps.

1. On Evaluation software GUI, click on Assert VIOSYS. See Figure 3: Marking “1”.

2. Click on Assert NRST. See Figure 3: Marking “2”.

3. Click on Read Registers button. You should see ready message on green background next to the

Read Registers button. See Figure 3: Marking “3”.

4. Check that the GUI indicates "PWM" under "Mode" and "Master; 1/6 Phases Active" under "Multi-

phase" status. See Figure 3: Marking “4”.The EVM is now ready for testing with default register

settings loaded.

Figure 3. Evaluation Software GUI Showing Steps Needed to Power up the LP8754

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Quick Setup Guide

2.3 Notes on Efficiency Measurement Procedure

Output Connections: An appropriate electronic load or high-power system source meter instrument,

specified for operation down to 500 mV, is desirable for loading the UUT. The maximum load current is

specified as 10 A. Be sure to choose the correct wire size when attaching the electronic load. A wire

resistance that is too high will cause a voltage drop in the power distribution path which becomes

significant compared to the absolute value of the output voltage. Connect an electric load positive terminal

(+) to X1 and negative terminal (-) to X2. It is advised that, prior to connecting the load, it be set to sink 0A

to avoid power surges or possible shocks.

Voltage drop across the PWB traces will yield inaccurate efficiency measurements. For the most accurate

voltage measurement at the EVM, use TP14 to measure the input voltage and TP10 to measure the

output voltage.

To measure the current flowing to/from the UUT, use the current meter of the DC power supply/electric

load as long as it is accurate. Some power source ammeters may show offset of several milliamps and

thus will yield inaccurate efficiency measurements. In order to perform very accurate Iqmeasurements on

the UUT, disconnect input protective Zener diode D1 by removing the shunt J2 from the board. When

connected, this diode will cause some leakage, especially on high VIN voltages. Also, the output voltage

ADC on the USB Interface Board will load the output of LP8754 with a resistance in order of a hundred of

kΩ. The 0-Ωresistor between the pads of J11 on the lower left corner of the EVB may also be removed

(see Section 6).

3 GUI Overview

The evaluation software has the following tabs: Main, Config, and Advanced. The three tabs together

provide the user access to the whole register map of LP8754.

3.1 Main Tab

The Main tab has the elemental controls for the EVM and provides a view to the chip status. Starting from

top, the main controls are:

• Assert VIOSYS: This checkbox will assert 1.8-V voltage to LP8754 VIOSYS pin. This pin will enable

the chip internal voltage reference and LDO, release POR, and launch OTP read cycle. The VIOSYS

voltage is the reference voltage for the System I2C bus.

• Assert NRST: This checkbox will assert 1.8-V voltage to LP8754 NRST pin. Asserting NRST will

launch power-up sequence.

• Assert SW Reset: To perform a complete SW reset to the chip, assert and de-assert this checkbox.

See the LP8754 datasheet for explanation of LP8754 reset scenarios.

• Assert NSLP: When this bit is asserted it tells LP8754 that the device it is powering is in a high-load

condition state. On LP8754 this effectively prevents the bucks from entering the Low-Power PFM Mode

(ECO).

NOTE: The recommended start-up sequence for LP8754 is to first assert VIOSYS, then write all

needed configuration bits by using the GUI, and then to assert NRST.

NOTE: The NRST pin is the reference for the DVS (Dynamic Voltage Scaling) bus (that is,

SmartReflex™ bus). NRST needs to be asserted before the chip will acknowledge any

transmission on the DVS bus.

The Bucks section provides status information for all the 6 buck cores. The Mode field provides

information on each of the buck core and can have any of the values given in Table 1:

SNVU369–August 2014 The LP8754 Evaluation Module

GUI Overview

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Table 1. Mode Information

Buck Mode

Disabled Buck state machine in 'disable'

Soft Startup Buck state machine in 'soft startup'. May occur when too much loading is present when powering-up the

buck.

PWM Pulse Width Modulation

PFM Pulse Frequency Modulation

ECO PFM with 'low power coasting' mode enabled. This means that lots of analog resources are disabled

between PFM bursts. Reaction time to load transients is compromised, while Iq is minimized.

Sleeping Multi-phase slave is passive.

The "Multi-phase Status" info field tells whether a buck core is configured as a master or slave. The field

also tells how many phases are active.

An ADC on the USB interface card is connected to measure the output voltage of the buck converter, and

this is displayed on GUI.

The "System Flags / Interrupts" section gives data on system faults and warnings. If the interrupt is set for

any reason the Interrupt active field shall show ‘1’ on red background. The flag causing the interrupt will

also be set on the Main tab. Interrupts on LP8754 can only be cleared by writing ‘0’ to associated

registers. Any individual flag can be cleared by clicking the Clear button next to each flag field. The USB

Interface Board uses an I2C-accessible temperature sensor IC to sense the EVB temperature near the

LP8754 IC. This information is presented in the "Board Temperature" field. LP8754 register 0x0D provides

a coarse temperature indication of the chip. This info is interpreted into the "Chip Temperature" field when

the "Poll Status" option is selected.

At the bottom of the GUI window is the "Auto Write" checkbox. If "Auto Write" is checked (default) any

checking, un-checking or pull-down menu selections will immediately launch I2C writes to the chip

on the GUI by clicking "Write Registers".

If "Poll Status" is selected the software sends a query to the LP8754 at a fixed interval in order to detect

the status of the chip, including operation mode, multi-phase status, and output current. If not selected,

user can read the registers by applying "Read Registers". On the EVM both System I2C and DVS

(Dynamic Voltage Scaling) (that is, SmartReflex) buses can be used to interface the chip. The interface to

be used can be selected from the Interface pull-down menu. "Bus Speed" pull-down menu selections are

given in Table 2 below and are instantly applied for both buses. Notice that for DVS bus to work, NRST

needs to be high.

Table 2. I2C-Compatible Bus Support

Bus Speed Selection Explanation

Fast (400 kHz) Fast I2C-compliant operation at 400 kHz

Fast++ (3.4 MHz) I2C protocol data transfer with 3.4 MHz clock rate. No writing of master code needed, but can done. Input

filters correspond to HS lengths – 10 ns minimum filter length for SCL and SDA:

High-Speed (3.4 MHz) HS I2C-compliant data transfer with master codes.

3.2 Other Tabs and Menus

The "Tools" pull-down menu hosts another way of accessing the LP8754 registers. The "Direct Register

Access" tool can be used to read or write any register. When using direct register access, un-checking the

poll status checkbox is recommended. This way the GUI will only do the reads and writes commanded

from the direct access dialog.

The "Config" and "Advanced" tabs provide the user with pull-down menus and check-boxes for the part of

the register space that is not covered by the Main tab, such as output voltage control. These controls are

self-explanatory. Please refer to the LP8754 datasheet for explanation of the functions.

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GUI Overview

3.3 Console

To show or hide the console, toggle the option in View pull-down menu. The console can be used to

access the LP8754 registers. Registers can be read or written simply by referring to the logical registers

by their name. The console has a number of integrated macros that are listed in Table 3.

Table 3. Console Macros

Command Parameters Explanation

register_name = register value | - Write a value to writable I2C register or logical register. If no parameter given, will

return the current register value. The logical register names are the same as

given in the datasheet, and must be in uppercase.

Example: VSET_B0 = 40

wait (time) Wait for time given in ms. Useful in loops.

advanced Change to advanced user mode.

user Return from advanced to regular user mode.

iout (buck number) Returns the measured load current of the chosen buck core.

i2c_bus sr | sys | - Change serial bus communications from the console and the GUI to be made

with the specified bus. If called with no parameter treated as query and current

selection is returned.

0x address = data I2C read or write command.

or addr = value

address[bits] = data examples:

0x12 = 0xaa

0x12[7] = 1

0x12[3:0] = 15

The console supports use of scripts. If a text file containing commands supported by the console is stored

in the same folder with the evaluation software executable, then the script can be launched from the

console by typing the text file name, like script.txt. For demonstration purposes, the evaluation software

comes with a set of scripts, which are loaded when Power Saver, Balanced, or High Performance buttons

on the "Advanced" tab are clicked. These scripts (saved as script1.txt, script2.txt and script3.txt) will load a

collection of register settings that will save energy, maximize load transient performance, or achieve a

balance between the two. Clicking the User button will load a script "script4.txt". By default this file

contains a demo which loops through all output voltage settings (VSET_B0). User can modify this file for

specific register settings.

SNVU369–August 2014 The LP8754 Evaluation Module

Bill of Materials

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4 Bill of Materials

Designator Description Manufacturer Part Number Qty.

!PCB Printed Circuit Board Any SV600763-001 REV A 1

CAP, CERM, 10µF, 10V, ±10%, X5R,

C001, C201, C301, C501 TDK C1608X5R1A106M 4

0603

CAP, TANT, 220µF, 10V, ±10%, 0.05Ω,

C1 AVX TPSD227K010R0050 1

7343-31 SMD

CAP, CERM, 100µF, 6.3V, ±20%, X5R,

C2 MuRata GRM31CR60J107ME39L 1

1206

C010, C30, C31, C110, C310, CAP, CERM, 22µF, 10V, ±20%, X5R, Samsung CL10A226MP8NUNE 6

C410 0603

CL03 Series 0201 1000nF 6.3 V 20 %

C23, C24, C27 Samsung CL03A105MQ3CSNH 3

X5R SMD

CAP, CERM, 0.1µF, 10V, ±10%, X5R,

C28 MuRata GRM155R61A104KA01D 1

0402

D1 Diode, Zener, 5.1V, 5W, SMB Micro Commercial Co SMBJ5338B-TP 1

H1, H2, H3, H4 MACHINE SCREW PAN PHILLIPS 4-40 B&F Fastener Supply NY PMS 440 0050 PH 4

H5, H6, H7, H8 Standoff, Hex, 0.5"L #4-40 Nylon Keystone 1902C 4

H19, H20, H21, H22 M4 CIRC CLEARANCE SPACER 5MM Harwin Inc R40-6710594 4

Header, TH, 100mil, 2x1, Gold plated,

J1, J2, J8, J9 Samtec, Inc. TSW-102-07-G-S 4

230 mil above insulator

J3, J4, J11 RES, 0 ohm, 5%, 0.063W, 0402 Vishay-Dale CRCW04020000Z0ED 3

J5 Connector, SMT, High Speed, 20 pairs Samtec, Inc. QTE-020-01-L-D-A 1

Header, TH, 100mil, 2x2, Gold plated,

J7 Samtec, Inc. TSW-102-07-G-D 1

230 mil above insulator

Inductor, Multilayer, Ferrite, 470nH, 2.7A,

L0, L1, L2, L3, L4, L5 MuRata LQM21PNR47MGH 6

0.04 ohm, SMD

RES, 0.01Ω, 1%, 3W, 2512 High Power

R1 Bourns CRA2512-FZ-R010ELF 1

Current Sense Chip Resistor

R7, R8, R9 RES, 1.8kΩ, 5%, 0.1W, 0603 Vishay-Dale CRCW06031K80JNEA 3

R10, R11, R12, R13, R14, R15, RES, 0 ohm, 5%, 0.1W, 0603 Vishay-Dale CRCW06030000Z0EA 8

R16, R22

SH-J9, SH-J12 Shunt, 100mil, Gold plated, Black 3M 969102-0000-DA 2

TP1, TP2, TP3, TP4, TP5, TP6, Test Point, TH, Miniature, Yellow Keystone 5004 11

TP7, TP8, TP9, TP12, TP15

TP11, TP13 Terminal, Turret, TH, Double Keystone 1502-2 2

LP8754 Multi-phase 6-Core Step-Down

U1 Texas Instruments LP8754YFQT 1

Converter, YFQ0049AEAK

Low Power Digital Temperature Sensor

U2 With SMBus/Two-Wire Serial Interface in Texas Instruments TMP102AIDRL 1

SOT563, DRL0006A

PC terminal block, Pitch: 5.08 mm,

X1, X2, X3 Phoenix Contact 1715721 3

Number of positions: 2

Phoenix Contact screw terminal 2 way,

X4, X5 Phoenix Contact 1725656 2

2.54mm pitch

Phoenix Contact screw terminal 8 way,

X6 Phoenix Contact 1725711 1

2.54mm pitch

10 The LP8754 Evaluation Module SNVU369–August 2014

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