Texas Instruments TAS5825P Bedienungsanleitung

SLAU713–October 2019

TAS5825P Evaluation Module

User's Guide

SLAU713–October 2019

TAS5825P Evaluation Module

This user’s guide describes the operation of the TAS5825P Evaluation Module (EVM). The

TAS5825PEVM is a stand-alone EVM. Use the PurePath™ Control Console 3 GUI (PPC3) to initialize and

operate this EVM.

Contents

1 Required equipment and accessories..................................................................................... 1

2 Hardware Overview.......................................................................................................... 2

3 Hardware Setup.............................................................................................................. 4

4 Board Layouts, Bill of Materials, and Schematic ........................................................................ 4

List of Figures

1 TAS5825PEVM .............................................................................................................. 2

2 TAS5825PEVM Schematic (1 of 4) ....................................................................................... 5

3 TAS5825PEVM Schematic (2 of 4) ....................................................................................... 6

4 TAS5825PEVM Schematic (3 of 4) ....................................................................................... 7

5 TAS5825PEVM Schematic (4 of 4) ....................................................................................... 8

6 TAS5825PEVM Top Overlay............................................................................................... 9

7 TAS5825PEVM Bottom Overlay ......................................................................................... 10

List of Tables

1 Jumpers Configurations..................................................................................................... 4

2 Bill of Materials ............................................................................................................. 11

Trademarks

PurePath is a trademark of Texas Instruments.

Microsoft, Windows are registered trademarks of Microsoft Corporation.

All other trademarks are the property of their respective owners.

1 Required equipment and accessories

1. TAS5825PEVM

2. A USB micro type-B cable

3. Power supply unit (PSU)

4. Speakers and cables

5. Desktop or laptop running Microsoft®Windows®7, Windows 8, Windows 8.1, or Windows 10

6. Audio source: This can be a DVD player with appropriate SPDIF cable, 3.5 mm analog jack or

Playback Media from Windows 7, Windows 8, Windows 8.1, or Windows 10

Hardware Overview

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TAS5825P Evaluation Module

2 Hardware Overview

The TAS5825PEVM showcases the latest TI digital input Class-D Closed-Loop amplifier. The TAS5825P

is a stereo high-efficiency Closed-Loop audio Class-D audio amplifier with an advanced Hybrid-Pro

algorithm to improve system efficiency and reduce heat without clipping distortion. The TAS5825PEVM is

a stand-alone EVM, which has optional battery power supply input with LM5155 boost or external power

supply input bypassing LM5155 boost (Figure 1), USB control via PurePath Control Console 3 (PPC3) and

flexible audio input options.

Figure 1. TAS5825PEVM

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Hardware Overview

SLAU713–October 2019

TAS5825P Evaluation Module

2.1 Features

The EVM has the following features:

• TAS5825P Hybrid-Pro algorithm for audio envelope tracking

• Integrates LM5155 boost to provide customer system design reference

• Default system configuration: 5V battery input, boost to max 16 V power rail based on audio envelope

tracking

• Flexible TAS5825P Hybrid-Pro output (HPFB pin) to customer system board capability

• Demonstration, evaluation and development environment via the PurePath Console 3 software (GUI)

2.2 Functions

The TAS5825PEVM provides USB control via PurePath Control Console 3 (PPC3). The digital audio data

input to the TAS5825PEVM is selectable from USB audio, optical SPDIF, PSIA (external I2S) and 3.5 mm

analog jack.

2.3 Detailed Operations

The TAS5825PEVM has three different optional audio sources:

1. If XMOS is selected manually by toggling the S1 switch, the Windows Media Player can be used to

stream audio.

2. If SPDIF is selected manually by toggling the S1 switch, a DVD player with a optical SPDIF cable can

be used to provide audio stream.

3. If external digital audio source such as Programmable Serial Interface Adapter (PSIA) from Audio

Precision, jumpers (J13, J11, J14) can be used to insert external I2S signals.

Both 3.3 V and 1.8 V DVDD and IOVDD are supported with TAS5825PEVM. Jumper (J15) can be used to

select accordingly based on requirement.

TAS5825PEVM provides optional onboard LM5155 boost Hybrid-Pro evaluation or external customer

system boost with Hybrid-Pro feedback (HPFB pin) control:

1. Onboard LM5155 boost Hybrid-Pro evaluation

• 5 V battery power input through J1 and J2. Bypass external PVDD through DNP J22

• TAS5825P PVDD is from LM5155 boost output: J10 - IN, J22 - OUT

• TAS5825P HPFB pin routes to LM5155 FB pin: J3 - IN, J4 - OUT

2. External customer system boost with Hybrid-Pro feedback (HPFB pin) control

• TAS5825P HPFB pin routes for external customer system boost FB control through TP3 FB and

TP13 GND: J3 - OUT, J4 - OUT

• Customer system boost output for TAS5825P PVDD through J21 PVDD and J23 GND: J10 - OUT,

J22 - IN

The USB connection is also used to provide I2C communications with TAS5825P on the EVM. The Pure

Path Console 3 (PPC3) is the software tool which can initialize and operate this EVM.

Hardware Setup

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TAS5825P Evaluation Module

3 Hardware Setup

Use the following steps when setting up the hardware:

Step 1. Connect speakers to the TAS5825PEVM.

Step 2. Connect 5V battery input or external PVDD to the TAS5825PEVM.

Step 3. Plug in a USB cable from the PC to the TAS5825PEVM. The USB READY LED (Blue) is

illuminated.

Step 4. If an optical SPDIF source is used, the blue SPDIF clock-locked LED is illuminated.

Step 5. Make sure correct jumpers configuration with two modes:

Table 1. Jumpers Configurations

Jumper Name LM5155 Boost Mode Configurations External Customer Boost Mode

Configurations

J1, J2 Battery, GND IN - Battery input OUT

J21, J23 PVDD, GND OUT IN - External PVDD

J10 PVDD_LM5155 IN OUT

J22 PVDD_EXT OUT IN

J4 BST_Bypass OUT OUT

J3 Ext_BST IN OUT

3.1 I2C Device Addresses

The default I2C addresses on the EVM are set to 0x98 for the only one TAS5825P device.

4 Board Layouts, Bill of Materials, and Schematic

This section includes the EVM schematics, board layouts and bill of materials.

GND

47.0k

R64

GND

1.0V

GND

1.0V

GND

1.0V

GND

1.0V

GND

1.0V

GND

1.0V

GND

1.0V

GND

1.0V

GND

1.0V

GND

1.0V

GND

1.0V

GND

1.0V

GND

1.0V

GND

1.0V

3.3V

SN74LVC2G07DSFR

GND

32Y 4

VCC 5

1Y 6

U16

3.3V

VDDIOL

VDD 11

VDDIOL

VDD 16

VDD 17

VDDIOL

VDD 24

VDDIOL

VDD 36

VDD 41

VDDIOL

VDDIOR

VDD 56

VDD 60

VDDIOR

VDD 73

VDDIOR

VDD 80

VDD 81

VDDIOR

VDD 87

VDDIOR

VDD 101

VDD 102

PLL_AVDD 103

PLL_AGND 104

OTP_VCC

105

VDDIOT

110

VDDIOT

111

VDD 120

USB_VDD33

USB_VDD 49

VDD 126

PAD 129

U12E

XE216-512

3.3V 1.0V

3.3V

1.0V

4.7

R45

GND

X0D36 3

X0D37 4

X0D38 5

X0D39 7

X0D40 8

X0D41 9

X0D42 10

X0D43 12

X0D01 27

X0D10 28

X0D00 30

X0D04 31

X0D11 32

X0D05 33

X0D06 34

X0D07 35

X0D02 37

X0D03 38

X0D08 39

X0D09 40

X0D14 57

X0D15 58

X0D20 59

X0D21 61

X0D12 62

X0D13 63

X0D22 64

X0D23 66

X0D16 68

X0D17 69

X0D18 70

X0D19 71

X0D24 88

X0D25 89

X0D34 90

X0D35 91

X0D26 93

X0D27 94

X0D32 95

X0D28 96

X0D33 97

X0D29 98

X0D30 99

X0D31 100

U12A

XE216-512

1.0k

R38

2.2k

R39

2.2k

R40

3.3V 3.3V 3.3V

GND

3.3V

GND

3.3V

GND

3.3V

GND

3.3V

GND

3.3V

GND

3.3V

GND

3.3V

GND

3.3V

GND

3.3V

GND

3.3V

GND

3.3V

GND

3.3V

GND

3.3V

GND

3.3V

USB_D_P

USB_D_M

USB_ID

VBUS_IN

GND

X1D35 13

X1D36 15

X1D37 18

X1D38 20

X1D18 25

X1D19 26

X1D14 51

X1D15 53

X1D20 54

X1D21 55

X1D02 72

X1D03 74

X1D04 75

X1D05 76

X1D06 77

X1D07 79

X1D08 82

X1D09 84

X1D00 85

X1D01 86

X1D41 107

X1D42 108

X1D43 109

X1D40 106

X1D26 112

X1D27 113

X1D28 114

X1D29 115

X1D30 116

X1D31 117

X1D32 118

X1D33 119

X1D39 21

X1D16 22

X1D17 23

X1D10 121

X1D11 122

U12B

XE216-512

3.3V

25.5k

R63

1.0V

51.0k

R65

10.0k

R60

3.3V

GND

10.0k

R56

10.0k

R57

X-24M

2.2uF

10V

C107

GND USB I/O

GND -USB

USB_ID

43 USB_VBUS

USB_DP

USB_DM

USB_RTUNE

U12C

XE216-512

GND

10.0kR52

X-TCK

X-TMS

X-TDO

X-TDI

X-TRSTN X-RSTN

TRST

123

RST

124 CLK

125

TMS

127 TCK

128

TDO

1TDI

U12D

XE216-512

X-24M

X-TCK

X-TMS

X-TDO

X-TDI

X-RSTN

TRST

XMOS AND I/Os

JTAG CLOCK GENERATION

GND

3.3V

GND

3.3V

GND

3.3V

J16

JTAG

GND X-TDI

X-TMS

X-TCK

X-TDO

X-TRSTN

VBUS-XMOS

GND

24MHz

VDD 4

OE/STANDBY 1

GND

OUT

3.3V

GND

10.0k

R62

33.2

R61

3.3V

X-HS-EN

10k

R48

GND GND

3.3V

33.2R59

3.3V to 1.8V LDO

1.8V3.3V

GND

GND GND

1.8V

3.3V

XIN/CLK

GND

3.3V

GND

3.3V

GND GND

1.8V 1.8V

DOUT-XMOS

BCLK-XMOS

LRCLK-XMOS

I2S TO MUXES

33.2R47

33.2

R49

33.2R53

33.2

R58 BCLK-XMOS

MCLK-XMOS

TP12

SCL

TP14

SDA

33.2

R50

GND

3.3V

J18

SCL

J19

SDA

GND

TPS73618DBVR

GND 2

3NR/FB 4

OUT 5

U11

VCCA

GND 5

B2 6

B1 7

VCCB 8

U14

SN74AVC2T244

1uF

C87

5V-SPDIF

43.2

R55

SDIN-XMOS

GND

3.3V

SCL

SDA I2C

3.3V

GND

SCL-XMOS

SDA-XMOS

10.0k

R25

IOVDD

SDA_B

GND

2VCCA 3

SDA_A 4

SCL_A 5

OE 6

VCCB 7

SCL_B

TCA9406DCUR

U20

GNDGND

IOVDD

IOVDD IOVDD

IOVDD

2.00k

R29

2.00k

R30

680

R51

XIN/CLK

VDD

VCTR

GND 5

VDDOUT 6

VDDOUT 7

Y3 8

Y2 9

GND 10

Y1 11

SCL/S2

12 SDA/S1

XOUT

CDCE913PWR

U15

SCL

SDA

GND GND

1.8V 3.3V

Blue

D3 USB RDY

VBUS 1

D- 2

D+ 3

ID 4

GND 5

11 10

J17

USB

R54

ENABLE

GND 2

SENSE

3SENSE_OUT 4

CT 5

VCC

TPS3897ADRYR

U17

3.3V to 1V BUCK LDO for XMOS

OUTPUT = 1.0V@1A

1.0V

GND

GND GND

10V

22uF

C84

GND

10V

22uF

C43

2.2uH

GND

10V

22uF

C83

66.5k

R35

100k

R37

GND 2

SW 3

VIN

FB 5

TLV62568DBVR

U19

3.3V

OUTPUT = 1.8V@400mA

10V

10uF

C86

16V

0.1uF

C103

16V

0.1uF

C108

16V

0.1uF

C104

16V

0.1uF

C109

16V

0.1uF

C110

16V

0.1uF

C111

16V

0.1uF

C112

16V

0.1uF

C48

16V

0.1uF

C47

16V

0.1uF

C70

16V

0.1uF

C71

16V

0.1uF

C72

16V

0.1uF

C73

16V

0.1uF

C89

16V

0.1uF

C90

16V

0.1uF

C91

16V

0.1uF

C92

16V

0.1uF

C74

16V

0.1uF

C75

16V

0.1uF

C76

16V

0.1uF

C77

16V

0.1uF

C93

16V

0.1uF

C94

16V

0.1uF

C95

16V

0.1uF

C96

16V

0.1uF

C78

16V

0.1uF

C79

16V

0.1uF

C80

16V

0.1uF

C81

16V

0.1uF

C97

16V

0.1uF

C98

16V

0.1uF

C99

16V

0.1uF

C100

16V

0.1uF

C82

16V

0.1uF

C44

16V

0.1uF

C101

16V

0.1uF

C102

16V

0.1uF

C105

16V

0.1uF

C106

16V

0.1uF

C114

16V

0.1uF

C85

16V

0.01uF

C88

470pF

C113

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Board Layouts, Bill of Materials, and Schematic

SLAU713–October 2019

TAS5825P Evaluation Module

4.1 Schematics

Figure 2. TAS5825PEVM Schematic (1 of 4)

GND GND

3.3V

GND GND

3.3V

GND GND

3.3V

BCLK-XMOS

LRCLK-XMOS

SN74LVC2G157DCTR

GND

A/B

VCC 8

SN74LVC2G157DCTR

GND

A/B

VCC 8

SN74LVC2G157DCTR

GND

A/B

VCC 8

U10

FROM XMOS

DUTs

GND

3.3V

DECOUPLING

49.9R22

49.9R21

49.9R24

GND

SCLK-SPDIF

LRCLK-SPDIF

SDOUT-SPDIF

DOUT-XMOS

BCLK-XMOS

LRCLK-XMOS

J11

SCLK

J13

LRCLK

J14

SDIN

SCLK

LRCLK

SDIN

GND

3.3V 3.3V 3.3V

GND GND GND

I2S SEL

1-2 = BYPASS

2-3 = PSIA

I2S-MUX_CTRL

DOUT-XMOS

I2S-MUX_CTRL

GND

3.3V

5-6 = SPDIF

4-5 = XMOS

TP16

LRCLK

TP17

SCLK

TP15

SDIN

ERROR/INT0 1

NPCM/INT1 2

MPIO_A0 3

MPIO_A1 4

MPIO_A2 5

MPIO_A3 6

MPIO_C0 7

MPIO_C1 8

MPIO_C2 9

MPIO_C3 10

MPIO_B0 11

MPIO_B1 12

MPIO_B2 13

MPIO_B3 14

MPO0

MPO1

DOUT 17

FSYNC 18

BCK 19

SCKO 20

DGND 21

DVDD 22

MDO/ADR0

23 MDI/SDA

24 MC/SCL

MS/ADR1

MODE

RXIN7/ADIN0

28 RXIN6/AFSYNCI0

29 RXIN5/ABCKI0

30 RXIN4/ASCKI0

31 RXIN3

32 RXIN2

RST

RXIN1

VDDRX 36

RXIN0

GNDRX 38

XTI

XTO

AGND 41

VCC 42

FILT

VCOM

44 AGNDAD 45

VCCAD 46

VINL

VINR

PCM9211PT

16V

0.1uF

C61

GND

16V

0.1uF

C62

GND

24.576MHz

GND 50V

27pF

C56

GND GND

50V

27pF

C55

16V

0.1uF

C53

16V

10uF

C52 680

R23

J20

GND

200k

R19

200k

R20

3.3V

GND

9211-LOCK

GND

16V

0.1uF

C119

3.3V

16V

0.1uF

C116

16V

10uF

C118

GND GND

16V

0.1uF

C64

16V

10uF

C63

GND GNDGND GND

16V

0.1uF

C65

16V

10uF

C115

5V-SPDIF

3.3V 3.3V

Analog

VINR

VINL

GNDGND

GND GND GND GND

0R17

1.5k

R18

VCC 1

GND 2

VOUT 3

OPTO-IN

SDA

SCL

FROM XMOS

3.3V

GND

3.3V

GND

10.0k

R16

3.3V

GND GND

SN74LVC2G157DCUR

GND 4

A/B 6

VCC

U13

GPIO1_Hybrid_Pro

DUTS

10.0k

R46

GND

SPDIF-OUT

SPDIF-IN

SPDIF-BCK

SPDIF-FSYNC

SPDIF-DOUT

SPDIF-FSYNC

SPDIF-BCK

SPDIF-DIN SDIN-SPDIF

SDIN-SPDIF

SPDIF-MCLK

XTI

XTO

TP18

MCLK

3.3V 3.3V

3.3V

GND

Input

VIN 1

VCC 2

GND 3

OPTO-OUT

33.0

R26

GND GND

33.0R27

33.0

R28

3.3V

DIR1

DIR2

DIR3

DIR4

7GND 8

B4 9

B3 10

B2 11

B1 12

VCCB 13

VCCA

SN74AVC4T774RSVR

U4 IOVDD

SPDIF-BCK

SPDIF-FSYNC

SPDIF-DOUT

I2S-MUX_CTRL

SCLK-MUX

J12

GPIO1 SEL

J15

IOVDD SEL

IOVDD

1.8V3.3V

SDIN-MUX

SDIN-XMOS

GND

10.0k

R33

GND

ADDR = 0x40

PDN

TCA6408ARGTR

RESET

P0 2

P1 3

P2 4

P3 5

GND 6

P4 7

P5 8

P6 9

P7 10

INT

SCL

SDA

VCCP

14 VCCI

ADDR

EP 17

U18

SDA

SCL

IOVDD

SDOUT-SEL

IOVDD

SDOUT-MUX

GNDGND GND

IOVDDIOVDD IOVDD

LRCLK-MUX

GPIO0_FAULT

GPIO1_Hybrid_Pro

GPIO2_WARN

0R42

0R44

0R31

0R32

0R43

0R72

0R41

Blue

S/PDIF LOCK

I2S SEL

VCC 5

GND

3NC 1

U21B

SN74LVC1G14

2 4

U21A

SN74LVC1G14

16V

0.1uF

C45

16V

0.1uF

C117

16V

0.1uF

C49

16V

0.1uF

C46

16V

0.1uF

C69

16V

0.1uF

C68

16V

0.1uF

C67

16V

0.1uF

C66

50V

0.068uF

C60

4700pF

25V

C54

50V

10pF

C57

50V

10pF

C58

50V

10pF

C59

16V

10uFC50

16V

10uFC51

Board Layouts, Bill of Materials, and Schematic

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TAS5825P Evaluation Module

Figure 3. TAS5825PEVM Schematic (2 of 4)

GND GND

10.0k

DVDD1

GND

PVDD_5825P

GND GND GND

PVDD_5825P

4.7uF

C33

0.1uF

C34

GND GND

GND

ADR

DVDD1

390uF

C24

GND

390uF

C25

GND

TP7

PDN

FROM XMOS

DVDD1

1µF

C37

1µF

C39

IOVDD

1µF

C32

SCLK

LRCLK

SCLK

LRCLK

SDIN

FROM MUXES

SDIN

DVDD1

10.0k

R70

DVDD1DVDD1

R74

GND

R73

DVDD1

(I2C Slave Address 1)

ADR PIN Conﬁg

R73R74 I2C Adr

0 ohm DNP

1k DNP

4.7k DNP

15k DNP

(DEFAULT) 0x98

0x9A

0x9C

0x9E

PDN

GPIO0_FAULT

GPIO1_Hybrid_Pro

GPIO2_WARN

SDA

SCL

TP4

GPIO0_FAULTz

TP5

GPIO1_Hybrid_Pro

TP6

GPIO2_WARNz

GPIO0_FAULT

GPIO1_Hybrid_Pro

GPIO2_WARN

PDN

SDA

SCL

Left+

Left-

Right+

Right-

GND

Left

10µH

Right

220nF50V

C23

220nF50V

C35

220nF50V

C36

220nF50V

C38

OUT_A-

OUT_B+

OUT_B-

BST_A+

BST_A-

BST_B+

BST_B-

GND

IN = PBTL MODE

DNP = BTL MODE

OUT_A+

680nF

50V

C20

680nF

50V

C21

680nF

50V

C22

680nF

50V

C40

10.0k

R67

DVDD1

1.0k

R69

0.1uF

C28

0.1uF

C29

DGND 5

PGND 26

PGND 25

PGND 31

PGND 32

PAD 33

GVDD

AVDD

PVDD

DVDD

VR_DIG

AGND 20

OUT_A- 30

BST_A+ 1

OUT_A+ 2

BST_A- 29

OUT_B+ 23

OUT_B- 27

BST_B+ 24

BST_B- 28

SDIN

14 SCLK

13 LRCLK

SDA

SCL

ADR

PDN

17 GPIO2

11 GPIO1

10 GPIO0

TAS5825PRHBR

35V

10uF

C26

35V

10uF

C27

35V

10uF

C30

35V

10uF

C31

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Board Layouts, Bill of Materials, and Schematic

SLAU713–October 2019

TAS5825P Evaluation Module

Figure 4. TAS5825PEVM Schematic (3 of 4)

Battery RANGE

3.5-5.5VDC

GND

Battery

GND

TP2

VIN

25V

10µF

25V

0.1µF

50V

100uF

GND

25V

10µF

25V

10µF

0R1

GND GND GND GND BIAS

1VCC 2

GATE 3

PGND 4

CS 5

COMP

6AGND 7

FB 8

PGOOD

UVLO/SYNC

EP 13

LM5155DSSR

24.9kR6

50V

0.01uF

C12

1µF16V

GND

21.0k

GND

100pF

C13

DNP 15.8k

GND GND 49.9k

R11

220nF

C15

20V

220pF

C17

11.3k

R12

GND

BST input / output wire current capbility is ~12A

7,8

1,2,3

5,6,

IPC50N04S5L5R5ATMA1

0R3

0R8

0.008

R10

50V

100pF

C14

100R9

GND GND

6.8uH

L5 1

PMEG060V100EPDZ

50V

100uF

VOUT_LM5155

TP1

VOUT

L5 Must Close to Q1

GND GND GND GND GND

R10 Must Close to Q1

VOUT_LM5155

R14

42.7k

R13

3.65k

R68

GND

GPIO1_Hybrid_Pro

GND

BST_Bypass

Ext_BST

TP13

GND

R34

GND GNDGND

TP3

PVDD RANGE

4.5-26VDC

GND

J21

PVDD

J23

GND

PVDD_5825P

PVDD_EXT

J22

DNP

PVDD_5825P

J10

PVDD_LM5155

VOUT_LM5155

5V-SPDIF

TPS76833QDR

OUT 5

OUT 6

NC 7

PG 8

GND

10uF

C42

GND

3.3V

249k

R71

TP11

GND

TP8

GND

TP9

GND

TP10

GND

VIN

UVLO

Q1-D

PVDD-EXT

R36

R75

5V-U3

3.3V-TP

BIAS

GATE

PG Q1-S

Q1-G

COMP

BIAS

J25

3.3V

J24

0.1uF

C41

0.1uF

50V

22nF

16V

C16

50V

4.7uF

C11

50V

4.7uF

50V

4.7uF

C10

6.49k

R15

6.49k

R66

50V

360pF

C18

50V

360pF

C19

Board Layouts, Bill of Materials, and Schematic

www.ti.com

8SLAU713–October 2019

Submit Documentation Feedback

TAS5825P Evaluation Module

Figure 5. TAS5825PEVM Schematic (4 of 4)

www.ti.com

Board Layouts, Bill of Materials, and Schematic

SLAU713–October 2019

TAS5825P Evaluation Module

4.2 Board Layouts

Figure 6. TAS5825PEVM Top Overlay

Board Layouts, Bill of Materials, and Schematic

www.ti.com

10 SLAU713–October 2019

Submit Documentation Feedback

TAS5825P Evaluation Module

Figure 7. TAS5825PEVM Bottom Overlay

Dieses Handbuch passt für folgende Modelle

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