Texas Instruments TPA3156D2EVM Bedienungsanleitung

SLOU499–October 2017

TPA3156D2EVM User’s Guide

User's Guide

SLOU499–October 2017

TPA3156D2EVM User’s Guide

This user’s guide describes operation of the TPA3156D2EVM (evaluation module). The user’s guide also

provides design information, such as a schematic, BOM, and PCB layout.

Contents

1 Hardware Overview.......................................................................................................... 2

2 Operation ..................................................................................................................... 3

2.1 Electrostatic Discharge Warning.................................................................................. 3

2.2 Unpacking the EVM ................................................................................................ 3

2.3 Power Supply Setup................................................................................................ 3

2.4 Evaluation Module Preparations.................................................................................. 3

2.5 Inputs and Outputs ................................................................................................. 4

2.6 Power Up ............................................................................................................ 4

2.7 Recommended Settings ........................................................................................... 4

2.8 Separate PVCC and AVCC Supply Support.................................................................... 5

3 Board Layout, Bill of Materials, and Schematic.......................................................................... 6

3.1 TPA3156D2EVM Board Layouts ................................................................................. 6

3.2 Bill of Materials (BOM) ............................................................................................. 8

3.3 TPA3156D2EVM Schematic..................................................................................... 11

List of Figures

1 TPA3156D2EVM............................................................................................................. 2

2 TPA3156D2EVM Top Overlay............................................................................................. 6

3 TPA3156D2EVM Bottom Overlay ......................................................................................... 7

4 TPA3156D2EVM Schematic.............................................................................................. 11

List of Tables

1 TPA3156D2EVM Specifications ........................................................................................... 2

2 Power Requirements........................................................................................................ 3

3 TPA3156D2EVM Setting 1 (Stereo Output).............................................................................. 4

4 TPA3156D2EVM Setting 1 (Single-Channel Output) ................................................................... 5

5 TPA3156D2EVM Setting 2 (Mono Output)............................................................................... 5

6 TPA3156D2EVM BOM...................................................................................................... 8

Hardware Overview

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TPA3156D2EVM User’s Guide

1 Hardware Overview

The TPA3156D2EVM demonstrates the integrated circuit, TPA3156D2, from TI. The TPA3156D2 is an

efficient, 70-W (per channel), stereo, digital-amplifier, power stage for driving two bridge-tied speakers or a

single parallel bridge-tied load (PBTL). This document covers EVM specifications and design

documentation.

Figure 1 shows the EVM board.

Figure 1. TPA3156D2EVM

Table 1 lists the EVM specifications.

Table 1. TPA3156D2EVM Specifications

Key Parameters Value

Power supply voltage 4.5 V to 26 V

Number of channels Two bridge-tied load (BTL) stereos

Load impedance 3.2 Ωto 8 Ω

Output power BTL 70 W per channel

Output power PBTL 140 W

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Operation

SLOU499–October 2017

TPA3156D2EVM User’s Guide

2 Operation

This chapter describes the power supply and system interfaces of the TPA3156D2EVM board. Information

regarding handling and unpacking, absolute operating conditions, and a description of the factory default

switch and jumper configurations are also provided. The following is a step-by-step guide to configuring

the TPA3156D2EVM for device evaluation.

2.1 Electrostatic Discharge Warning

Many components on the TPA3156D2EVM are susceptible to damage by electrostatic discharge.

CAUTION

Failure to observe ESD handling procedures may result in damage to EVM

components.

2.2 Unpacking the EVM

When opening the TPA3156D2EVM package, ensure there is one TPA3156D2EVM board using one

TPA3156D2. If the EVM is missing, contact the TI Product Information Center nearest you to inquire about

a replacement.

2.3 Power Supply Setup

A single power supply or separate PVCC/AVCC is required to power up the EVM (see Table 2). Because

most of the pins are PVCC compliant, the PVCC supply can also be used to power the analog supply

(AVCC) and to pull up the logic pins for shutdown (SD) control, and fault detection (FAULT).

Table 2. Power Requirements

Description Voltage Range Current Requirement Minimum Wire Size

PVCC/AVCC 4.5 to 26 V 8 A 24 AWG

CAUTION

Applying voltages above the limitations given in Table 2 may permanently

damage the hardware.

2.4 Evaluation Module Preparations

• Ensure that the external power source is set to OFF.

• Connect the external regulated power supply, adjusted from 4.5 V to 26 V, to the module PVCC and

GND banana jacks, taking care to observe marked polarity.

Operation

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TPA3156D2EVM User’s Guide

2.5 Inputs and Outputs

Make the following input and output connections:

For BTL configuration:

1. Connect audio inputs, either differential or single-ended, to the LIN and RIN RCA phono plugs. To

enable the individual channel shutdown feature, tie RINP and RINN directly to ground (without

capacitors), and OUTPL and OUTNL should work normally.

2. Connect a load (or loads) across the outputs (OUTL+ and OUTL–) and (OUTR+ and OUTR–).

For PBTL configuration:

1. Apply a single input, differential or single ended, to the RIN RCA phono plug and tie LINP and LINN

directly to Ground (without capacitors).

2. Connect a single load from one of the left speaker jacks to one of the right speaker jacks depending on

how the filters are loaded.

2.6 Power Up

1. Verify correct voltage and input polarity and turn the external power supplies ON. The EVM should

begin operation.

2. Adjust the audio source for the correct volume.

2.7 Recommended Settings

This section contains the recommended settings for stereo, single-channel, and mono output.

Table 3 lists the settings for a single-ended input with auto recovery, PLIMIT, and BTL (stereo output).

Table 3. TPA3156D2EVM Setting 1 (Stereo Output)

Setting Description

J6 (RIN) R channel audio input

J9 (LIN) L channel audio input

JP1 (GNDR+) and JP3(GNDR–) set to OUT R channel on

JP4 (GNDL+) and JP6(GNDL–) set to OUT L channel on

JP2 (RGND) set to IN Single-ended input (R channel)

JP5 (LGND) set to IN Single-ended input (L channel)

JP7 sets IN Set PLIMIT

R4 Change PLMIT voltage value

JP8 (/SD=/FAULT) set to IN Auto-recovery mode

J11 (MODESEL=L) Low idle-loss mode

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Operation

SLOU499–October 2017

TPA3156D2EVM User’s Guide

Table 4 lists the settings for a single-ended input with auto recovery, PLIMIT, and BTL (single-channel

output).

Table 4. TPA3156D2EVM Setting 1 (Single-Channel Output)

Setting Description

J6 (RIN) No audio input

J9 (LIN) L channel audio input

JP1 (GNDR+) and JP3 (GNDR–) set to IN R channel off

JP4 (GNDL+) and JP6 (GNDL–) set to OUT L channel on

JP5 (LGND) set to IN Single-ended input (L channel)

JP7 set to IN Set PLIMIT

R4 Change PLMIT voltage value

JP8 (/SD=/FAULT) set to IN Auto-recovery mode

J11 (MODESEL=L) Low idle-loss mode

Table 5 lists the settings for a single-ended input with auto recovery, PLIMIT, and PBTL (mono output).

Table 5. TPA3156D2EVM Setting 2 (Mono Output)

Setting Description

J6 (RIN) R channel audio input

J9 (LIN) No audio input

JP1 (GNDR+) and JP3 (GNDR–),set to OUT R channel on

JP4 (GNDL+) and JP6 (GNDL–), set to IN L channel off, PBTL mode

JP2, set to IN Single-ended input (R channel)

JP7, set to IN Set PLIMIT

R4 Change PLMIT voltage value

JP8 (/SD=/FAULT) set to IN Auto-recovery mode

J11 (MODESEL=L) Low idle-loss mode

2.8 Separate PVCC and AVCC Supply Support

Supplying a voltage of AVCC that is lower than PVCC (for example PVCC = 24 V and AVCC = 12 V),

reduces the power dissipation on the internal LDO. This gives customers the flexibility to choose between

the extreme, low-idle current mode (J3: 1 and 2 set to IN, with separate AVCC) and single power supply

mode (J3: 2 and 3 set to IN, without AVCC).

Board Layout, Bill of Materials, and Schematic

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TPA3156D2EVM User’s Guide

3 Board Layout, Bill of Materials, and Schematic

3.1 TPA3156D2EVM Board Layouts

Figure 2 and Figure 3 show the board layouts for the EVM.

Figure 2. TPA3156D2EVM Top Overlay

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Board Layout, Bill of Materials, and Schematic

SLOU499–October 2017

TPA3156D2EVM User’s Guide

Figure 3. TPA3156D2EVM Bottom Overlay

Board Layout, Bill of Materials, and Schematic

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3.2 Bill of Materials (BOM)

Table 6 lists the BOM for this EVM.

Table 6. TPA3156D2EVM BOM

Designator Quantity Value Description Package Reference Part Number Manufacturer Alternate

Part Number Alternate

Manufacturer

!PCB 1 Printed-circuit board AMPS027 Any

C1, C13,

C20, C25 4 0.68 µF Capacitor, ceramic, 0.68 µF, 50

V, ±10%, X7R, 1206 1206 GRM31MR71H684KA88L MuRata

C2, C14,

C21, C26 4 0.01 µF Capacitor, ceramic, 0.01 µF, 50

V, ±10%, X7R, 0603 0603 GRM188R71H103KA01D MuRata

C3, C9 2 220 µF Capacitor, AL, 220 µF, 35 V,

±20%, 0.09 Ω, TH 10 × 12.5 mm EEU-FC1V221 Panasonic

C4, C10 2 0.1 µF Capacitor, ceramic, 0.1 µF, 50

V, ±10%, X7R, 0603 0603 GCM188R71H104KA57D MuRata

C5, C11 2 1000 pF Capacitor, ceramic, 1000 pF, 50

V, ±5%, C0G/NP0, 0603 0603 GRM1885C1H102JA01D MuRata

C6 1 10 µF Capacitor, ceramic, 10 µF, 35 V,

±10%, X7R, 1210 1210 GRM32ER7YA106KA12L MuRata

C7, C12,

C19, C22 4 1 µF Capacitor, ceramic, 1 µF, 16 V,

±10%, X7R, 0603 0603 GRM188R71C105KA12D MuRata

C8 1 1 µF Capacitor, ceramic, 1 µF, 30 V,

±10%, X7R, 0603 0603 C1608X7R1V105K080AC TDK

C15, C16,

C17, C18 4 0.22 µF Capacitor, ceramic, 0.22 µF, 25

V, ±10%, X7R, 0603 0603 GRM188R71E224KA88D MuRata

C23, C24 2 1 µF Capacitor, ceramic, 1 µF, 16 V,

±10%, X7R, 0805 0805 C0805C105K4RACTU Kemet

C27 1 47 pF Capacitor, ceramic, 47 pF, 50 V,

±5%, C0G/NP0, 0603 0603 GRM1885C1H470JA01D MuRata

H1, H2, H3,

H4 4Machine screw, round, #4 – 40

× 1/4, nylon, Philips panhead Screw NY PMS 440 0025 PH B&F Fastener

Supply

H5, H6, H7,

H8 4Standoff, hex, 0.5" L #4 – 40

Nylon Standoff 1902C Keystone

H9 1 Heatsink, 25 × 50 × 25 mm Heatsink,

25 × 50 × 25 mm HEATSINK100W_25X50X25 Texas

Instruments

J1, J2, J4, J8 4 Binding Post, RED, TH 11.4 × 27.2 mm 7006 Keystone

J3, J11, J12,

J13, J14 5 Header, 100 mil, 3 × 1, gold, TH PBC03SAAN PBC03SAAN Sullins

Connector

Solutions

J5, J7, J10 3 Binding post, black, TH 11.4 × 27.2 mm 7007 Keystone

J6 1 RCA jack, red, R/A, TH PC Mount Phono jack-

red, TH 971 Keystone

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Board Layout, Bill of Materials, and Schematic

SLOU499–October 2017

TPA3156D2EVM User’s Guide

Table 6. TPA3156D2EVM BOM (continued)

Designator Quantity Value Description Package Reference Part Number Manufacturer Alternate

Part Number Alternate

Manufacturer

J9 1 RCA jack, white, R/A, TH PC Mount Phono jack-

white, TH 970 Keystone

J15, J16,

J17, J18,

J19, J20,

J21, J22 8 Header, 100 mil, 2 × 1, gold, TH Sullins 100 mil, 1 × 2,

230 mil above insulator PBC02SAAN Sullins

Connector

Solutions

L1, L2, L3,

L4 4 10 µH Inductor, Shielded, Ferrite, 10

µH, 7.8 A, 0.011 Ω, SMD 2-pin, 12.3 × 12.3 mm

body, 8 mm height 931BS-100M MuRata Toko

Q1 1 40-V Transistor, NPN, 40 V, 0.6

A, SOT-23 SOT-23 MMBT2222ALT1G ON

Semiconductor

R1, R2, R3,

R12 4 3.3 Resistor, 3.3, 5%, 0.1 W, 0603 0603 CRCW06033R30JNEA Vishay-Dale

R4 1 100 k Trimmer, 100-kΩ, 0.5 W, TH 375 × 190 × 375 mil 3386P-1-104LF Bourns

R5 1 100 k Resistor, 100 k, 1%, 0.125 W,

0805 0805 CRCW0805100KFKEA Vishay-Dale

R6, R7 2 20.0 k Resistor, 20.0 k, 1%, 0.125 W,

0805 0805 CRCW080520K0FKEA Vishay-Dale

R8 1 4.70 k Resistor, 4.70 k, 0.1%, 0.1 W,

0603 0603 RG1608P-472-B-T5 Susumu Co Ltd

R9, R11,

R13, R18,

R19, R20,

R21 7 100 k Resistor, 100-kΩ, 1%, 0.1 W,

0603 0603 RC0603FR-07100KL Yageo America

R10 1 499 k Resistor, 499 k, 1%, 0.1 W,

0603 0603 RC0603FR-07499KL Yageo America

S1, S2 2 Switch, tactile, SPST-NO, 0.05

A, 12 V, SMT Switch, 4.4 × 2 × 2.9 mm TL1015AF160QG E-Switch

SH1, SH2,

SH3, SH4,

SH5, SH6,

SH7, SH8,

SH9, SH10,

SH11, SH12,

SH13

13 1 × 2 Shunt, 100 mil, gold-plated,

black Shunt 969102-0000-DA 3M SNT-100-BK-G Samtec

TP1, TP2,

TP3, TP4,

TP5, TP6,

TP7, TP8 8Test point, miniature, orange,

TH Orange miniature test

point 5003 Keystone

TP9, TP10,

TP11, TP12 4 Test point, miniature, black, TH Black miniature test

point 5001 Keystone

Board Layout, Bill of Materials, and Schematic

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Table 6. TPA3156D2EVM BOM (continued)

Designator Quantity Value Description Package Reference Part Number Manufacturer Alternate

Part Number Alternate

Manufacturer

U1 1 Two 70-W, class-d amplifiers

with low idle power dissipation,

DAD0032A (TSSOP-32) DAD0032A TPA3156D2DADR Texas

Instruments TPA3156D2DAD Texas

Instruments

C28, C29,

C30, C31 0 330 pF Capacitor, ceramic, 330 pF, 50

V, ±5%, C0G/NP0, 0603 0603 GRM1885C1H331JA01D MuRata

FID1, FID2,

FID3 0Fiducial mark. There is nothing

to buy or mount. N/A N/A N/A

R14, R15,

R16, R17 0 10 Resistor, 10, 5%, 0.125 W, 0805 0805 CRCW080510R0JNEA Vishay-Dale

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