Texas Instruments TPS56837 Bedienungsanleitung

User's Guide

TPS56837 Buck Converter Evaluation Module

ABSTRACT

This user's guide contains information for the TPS56837 as well as support documentation for the

TPS56837EVM evaluation module. This user's guide includes the performance specifications, schematic, and

the bill of materials of the TPS56837EVM.

Table of Contents

1 Introduction.............................................................................................................................................................................2

2 Performance Specification Summary................................................................................................................................... 2

3 Modifications...........................................................................................................................................................................2

3.1 Output Voltage Setpoint..................................................................................................................................................... 2

3.2 Mode Selection.................................................................................................................................................................. 3

3.3 Adjustable UVLO................................................................................................................................................................4

4 Test Setup and Results.......................................................................................................................................................... 5

4.1 Input, Output Connections................................................................................................................................................. 5

4.2 Start-Up Procedure............................................................................................................................................................ 5

4.3 Output Voltage Ripple........................................................................................................................................................ 5

4.4 Start-Up..............................................................................................................................................................................6

4.5 Shutdown........................................................................................................................................................................... 7

5 Board Layout...........................................................................................................................................................................8

5.1 Layout................................................................................................................................................................................ 8

6 Schematic, List of Materials, and Reference......................................................................................................................10

6.1 Schematic........................................................................................................................................................................ 10

6.2 List of Materials................................................................................................................................................................ 11

6.3 Reference.........................................................................................................................................................................13

7 Revision History................................................................................................................................................................... 13

Trademarks

D-CAP3™ and Eco-mode™ are trademarks of Texas Instruments.

All trademarks are the property of their respective owners.

www.ti.com Table of Contents

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TPS56837 Buck Converter Evaluation Module 1

1 Introduction

The TPS56837 is an adaptive on-time D-CAP3™ control mode synchronous step-down DC/DC converter. With

the wide operating input voltage range of 4.5 V to 28 V, the TPS56837 is designed for systems powered from

12-V, 19-V, 24-V power-bus rails. The device supports up to 8-A continuous output current between 0.6 V

and 13 V. The TPS56837 device provides 500-kHz, 800-kHz and 1.2-MHz switching frequencies for selection.

This switch mode power supply (SMPS) IC is optimized for applications requiring very low power consumption,

such as printers, DTV, monitor and some industrial applications, by providing an Eco-mode™ (pulse-skipping).

D-CAP3 control mode provides an easy-to-design, stable regulation with very little external components, and

supports cost-effective ceramic capacitors. Table 1-1 shows the rated input voltage and output current ranges for

the evaluation module.

The TPS56837EVM evaluation module (EVM) is a single, synchronous buck converter providing 5-V at 8-A

output from 5.5-V to 28-V input. This user’s guide describes the TPS56837EVM performance.

Table 1-1. Input Voltage and Output Current Summary

EVM Input Voltage (VIN) RANGE OUTPUT CURRENT (IOUT) RANGE

TPS56837EVM 5.5 V to 28 V 0 A to 8 A

2 Performance Specification Summary

A summary of the TPS56837EVM performance specifications is provided in Table 2-1. Specifications are given

for an input voltage of VIN = 24 V and an output voltage of 5 V, unless otherwise noted. The ambient temperature

is 25°C for all measurement, unless otherwise noted.

Table 2-1. TPS56837EVM Performance Specifications Summary

SPECIFICATIONS TEST CONDITIONS MIN TYP MAX UNIT

Input voltage range (VIN) 5.5 24 28 V

Output voltage 5 V

Operating frequency VIN = 24 V, IOUT = 8 A 500 kHz

Output current range 0 8 A

Output ripple voltage VIN = 24 V, IOUT = 8 A 40 mVPP

Maximum efficiency VIN = 24 V, IOUT = 5 A 94.96 %

3 Modifications

These evaluation modules are designed to provide access to the features of the TPS56837. Some modifications

can be made to this module.

3.1 Output Voltage Setpoint

To change the output voltage of the EVMs, change the value of resistor R6 (RFB_TOP) and resistor R7 (RFB_BOT).

Changing the value of R6 and R7 can change the output voltage above 0.6 V. The value of R6 and R7 for a

specific output voltage can be calculated using Equation 1.

§u

10.6VOUT

(1)

Table 3-1 lists the R6 and R7 values for some common output voltages.

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Table 3-1. Recommended Component Values

Switching

Frequency (kHz)

Output Voltage(1)

(V)

R6(2)

(kΩ) R7 (kΩ) L1 (µH)

COUT (3) (µF) C10 (4)(pF)

TYP

500

1.05 7.5 10 1 68

1.8 20 10 1.5 68

3.3 45.3 10 2.2 62 150

5 73.2 10 3.3 35 150

9 140 10 4.7 22 100

12 383 20 5.6 17 30

800

1.05 7.5 10 0.68 68

1.8 20 10 1 68

3.3 45.3 10 1.5 62 150

5 73.2 10 2.2 35 150

9 140 10 3.3 22 100

12 383 20 3.3 17 30

1200

1.05 7.5 10 0.47 68

1.8 20 10 0.68 68

3.3 45.3 10 1 62 150

5 73.2 10 1.5 35 150

9 140 10 2.2 22 100

12 383 20 2.2 17 30

(1) Please use the recommended L1 and COUT combination of the higher and closest output rail for

unlisted output rails.

(2) R6 = 0 Ω for VOUT = 0.6 V.

(3) COUT is the sum of effective output capacitance. In this data sheet, the effective capacitance is

defined as the actual capacitance under DC bias and temperature, not the rated or nameplate

values. All high value ceramic capacitors have a large voltage coefficient in addition to normal

tolerances and temperature effects. A careful study of bias and temperature variation of any

capacitor bank must be made to verify that the minimum value of effective capacitance is provided.

Refer to the information of DC bias and temperature characteristics from manufacturers of ceramic

capacitors.

(4) R8 and C10 can be used to improve the load transient response or improve the loop-phase

margin. The Optimizing Transient Response of Internally Compensated DCDC Converters with

Feed-forward Capacitor application report is helpful when experimenting with a feed-forward

capacitor.

3.2 Mode Selection

TPS56837 has a MODE pin that can offer six different options of overcurrent limit and switching frequency, as

shown in Table 3-2.

Table 3-2. MODE Pin Settings

MODE Pin Switching Frequency Over Current Limit

R = 10kohm 500 kHz ILIM-1 (Typ = 7.2 A)

R = 30.1kohm ILIM (Typ = 9.6 A)

R = 102kohm 800 kHz ILMI-1 (Typ = 7.2 A)

R = 162kohm ILIM (Typ = 9.6 A)

R = 249kohm 1200 kHz ILMI-1 (Typ = 7.2 A)

R = 374kohm ILIM (Typ = 9.6 A)

www.ti.com Modifications

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TPS56837 Buck Converter Evaluation Module 3

3.3 Adjustable UVLO

The undervoltage lockout (UVLO) can be adjusted externally using R1 (REN(TOP)) and R2 (REN(BOT)). See the

TPS56837 4.5-V to 28-V Input, 8-A Synchronous Buck Converter Data Sheet for detailed instructions for setting

the external UVLO.

Modifications www.ti.com

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4 Test Setup and Results

This section describes how to properly connect, set up, and use the TPS56837EVM. The section also includes

test results of output voltage ripple, start-up, and shut-down.

4.1 Input, Output Connections

Table 4-1 shows the provided input, output connectors and test points on the TPS56837EVM. A power supply

capable of supplying 8 A must be connected to J1 through a pair of 20-AWG wires. The load must be connected

to J2 through a pair of 20-AWG wires. The maximum load current capability is 8 A. Wire lengths must be

minimized to reduce losses in the wires. Test point TP12 provides a place to monitor the VIN input voltages with

TP11 providing a convenient ground reference. TP13 is used to monitor the output voltage with TP14 as the

ground reference.

Table 4-1. Connection and Test Points

Reference Designator Function

J1 VIN (see Table 1-1 for VIN range)

J2 VOUT, 5 V at 8-A maximum

J3 EN control. Connect EN to GND to disable

TP1 VIN terminal near J1

TP2 GND terminal near J1

TP3 GND test point

TP4 Switch node test point

TP5 Power good (PG) test point

TP6 Test point provided to connect external voltage source for PG pullup

TP7 Test point between voltage divider network and output. Used for loop

response measurement

TP8 VOUT terminal near J2

TP9 GND terminal near J2

TP10 GND test point

TP11 GND monitor test point near C1

TP12 VIN monitor test point near C1

TP13 VOUT monitor test point near C6

TP14 GND monitor test point near C6

4.2 Start-Up Procedure

1. Ensure that the jumper at J3 (Enable control) pins 1 and 2 are covered to shunt EN to GND, disabling the

output.

2. Apply appropriate VIN voltage to VIN (J1-1) and GND (J1-2).

3. Move the jumper at J3 (Enable control) away from pins 2 and 1 (EN and GND) to enable the output.

4.3 Output Voltage Ripple

The TPS56837EVM output voltage ripple waveforms are shown below. The output currents are as indicated.

www.ti.com Test Setup and Results

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TPS56837 Buck Converter Evaluation Module 5

Vin = 200 mV/div (AC)

Vout = 100 mV/div

SW = 20 V/div

IL = 5 A/div

100 us/div

Figure 4-1. TPS56837EVM Output Voltage Ripple, VIN = 24 V, IOUT = 0.01 A

Vin = 1 V/div (AC)

Vout = 50 mV/div

SW = 20 V/div

IL = 5 A/div

2 us/div

Figure 4-2. TPS56837EVM Output Voltage Ripple, VIN = 24 V, IOUT = 8 A

4.4 Start-Up

The TPS56837EVM start-up waveform relative to EN is shown below.

Test Setup and Results www.ti.com

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EN = 5 V/div

Vout = 5 V/div

SW = 20 V/div

PG = 5 V/div

2 ms/div

Figure 4-3. TPS56837EVM Start-Up Relative to EN, IOUT = 8 A

4.5 Shutdown

The TPS56837EVM shutdown waveform relative to EN is shown below.

EN = 5 V/div

Vout = 5 V/div

SW = 20 V/div

PG = 5 V/div

200 us/div

Figure 4-4. TPS56837EVM Shutdown Relative to EN, IOUT = 8 A

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TPS56837 Buck Converter Evaluation Module 7

5 Board Layout

This section provides a description of the TPS56837EVM, board layout, and layer illustrations.

5.1 Layout

The board images are shown in Figure 5-1 and Figure 5-2. The board layouts are shown in Figure 5-3 to

Figure 5-7. The top layer contains the main power traces for VIN, VOUT, and ground. Also on the top layer are

connections for the pins of the TPS56837 and a large area filled with power ground (PGND). Most of the signal

traces are also located on the top side. The input decoupling capacitors, C1, C2, and C3 are located as close to

the IC as possible. The input and output connectors, test points, and all of the components are located on the

top side. Middle layer 1, Middle layer 2, and the bottom layer are predominantly PGND planes. Analog ground

(AGND) area is provided on Middle layer 1. Figure 5-5 shows the AGND and PGND are connected at a single

point on the Middle layer 1. The bottom layer contains the output voltage feedback trace, the connection to the

VIN pin of the EN control, and the connections of test points.

Figure 5-1. TPS56837EVM Front Photo Figure 5-2. TPS56837EVM Back Photo

Figure 5-3. Top Assembly Figure 5-4. Top Layer

Board Layout www.ti.com

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Figure 5-5. Middle Layer 1 Figure 5-6. Middle Layer 2

Figure 5-7. Bottom Layer

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TPS56837 Buck Converter Evaluation Module 9

6 Schematic, List of Materials, and Reference

6.1 Schematic

Figure 6-1 is the schematic for the TPS56837EVM.

Figure 6-1. TPS56837EVM Schematic Diagram

Schematic, List of Materials, and Reference www.ti.com

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