Texas Instruments TUSB6020EVM Bedienungsanleitung

TUSB6020 Evaluation Model (EVM)Compatible With TMS320C6437DaVinci LC EVM

User's Guide

Literature Number: SLAU242February 2008

SLAU242 – February 2008

TUSB6020 EVM

The TUSB6020 is a USB 2.0 high-speed, On-the-Go (OTG) high-performance dual-role USB controllerwith intergrated PHY designed for a seamless connection to the VLYNQ serial interface, and is ideal for awide range of applications. The USB OTG dual-role controller can operate either as a function controllerfor a USB peripheral or as the host/peripheral in point-to-point or multi-point communications with otherfunctions. The integrated USB 2.0 PHY provides one-port operation at low speed (1.5 Mb/s), full speed(12 Mb/s), and high speed (480 Mb/s).

The device is fully compliant with Universal Serial Bus Specification Revision 2.0 and On-The-GoSupplement to the USB 2.0 Specification Revision 1.3.

The TUSB6020 EVM is compatible with several TI DSP platforms that are equipped with a mini-PCIinterface with an active VLYNQ connection. This includes the DM6437 Digital Video DevelopmentPlatform as well as the C6424 DSP Evaluation Module. The TUSB6020 EVM can provide a variety of USBfunctions to a DSP platform. Specifically, the TUSB6020 EVM has proven OTG host and OTG devicecapability. Alternatively, the TUSB6020 EVM can be configured to respond as a USB mass storagedevice.

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1.1 TUSB6020 Connection Overview

VLYNQ CRUN

DM6437 TUSB6020

VLYNQ CRUN

VLYNQ CLK VLYNQ CLK

VLYNQ RXD0

VLYNQ RXD1

VLYNQ RXD2

VLYNQ RXD3

VLYNQ TXD0

VLYNQ TXD1

VLYNQ TXD2

VLYNQ TXD3

VLYNQ TXD0

VLYNQ TXD1

VLYNQ TXD2

VLYNQ TXD3

VLYNQ RXD0

VLYNQ RXD1

VLYNQ RXD2

VLYNQ RXD3

GPIO0

GPIO1

GPIO2

GPIO3

GPIO4

GPIO5

GPIO6

GPIO7

10.7 kΩ, 1%

VDD1.8

VBUS Power Switch

Dual Voltage

Regulator

USB Micro-AB

Connector

VDD1.8

VIN (5 V)

VDD1.8

VSSREF

VSS

GND

VOUT3

PGOOD3_3 PGOOD1_5

VOUT2

VIN

VBUS

VDDA3.3

VDDS3.3

CPEN

VDD1.5

VDDD1.5

VDDCM1.5

VDDA1.5

3.3VSW_EN

1.5V_SWEN

SLEEP

RSTn

CLKIN

(see Note A)

19.2 Mhz

RSVD

RSVD_NC

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TUSB6020 Connection Overview

Figure 1-1 shows a high-level diagram of the connections between the TUSB6020 and the variouscomponents on the TUSB6020 EVM, as well as the DSP platform.

A Only CLKIN or XI/XO is required. This is selected by GPIO6 at power up.

Figure 1-1. TUSB6020 Connection Block Diagram

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1.2 TUSB6020 EVM

TUSB6020

Switch

Settings

TUSB6020 EVM

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Figure 1-2. TUSB6020 EVM – Top Side

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1.3 TUSB6020 EVM Features

1.4 Quick Hardware Setup

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TUSB6020 EVM Features

•The TUSB6020 EVM is shipped with a USB mini-AB connector, J13, installed. There are alsooverlapping footprints on the EVM for a USB Standard A connector and a USB Standard B connector.If one of these options is needed, the mini-AB connector can be de-soldered from J13, and a Bconnector added to J12 or an A connector added to J11. There is also a jumper, J14, that allows forthe ID pin of the mini-AB connector to be grounded for test purposes if installed.•There are two clock source options available on the TUSB6020 EVM. There is a 24-MHz crystal clocksource, X2, and a 19.2-MHz oscillator clock source, X1. The clock source used by the TUSB6020 isdetemined by the setting of Switch 7 of the toggle switch set, S1.•The toggle switches at S1 connect to the GPIO7:0 pins of the TUSB6020. Switch 8 must be turned onat power-up (GPIO7 = low) for the TUSB6020 to operate properly. The setting of switch 7 at power upis used to determine the clock source. After power up, any of the switches can be used as inputs forthe associated GPIOs.•A reset to the TUSB6020 device can be generated in a variety of ways on the TUSB6020 EVM. Areset can be manually generated using the pushbutton installed at SW1. A reset is generatedautomatically based on the power-good outputs of the voltage regulator at power up. In addition, byinstalling jumper, J9, a reset can be generated and held by installing the jumper to ground.•There are a number of test jumpers and test points on the TUSB6020 EVM that are not necessary toTUSB6020 EVM operation but could be used to test functionalities for use in production designs. Someof these are: the SLEEP jumper at J16, the 1.5V_SWEN jumper at J15, the 3.3V_SWEN jumper atJ10, and the jumper on the level shifted version of CP_EN at J4.•The power circuitry of the TUSB6020 EVM is set up to allow for easy power measurements. The 5-Vpower jack at P1 is not installed because the TUSB6020 can be powered by the DSP platform via themini-PCI interface. To take a power measurement, the trace connecting the associated jumper pinsshould be cut and the jumper installed so that an ammeter can be inserted between the pins. See theschematic for particulars on voltage rails, but traces connect the jumper pins on the following: J37, J38,J39, J40, J42, J43, J45, J46, J51, and J59.

1. Check that switches 7 and 8 in S1 are set to select the TUSB6020 normal device mode and the clocksource. For normal operation, switch 8 must be turned on to pull GPIO7 low. Switch 7 must be turnedon to select the XI clock input (24 MHz) with GPIO6 pulled low or left off to select the CLKIN clockinput (19.2 MHz) with GPIO6 pulled high.2. Insert the TUSB6020 EVM into the mini-PCI slot of the unpowered TMS320C6437 or TMS320C6424EVM.

3. Connect a UART cable from the TMS320C6437 EVM to a PC.4. Connect a mini-USB cable from EMU-USB, J501, of the TMS320C6437 EVM to a PC loaded with theCode Composer, CCStudio v3.3, C6424 software.5. Add wallpower to 5V IN, J14, of the TMS320C6437 EVM.6. Check that LEDs, DS5 and DS502, are lit on the TMS320C6437 EVM.7. Check that LED D1 is lit on the TUSB6020 EVM.

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1.5 Quick Software Setup

Quick Software Setup

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1. Set up the COM port.

2. Start the Code Composer software select Debug →Connect.

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Quick Software Setup

3. Select File →Load program and select the program and then run it. On the COM port you should see:

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1.6 TUSB6020 EVM Features

TUSB6020 EVM Features

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4. Connect a USB cable from a PC to the TUSB6020 EVM. You should see the following on the COMport:

5. At the prompt, enter h to display a list of test options.

Table 1-1. Bill of Materials and SchematicsITEM QUANTITY REFERENCE PART PKG MANUFACTURER PART NO. NOTES

C1, C28, C30,C38, C39,C42,1 10 .01 µF 603C44, C53, C56,C59

2 2 C2, C3 33 pF 603

C12, C58, C6,3a 7 C62, C63,C64, 10 µF 603C65

C19, C21, C23,C13, C18,C20,3b 3 C22, C27, C29, 10 µF, Tantalum 805C37,C40, C41,C43, C54,C57

4 15 C60, C66, C67 .1 µF 603

5 2 C14, C45 1 µF 603

6 1 C15 4.7 µF 603

7 1 C26 1 µF 805

8 1 D1 GREEN 805 Panasonic LNJ306G5PRX

9 1 F1 3A FUSE N/A LittelFuse R251003

J4, J5, J6, J9, J10,J14, J15, J16, J37,10 19 J38, J39, J40, J42, HDR2X1 M .1 DNIJ43, J44, J45, J46,J51, J59

11 1 J11 USB Series A N/A DNI

12 1 J12 USB Series B N/A DNI

13 1 J13 USB Mini/Micro AB Mill-Max MNE20-5G5P10

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TUSB6020 EVM Features

Table 1-1. Bill of Materials and Schematics (continued)ITEM QUANTITY REFERENCE PART PKG MANUFACTURER PART NO. NOTES

J20, J21, J22, J23,J24, J25, J26, J27,J28, J29, J30, J31,14 23 PAD DNIJ32, J33, J34, J35,J36, J54, J55, J56,J57, J58, J61

15 1 L1 INDUCTOR mpz.pdf TDK MPZ2012S331AT

16 1 P1 5 V at 3 A CUI Inc CP-202AH

17 1 P2 128 pin Mini PCI Edge N/A N/A N/A DNI

18 1 R2 10.7K 1% 603

R4, R30, R4,R106, R107,R108, R109,19 15 R110, R111, 1K 603R112, R113,R114, R115,R123, R124

R28, R40, R43,R49, R61, R62,R105, R116,20 16 R117, R118, 10K 603R119, R120,R121, R122,R135, R136

R29, R31, R32,21 4 0 603R48

22 1 R33 0 603 DNI

R44, R47, R52,23 4 250K 603R54

24 1 R60 330 603

25 1 SW1 SW TACT Alps SKHHALA010

26 1 S1 SW DIP-8 ITT TDA08H0SK1R

27 1 U1 TUSB6020 ZQE80 TI TUSB6020ZQE

SN74LVC2T45, Dual Bit/Supply28 1 U3 SM8 TI SN74LVC2T45DCTRTransceiver

SN74ALVC08, Multiple AND29 1 U4 SOIC14 TI SN74ALVC08DGate

30 1 U5 TPS3836E18, Reset Supervisor 5SOT-23 TI TPS3836E18

31 1 U8 TPS77618, 1.8 V Regulator SOIC8 TI TPS77618D

TPS70848, Dual Voltage32 1 U9 SM20 TI TPS70848PWPRregulator

33 1 U11 TPS2051B, V

BUS

Power Switch DBV5 TI TPS2051BDBV

34 1 X1 19.2 MHz, CSX-1 SMT Crystek 601512

35 1 X2 24 MHz, C

= 20 pF SMT Crystek 16808

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1.7 TUSB6020 Schematics

Design Note: X1 should be placed close to U1

Design Note: X2, C2 and C3 should be placed close to U1

Design Note: R2 should be placed close to U1

Design Note: Pull-down

resistors are required on

"No Connect" signals:

A8, B7, B8, B9, C6, C7,

C8, D6, D8, E7, G4 and

J5.

J23

PAD

J24

PAD

R112

J26

PAD

J25

PAD

J27

PAD

J28

PAD

R114

J29

PAD

J30

PAD

R123

J31

PAD

J32

PAD

R106

R108

J21

PAD

R110

J22

PAD

R115

R113

R111

R109

R107

1 2

J16

SLEEP

R30

VDDA_3.3V

VLYNQ_TXD[3..0] 7

VLYNQ_TXD2

VLYNQ_TXD3

VLYNQ_TXD0

VLYNQ_TXD1

VLYNQ_RXD3

VLYNQ_RXD1

VLYNQ_RXD2

VLYNQ_RXD0

VLYNQ_RXD[3..0] 7

VLYNQ_CRUN 7

VLYNQ_CLK 7

VSS1 A2

VSS2 A6

VSS3 B4

RSVD4 B9

VSS5 E5

VLYNQ_CRUN E9

VSS6 G1

VLYNQ_TXD1 G9

VSS9 J2

NC4 J4

VSS10 J8

VSSREF B1

VSSCM1P5 D3

VSSA3P3 E4

VSSA1P5 E1

VSSD1P5 F4

A3 XI

VDD15_2

VDD15_3

VDD15_4

VDD15_5

C5 VSS4 D9

VDDCM1P5

VLYNQ_CLK F9

VDD15_6

VDDD1P5

VDDA1P5

VBUS

VDD18_1

VDD18_2

VLYNQ_TXD0 H9

VDD18_4

VLYNQ_RXD3 J6

VDDA3P3

NC1 F6

GPIO3

NC2 G5

VDDS3P3_2

NC3 H5

VLYNQ_RXD2 H6

VLYNQ_RXD0 H7

VLYNQ_TXD2 H8

VDDS3P3_1

VLYNQ_TXD3 F7

RSVD9 D8

RSVD6 C7

VDD15_1

RSVD7 C8

RSVD2 B7

RSVD3 B8

GPIO0

GPIO1

GPIO2

VDD18_3

GPIO4

RSVD10 E7

GPIO6

GPIO7

VDDS3P3_3

RSTn

CPEN

SLEEP H3

1.5V_SWEN

G2 3.3V_SWEN

RSVD11 G4

VSS7 G7

VSS8 G8

RSVD1 A8

CLKIN

GPIO5

RSVD8 D6

TEST D4

VLYNQ_RXD1 J7

RSVD12 J5

RSVD5 C6

TUSB6020

DM3

DP3

ID3

VBUS

3.3V_SWEN

VDDD_1.5V

1.5V_SWEN

VDDCM_1.5V

VDDA_1.5V

VDDA_3.3V

VDD_1.8V_TUSB6020

VDD_1.5V

1 2

J10

1 2

J15

CP_EN2

GPIO26

GPIO06

RESETn2

GPIO16

GPIO46

GPIO56

GPIO66

GPIO36

GPIO76

J33

PAD J34

PAD

J35

PAD

R124

1 2

24 MHz, CL = 20pF

33pF

10.7K 1%

J36

PAD

J20

PAD

J54

PAD

J55

PAD

J56

PAD

J57

PAD

R105 10K

J58

PAD

VDD_1.8V

VCC

GND

2OUT 3

19.2 MHz, CSX-1

.01uF

TUSB6020 Schematics

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Figure 1-3. TUSB6020

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