Texas Instruments TMS320C2810 Installations- und Benutzerhandbuch

TMS320F2810, TMS320F2811, TMS320F2812

TMS320C2810, TMS320C2811, TMS320C2812

Digital Signal Processors

Data Manual

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Literature Number: SPRS174T

April 2001–Revised May 2012

TMS320F2810, TMS320F2811, TMS320F2812

TMS320C2810, TMS320C2811, TMS320C2812

www.ti.com

SPRS174T –APRIL 2001–REVISED MAY 2012

Contents

1 TMS320F281x, TMS320C281x DSPs ..................................................................................... 10

1.1 Features .................................................................................................................... 10

1.2 Getting Started ............................................................................................................. 11

2 Introduction ...................................................................................................................... 12

2.1 Description ................................................................................................................. 12

2.2 Device Summary .......................................................................................................... 13

2.3 Pin Assignments ........................................................................................................... 14

2.3.1 Terminal Assignments for the GHH/ZHH Packages ....................................................... 14

2.3.2 Pin Assignments for the PGF Package ...................................................................... 15

2.3.3 Pin Assignments for the PBK Package ...................................................................... 16

2.4 Signal Descriptions ........................................................................................................ 17

3 Functional Overview .......................................................................................................... 26

3.1 Memory Map ............................................................................................................... 27

3.2 Brief Descriptions .......................................................................................................... 32

3.2.1 C28x CPU ....................................................................................................... 32

3.2.2 Memory Bus (Harvard Bus Architecture) .................................................................... 32

3.2.3 Peripheral Bus .................................................................................................. 32

3.2.4 Real-Time JTAG and Analysis ................................................................................ 33

3.2.5 External Interface (XINTF) (2812 Only) ...................................................................... 33

3.2.6 Flash (F281x Only) ............................................................................................. 33

3.2.7 ROM (C281x Only) ............................................................................................. 33

3.2.8 M0, M1 SARAMs ............................................................................................... 34

3.2.9 L0, L1, H0 SARAMs ............................................................................................ 34

3.2.10 Boot ROM ....................................................................................................... 34

3.2.11 Security .......................................................................................................... 34

3.2.12 Peripheral Interrupt Expansion (PIE) Block ................................................................. 36

3.2.13 External Interrupts (XINT1, XINT2, XINT13, XNMI) ........................................................ 36

3.2.14 Oscillator and PLL .............................................................................................. 36

3.2.15 Watchdog ........................................................................................................ 36

3.2.16 Peripheral Clocking ............................................................................................. 36

3.2.17 Low-Power Modes .............................................................................................. 36

3.2.18 Peripheral Frames 0, 1, 2 (PFn) .............................................................................. 37

3.2.19 General-Purpose Input/Output (GPIO) Multiplexer ......................................................... 37

3.2.20 32-Bit CPU-Timers (0, 1, 2) ................................................................................... 37

3.2.21 Control Peripherals ............................................................................................. 37

3.2.22 Serial Port Peripherals ......................................................................................... 38

3.3 Register Map ............................................................................................................... 39

3.4 Device Emulation Registers .............................................................................................. 41

3.5 External Interface, XINTF (2812 Only) ................................................................................. 42

3.5.1 Timing Registers ................................................................................................ 43

3.5.2 XREVISION Register ........................................................................................... 43

3.6 Interrupts .................................................................................................................... 44

3.6.1 External Interrupts .............................................................................................. 47

3.7 System Control ............................................................................................................ 48

3.8 OSC and PLL Block ....................................................................................................... 50

3.8.1 Loss of Input Clock ............................................................................................. 51

3.9 PLL-Based Clock Module ................................................................................................ 52

3.10 External Reference Oscillator Clock Option ........................................................................... 52

3.11 Watchdog Block ........................................................................................................... 53

3.12 Low-Power Modes Block ................................................................................................. 54

4 Peripherals ....................................................................................................................... 55

TMS320F2810, TMS320F2811, TMS320F2812

TMS320C2810, TMS320C2811, TMS320C2812

www.ti.com

SPRS174T –APRIL 2001–REVISED MAY 2012

4.1 32-Bit CPU-Timers 0/1/2 ................................................................................................. 55

4.2 Event Manager Modules (EVA, EVB) ................................................................................... 58

4.2.1 General-Purpose (GP) Timers ................................................................................ 61

4.2.2 Full-Compare Units ............................................................................................. 61

4.2.3 Programmable Deadband Generator ........................................................................ 61

4.2.4 PWM Waveform Generation .................................................................................. 61

4.2.5 Double Update PWM Mode ................................................................................... 61

4.2.6 PWM Characteristics ........................................................................................... 62

4.2.7 Capture Unit ..................................................................................................... 62

4.2.8 Quadrature-Encoder Pulse (QEP) Circuit ................................................................... 62

4.2.9 External ADC Start-of-Conversion ........................................................................... 62

4.3 Enhanced Analog-to-Digital Converter (ADC) Module ............................................................... 63

4.4 Enhanced Controller Area Network (eCAN) Module .................................................................. 68

4.5 Multichannel Buffered Serial Port (McBSP) Module .................................................................. 73

4.6 Serial Communications Interface (SCI) Module ....................................................................... 77

4.7 Serial Peripheral Interface (SPI) Module ............................................................................... 80

4.8 GPIO MUX ................................................................................................................. 83

5 Development Support ........................................................................................................ 86

5.1 Device and Development Support Tool Nomenclature ............................................................... 86

5.2 Documentation Support .................................................................................................. 87

5.3 Community Resources .................................................................................................... 89

6 Electrical Specifications ..................................................................................................... 91

6.1 Absolute Maximum Ratings .............................................................................................. 91

6.2 Recommended Operating Conditions .................................................................................. 91

6.3 Electrical Characteristics Over Recommended Operating Conditions (Unless Otherwise Noted) ............. 92

6.4 Current Consumption ..................................................................................................... 93

6.5 Current Consumption Graphs ............................................................................................ 95

6.6 Reducing Current Consumption ......................................................................................... 97

6.7 Emulator Connection Without Signal Buffering for the DSP ......................................................... 97

6.8 Power Sequencing Requirements ....................................................................................... 98

6.9 Signal Transition Levels ................................................................................................. 100

6.10 Timing Parameter Symbology .......................................................................................... 101

6.11 General Notes on Timing Parameters ................................................................................ 101

6.12 Test Load Circuit ......................................................................................................... 101

6.13 Device Clock Table ...................................................................................................... 102

6.14 Clock Requirements and Characteristics ............................................................................. 103

6.14.1 Input Clock Requirements ................................................................................... 103

6.14.2 Output Clock Characteristics ................................................................................ 104

6.15 Reset Timing ............................................................................................................. 104

6.16 Low-Power Mode Wakeup Timing ..................................................................................... 108

6.17 Event Manager Interface ................................................................................................ 112

6.17.1 PWM Timing ................................................................................................... 112

6.17.2 Interrupt Timing ................................................................................................ 114

6.18 General-Purpose Input/Output (GPIO) – Output Timing ............................................................ 115

6.19 General-Purpose Input/Output (GPIO) – Input Timing .............................................................. 116

6.20 Serial Peripheral Interface (SPI) Master Mode Timing .............................................................. 117

6.21 Serial Peripheral Interface (SPI) Slave Mode Timing ............................................................... 122

6.22 External Interface (XINTF) Timing ..................................................................................... 126

6.23 XINTF Signal Alignment to XCLKOUT ................................................................................ 130

6.24 External Interface Read Timing ........................................................................................ 131

6.25 External Interface Write Timing ........................................................................................ 133

6.26 External Interface Ready-on-Read Timing With One External Wait State ....................................... 134

6.27 External Interface Ready-on-Write Timing With One External Wait State ....................................... 137

TMS320F2810, TMS320F2811, TMS320F2812

TMS320C2810, TMS320C2811, TMS320C2812

SPRS174T –APRIL 2001–REVISED MAY 2012

www.ti.com

6.28 XHOLD and XHOLDA ................................................................................................... 140

6.29 XHOLD/XHOLDA Timing ............................................................................................... 141

6.30 On-Chip Analog-to-Digital Converter .................................................................................. 143

6.30.1 ADC Absolute Maximum Ratings ........................................................................... 143

6.30.2 ADC Electrical Characteristics Over Recommended Operating Conditions ........................... 144

6.30.3 Current Consumption for Different ADC Configurations ................................................. 145

6.30.4 ADC Power-Up Control Bit Timing .......................................................................... 146

6.30.5 Detailed Description .......................................................................................... 146

6.30.5.1 Reference Voltage ................................................................................ 146

6.30.5.2 Analog Inputs ..................................................................................... 146

6.30.5.3 Converter .......................................................................................... 146

6.30.5.4 Conversion Modes ............................................................................... 146

6.30.6 Sequential Sampling Mode (Single-Channel) (SMODE = 0) ............................................ 147

6.30.7 Simultaneous Sampling Mode (Dual-Channel) (SMODE = 1) .......................................... 148

6.30.8 Definitions of Specifications and Terminology ............................................................. 149

6.31 Multichannel Buffered Serial Port (McBSP) Timing ................................................................. 150

6.31.1 McBSP Transmit and Receive Timing ...................................................................... 150

6.31.2 McBSP as SPI Master or Slave Timing .................................................................... 153

6.32 Flash Timing (F281x Only) ............................................................................................. 157

6.33 ROM Timing (C281x only) .............................................................................................. 159

6.34 Migrating From F281x Devices to C281x Devices .................................................................. 160

7 Revision History .............................................................................................................. 161

8 Mechanical Data .............................................................................................................. 162

TMS320F2810, TMS320F2811, TMS320F2812

TMS320C2810, TMS320C2811, TMS320C2812

www.ti.com

SPRS174T –APRIL 2001–REVISED MAY 2012

List of Figures

2-1 TMS320F2812 and TMS320C2812 179-Ball GHH/ZHH MicroStar BGA™ (Bottom View)............................. 14

2-2 TMS320F2812 and TMS320C2812 176-Pin PGF LQFP (Top View) ..................................................... 15

2-3 TMS320F2810, TMS320F2811, TMS320C2810, and TMS320C2811 128-Pin PBK LQFP (Top View).............. 16

3-1 Functional Block Diagram....................................................................................................... 27

3-2 F2812/C2812 Memory Map..................................................................................................... 28

3-3 F2811/C2811 Memory Map..................................................................................................... 29

3-4 F2810/C2810 Memory Map..................................................................................................... 29

3-5 External Interface Block Diagram .............................................................................................. 42

3-6 Interrupt Sources................................................................................................................. 44

3-7 Multiplexing of Interrupts Using the PIE Block ............................................................................... 45

3-8 Clock and Reset Domains ...................................................................................................... 48

3-9 OSC and PLL Block.............................................................................................................. 50

3-10 Recommended Crystal/Clock Connection .................................................................................... 52

3-11 Watchdog Module................................................................................................................ 53

4-1 CPU-Timers....................................................................................................................... 55

4-2 CPU-Timer Interrupts Signals and Output Signal............................................................................ 56

4-3 Event Manager A Functional Block Diagram ................................................................................. 61

4-4 Block Diagram of the F281x and C281x ADC Module ...................................................................... 64

4-5 ADC Pin Connections With Internal Reference .............................................................................. 65

4-6 ADC Pin Connections With External Reference ............................................................................. 66

4-7 eCAN Block Diagram and Interface Circuit ................................................................................... 69

4-8 eCAN Memory Map.............................................................................................................. 71

4-9 McBSP Module With FIFO...................................................................................................... 74

4-10 Serial Communications Interface (SCI) Module Block Diagram............................................................ 79

4-11 Serial Peripheral Interface Module Block Diagram (Slave Mode).......................................................... 82

4-12 GPIO/Peripheral Pin Multiplexing .............................................................................................. 85

5-1 TMS320x281x Device Nomenclature.......................................................................................... 87

6-1 F2812/F2811/F2810 Typical Current Consumption Over Frequency ..................................................... 95

6-2 F2812/F2811/F2810 Typical Power Consumption Over Frequency....................................................... 96

6-3 C2812/C2811/C2810 Typical Current Consumption Over Frequency .................................................... 96

6-4 C2812/C2811/C2810 Typical Power Consumption Over Frequency...................................................... 97

6-5 Emulator Connection Without Signal Buffering for the DSP................................................................ 98

6-6 F2812/F2811/F2810 Typical Power-Up and Power-Down Sequence – Option 2 ....................................... 99

6-7 Output Levels.................................................................................................................... 100

6-8 Input Levels...................................................................................................................... 100

6-9 3.3-V Test Load Circuit......................................................................................................... 101

6-10 Clock Timing..................................................................................................................... 104

6-11 Power-on Reset in Microcomputer Mode (XMP/MC = 0) (See Note D)................................................. 106

6-12 Power-on Reset in Microprocessor Mode (XMP/MC = 1)................................................................. 107

6-13 Warm Reset in Microcomputer Mode ........................................................................................ 107

6-14 Effect of Writing Into PLLCR Register ....................................................................................... 107

6-15 IDLE Entry and Exit Timing.................................................................................................... 108

6-16 STANDBY Entry and Exit Timing............................................................................................. 110

6-17 HALT Wakeup Using XNMI ................................................................................................... 111

6-18 PWM Output Timing............................................................................................................ 112

6-19 TDIRx Timing.................................................................................................................... 113

6-20 EVASOC Timing ................................................................................................................ 113

TMS320F2810, TMS320F2811, TMS320F2812

TMS320C2810, TMS320C2811, TMS320C2812

SPRS174T –APRIL 2001–REVISED MAY 2012

www.ti.com

6-21 EVBSOC Timing ................................................................................................................ 113

6-22 External Interrupt Timing....................................................................................................... 114

6-23 General-Purpose Output Timing.............................................................................................. 115

6-24 GPIO Input Qualifier – Example Diagram for QUALPRD = 1............................................................. 116

6-25 General-Purpose Input Timing................................................................................................ 117

6-26 SPI Master Mode External Timing (Clock Phase = 0) ..................................................................... 119

6-27 SPI Master External Timing (Clock Phase = 1)............................................................................. 121

6-28 SPI Slave Mode External Timing (Clock Phase = 0)....................................................................... 123

6-29 SPI Slave Mode External Timing (Clock Phase = 1)....................................................................... 125

6-30 Relationship Between XTIMCLK and SYSCLKOUT ....................................................................... 129

6-31 Example Read Access......................................................................................................... 132

6-32 Example Write Access ......................................................................................................... 133

6-33 Example Read With Synchronous XREADY Access ...................................................................... 135

6-34 Example Read With Asynchronous XREADY Access..................................................................... 136

6-35 Write With Synchronous XREADY Access.................................................................................. 138

6-36 Write With Asynchronous XREADY Access ................................................................................ 139

6-37 External Interface Hold Waveform............................................................................................ 141

6-38 XHOLD/XHOLDA Timing Requirements (XCLKOUT = 1/2 XTIMCLK).................................................. 142

6-39 ADC Analog Input Impedance Model ........................................................................................ 146

6-40 ADC Power-Up Control Bit Timing ........................................................................................... 146

6-41 Sequential Sampling Mode (Single-Channel) Timing...................................................................... 147

6-42 Simultaneous Sampling Mode Timing ....................................................................................... 148

6-43 McBSP Receive Timing........................................................................................................ 152

6-44 McBSP Transmit Timing....................................................................................................... 152

6-45 McBSP Timing as SPI Master or Slave: CLKSTP = 10b, CLKXP = 0................................................... 153

6-46 McBSP Timing as SPI Master or Slave: CLKSTP = 11b, CLKXP = 0................................................... 154

6-47 McBSP Timing as SPI Master or Slave: CLKSTP = 10b, CLKXP = 1................................................... 155

6-48 McBSP Timing as SPI Master or Slave: CLKSTP = 11b, CLKXP = 1................................................... 156

TMS320F2810, TMS320F2811, TMS320F2812

TMS320C2810, TMS320C2811, TMS320C2812

www.ti.com

SPRS174T –APRIL 2001–REVISED MAY 2012

List of Tables

2-1 Hardware Features............................................................................................................... 13

2-2 Signal Descriptions............................................................................................................... 17

3-1 Addresses of Flash Sectors in F2812 and F2811 ........................................................................... 30

3-2 Addresses of Flash Sectors in F2810 ......................................................................................... 30

3-3 Wait States........................................................................................................................ 31

3-4 Boot Mode Selection............................................................................................................. 34

3-5 Impact of Using the Code Security Module................................................................................... 35

3-6 Peripheral Frame 0 Registers .................................................................................................. 39

3-7 Peripheral Frame 1 Registers .................................................................................................. 39

3-8 Peripheral Frame 2 Registers .................................................................................................. 40

3-9 Device Emulation Registers..................................................................................................... 41

3-10 XINTF Configuration and Control Register Mappings....................................................................... 43

3-11 XREVISION Register Bit Definitions........................................................................................... 43

3-12 PIE Peripheral Interrupts ........................................................................................................ 45

3-13 PIE Configuration and Control Registers...................................................................................... 46

3-14 External Interrupts Registers ................................................................................................... 47

3-15 PLL, Clocking, Watchdog, and Low-Power Mode Registers ............................................................... 49

3-16 PLLCR Register Bit Definitions................................................................................................. 51

3-17 Possible PLL Configuration Modes ............................................................................................ 52

3-18 F281x and C281x Low-Power Modes ......................................................................................... 54

4-1 CPU-Timers 0, 1, 2 Configuration and Control Registers................................................................... 57

4-2 Module and Signal Names for EVA and EVB ................................................................................ 58

4-3 EVA Registers .................................................................................................................... 59

4-4 ADC Registers.................................................................................................................... 67

4-5 3.3-V eCAN Transceivers for the TMS320F281x and TMS320C281x DSPs ............................................ 70

4-6 CAN Registers.................................................................................................................... 72

4-7 McBSP Registers................................................................................................................. 75

4-8 SCI-A Registers .................................................................................................................. 78

4-9 SCI-B Registers .................................................................................................................. 78

4-10 SPI Registers ..................................................................................................................... 81

4-11 GPIO Mux Registers............................................................................................................. 83

4-12 GPIO Data Registers ............................................................................................................ 84

5-1 TMS320x281x Peripheral Selection Guide ................................................................................... 87

6-1 TMS320F281x Current Consumption by Power-Supply Pins Over Recommended Operating Conditions During

Low-Power Modes at 150-MHz SYSCLKOUT ............................................................................... 93

6-2 TMS320C281x Current Consumption by Power-Supply Pins Over Recommended Operating Conditions During

Low-Power Modes at 150-MHz SYSCLKOUT ............................................................................... 94

6-3 Typical Current Consumption by Various Peripherals (at 150 MHz) ...................................................... 97

6-4 Recommended “Low-Dropout Regulators”.................................................................................... 98

6-5 TMS320F281x and TMS320C281x Clock Table and Nomenclature .................................................... 102

6-6 Input Clock Frequency ......................................................................................................... 103

6-7 XCLKIN Timing Requirements – PLL Bypassed or Enabled ............................................................. 103

6-8 XCLKIN Timing Requirements – PLL Disabled ............................................................................ 103

6-9 Possible PLL Configuration Modes........................................................................................... 103

6-10 XCLKOUT Switching Characteristics (PLL Bypassed or Enabled) ...................................................... 104

6-11 Reset (XRS) Timing Requirements .......................................................................................... 104

6-12 IDLE Mode Timing Requirements ........................................................................................... 108

TMS320F2810, TMS320F2811, TMS320F2812

TMS320C2810, TMS320C2811, TMS320C2812

SPRS174T –APRIL 2001–REVISED MAY 2012

www.ti.com

6-13 IDLE Mode Switching Characteristics ....................................................................................... 108

6-14 STANDBY Mode Timing Requirements ..................................................................................... 109

6-15 STANDBY Mode Switching Characteristics ................................................................................ 109

6-16 HALT Mode Timing Requirements ........................................................................................... 111

6-17 HALT Mode Switching Characteristics ...................................................................................... 111

6-18 PWM Switching Characteristics .............................................................................................. 112

6-19 Timer and Capture Unit Timing Requirements ............................................................................. 112

6-20 External ADC Start-of-Conversion – EVA – Switching Characteristics ................................................. 113

6-21 External ADC Start-of-Conversion – EVB – Switching Characteristics ................................................. 113

6-22 Interrupt Switching Characteristics .......................................................................................... 114

6-23 Interrupt Timing Requirements ............................................................................................... 114

6-24 General-Purpose Output Switching Characteristics ....................................................................... 115

6-25 General-Purpose Input Timing Requirements .............................................................................. 117

6-26 SPI Master Mode External Timing (Clock Phase = 0) .................................................................... 118

6-27 SPI Master Mode External Timing (Clock Phase = 1) .................................................................... 120

6-28 SPI Slave Mode External Timing (Clock Phase = 0) ...................................................................... 122

6-29 SPI Slave Mode External Timing (Clock Phase = 1) ...................................................................... 124

6-30 Relationship Between Parameters Configured in XTIMING and Duration of Pulse ................................... 126

6-31 XINTF Clock Configurations................................................................................................... 129

6-32 External Memory Interface Read Switching Characteristics ............................................................. 131

6-33 External Memory Interface Read Timing Requirements .................................................................. 131

6-34 External Memory Interface Write Switching Characteristics .............................................................. 133

6-35 External Memory Interface Read Switching Characteristics (Ready-on-Read, 1 Wait State) ....................... 134

6-36 External Memory Interface Read Timing Requirements (Ready-on-Read, 1 Wait State) ............................ 134

6-37 Synchronous XREADY Timing Requirements (Ready-on-Read, 1 Wait State) ....................................... 134

6-38 Asynchronous XREADY Timing Requirements (Ready-on-Read, 1 Wait State) ...................................... 134

6-39 External Memory Interface Write Switching Characteristics (Ready-on-Write, 1 Wait State) ........................ 137

6-40 Synchronous XREADY Timing Requirements (Ready-on-Write, 1 Wait State) ....................................... 137

6-41 Asynchronous XREADY Timing Requirements (Ready-on-Write, 1 Wait State) ...................................... 137

6-42 XHOLD/XHOLDA Timing Requirements (XCLKOUT = XTIMCLK) ...................................................... 141

6-43 XHOLD/XHOLDA Timing Requirements (XCLKOUT = 1/2 XTIMCLK) ................................................. 142

6-44 DC Specifications .............................................................................................................. 144

6-45 AC Specifications............................................................................................................... 145

6-46 Current Consumption for Different ADC Configurations (at 25-MHz ADCCLK)........................................ 145

6-47 ADC Power-Up Delays......................................................................................................... 146

6-48 Sequential Sampling Mode Timing........................................................................................... 147

6-49 Simultaneous Sampling Mode Timing ....................................................................................... 148

6-50 McBSP Timing Requirements ................................................................................................ 150

6-51 McBSP Switching Characteristics ........................................................................................... 151

6-52 McBSP as SPI Master or Slave Timing Requirements (CLKSTP = 10b, CLKXP = 0) ............................... 153

6-53 McBSP as SPI Master or Slave Switching Characteristics (CLKSTP = 10b, CLKXP = 0) ........................... 153

6-54 McBSP as SPI Master or Slave Timing Requirements (CLKSTP = 11b, CLKXP = 0) ............................... 154

6-55 McBSP as SPI Master or Slave Switching Characteristics (CLKSTP = 11b, CLKXP = 0) ........................... 154

6-56 McBSP as SPI Master or Slave Timing Requirements (CLKSTP = 10b, CLKXP = 1) ............................... 155

6-57 McBSP as SPI Master or Slave Switching Characteristics (CLKSTP = 10b, CLKXP = 1) ........................... 155

6-58 McBSP as SPI Master or Slave Timing Requirements (CLKSTP = 11b, CLKXP = 1) ............................... 156

6-59 McBSP as SPI Master or Slave Switching Characteristics (CLKSTP = 11b, CLKXP = 1) ........................... 156

6-60 Flash Endurance for A and S Temperature Material....................................................................... 157

TMS320F2810, TMS320F2811, TMS320F2812

TMS320C2810, TMS320C2811, TMS320C2812

www.ti.com

SPRS174T –APRIL 2001–REVISED MAY 2012

6-61 Flash Endurance for Q Temperature Material .............................................................................. 157

6-62 Flash Parameters at 150-MHz SYSCLKOUT............................................................................... 157

6-63 Flash/OTP Access Timing..................................................................................................... 158

6-64 Minimum Required Flash Wait States at Different Frequencies (F281x devices)...................................... 158

6-65 ROM Access Timing............................................................................................................ 159

6-66 Minimum Required ROM Wait States at Different Frequencies (C281x devices)...................................... 159

8-1 Thermal Resistance Characteristics for 179-Ball GHH .................................................................... 162

8-2 Thermal Resistance Characteristics for 179-Ball ZHH..................................................................... 162

8-3 Thermal Resistance Characteristics for 176-Pin PGF ..................................................................... 162

8-4 Thermal Resistance Characteristics for 128-Pin PBK ..................................................................... 162

TMS320F2810, TMS320F2811, TMS320F2812

TMS320C2810, TMS320C2811, TMS320C2812

SPRS174T –APRIL 2001–REVISED MAY 2012

www.ti.com

Digital Signal Processors

Check for Samples: TMS320F2810,TMS320F2811,TMS320F2812,TMS320C2810,TMS320C2811,TMS320C2812

1 TMS320F281x, TMS320C281x DSPs

1.1 Features

1234

• High-Performance Static CMOS Technology • Clock and System Control

– 150 MHz (6.67-ns Cycle Time) – Dynamic PLL Ratio Changes Supported

– Low-Power (1.8-V Core at 135 MHz, – On-Chip Oscillator

1.9-V Core at 150 MHz, 3.3-V I/O) Design – Watchdog Timer Module

• JTAG Boundary Scan Support (1) • Three External Interrupts

• High-Performance 32-Bit CPU ( TMS320C28x™) • Peripheral Interrupt Expansion (PIE) Block That

– 16 x 16 and 32 x 32 MAC Operations Supports 45 Peripheral Interrupts

– 16 x 16 Dual MAC • Three 32-Bit CPU-Timers

– Harvard Bus Architecture • 128-Bit Security Key/Lock

– Atomic Operations – Protects Flash/ROM/OTP and L0/L1 SARAM

– Fast Interrupt Response and Processing – Prevents Firmware Reverse-Engineering

– Unified Memory Programming Model • Motor Control Peripherals

– 4M Linear Program/Data Address Reach – Two Event Managers (EVA, EVB)

– Code-Efficient (in C/C++ and Assembly) – Compatible to 240xA Devices

– TMS320F24x/LF240x Processor Source Code • Serial Port Peripherals

Compatible – Serial Peripheral Interface (SPI)

• On-Chip Memory – Two Serial Communications Interfaces

– Flash Devices: Up to 128K x 16 Flash (SCIs), Standard UART

(Four 8K x 16 and Six 16K x 16 Sectors) – Enhanced Controller Area Network (eCAN)

– ROM Devices: Up to 128K x 16 ROM – Multichannel Buffered Serial Port (McBSP)

– 1K x 16 OTP ROM • 12-Bit ADC, 16 Channels

– L0 and L1: 2 Blocks of 4K x 16 Each Single- – 2 x 8 Channel Input Multiplexer

Access RAM (SARAM) – Two Sample-and-Hold

– H0: 1 Block of 8K x 16 SARAM – Single/Simultaneous Conversions

– M0 and M1: 2 Blocks of 1K x 16 Each – Fast Conversion Rate: 80 ns/12.5 MSPS

SARAM • Up to 56 General-Purpose I/O (GPIO) Pins

• Boot ROM (4K x 16) • Advanced Emulation Features

– With Software Boot Modes – Analysis and Breakpoint Functions

– Standard Math Tables – Real-Time Debug via Hardware

• External Interface (2812) • Development Tools Include

– Over 1M x 16 Total Memory – ANSI C/C++ Compiler/Assembler/Linker

– Programmable Wait States – Code Composer Studio™ IDE

– Programmable Read/Write Strobe Timing – DSP/BIOS™

– Three Individual Chip Selects – JTAG Scan Controllers(1)

• Endianness: Little Endian • Low-Power Modes and Power Savings

– IDLE, STANDBY, HALT Modes Supported

– Disable Individual Peripheral Clocks

(1) IEEE Standard 1149.1-1990 IEEE Standard Test Access Port

and Boundary-Scan Architecture

1Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2MicroStar BGA, TMS320C28x, Code Composer Studio, DSP/BIOS, C28x, TMS320C2000, TI, TMS320C54x, TMS320C55x,

TMS320 are trademarks of Texas Instruments.

3eZdsp is a trademark of Spectrum Digital Incorporated.

4All other trademarks are the property of their respective owners.

PRODUCTION DATA information is current as of publication date. Products conform to

processing does not necessarily include testing of all parameters.

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Texas Instruments

Texas Instruments TMS320C6474 Bedienungsanleitung

Texas Instruments

Texas Instruments MSP50C614 Bedienungsanleitung

Texas Instruments

Texas Instruments TMS320C2x Bedienungsanleitung

Texas Instruments

Texas Instruments TMS320C6670 Installations- und Benutzerhandbuch

Texas Instruments

Texas Instruments TMS320VC5501 Bedienungsanleitung

Texas Instruments

Texas Instruments TMS320VC5501 Bedienungsanleitung

Texas Instruments

Texas Instruments TMS320 Series Bedienungsanleitung

Texas Instruments

Texas Instruments TMS320C44 DSP Bedienungsanleitung

Texas Instruments

Texas Instruments TMS320C6000 DSP Produkthandbuch

Texas Instruments

Texas Instruments TMS320C6000 DSP Bedienungsanleitung

Texas Instruments

Texas Instruments TMS320C642x DSP Bedienungsanleitung

Texas Instruments

Texas Instruments TMS320DM648 Bedienungsanleitung

Texas Instruments

Texas Instruments TMS320C6000 Series Bedienungsanleitung

Texas Instruments

Texas Instruments TMS320C64x DSP Bedienungsanleitung

Texas Instruments

Texas Instruments TMS320C6201 Bedienungsanleitung

Texas Instruments

Texas Instruments TMS320C6745 DSP Bedienungsanleitung

Texas Instruments

Texas Instruments TMS320VC5402 Bedienungsanleitung

Texas Instruments

Texas Instruments TMS320VC5509A Bedienungsanleitung

Texas Instruments

Texas Instruments PGA309 Bedienungsanleitung

Beliebte Signalprozessor Handbücher anderer Marken

2Y-LINK Technology

2Y-LINK Technology CI-12-ASP-DAASS Bedienungsanleitung

Crane Song

Crane Song Falcon Bedienungsanleitung

Steg

Steg DSP 6 Bedienungsanleitung

Rocktron

Rocktron INTELLIFEX LTD Bedienungsanleitung

RF-Lambda

RF-Lambda RF1457 Bedienungsanleitung

TC Electronic

TC Electronic DB8 MKII Handbuch

Acqiris

Acqiris U5309A Bedienungsanleitung

PCI

PCI MicroTrans EQ Handbuch

Crestron

Crestron Avia DSP-1282 Bedienungsanleitung

turck

turck MS96-11EX0-R/24VDC Bedienungsanleitung

Rolls

Rolls ROTORHORN RP147 Bedienungsanleitung

ESX

ESX QUANTUM QL810SP Bedienungsanleitung

Oberheim

Oberheim GM-1000 Bedienungsanleitung

AMC

AMC DSP8X8 Bedienungsanleitung

Planet Audio

Planet Audio PC3.5B Bedienungsanleitung

Behringer

Behringer Super-X Pro CX3400 Bedienungsanleitung

Euphonix

Euphonix DF64 Digital Frame Bedienungsanleitung

Lem Elettronica

Lem Elettronica DSP30-4G Bedienungsanleitung