Analog Devices DC2685A Kurzanleitung zur Einrichtung

UG-1339 Rev 0

DEMO MANUAL DC2685A

DESCRIPTION

DC2683A and DC2684A

LTC4292/LTC4291

4-Port IEEE 802.3bt PSE

Demonstration circuit DC2685A is a 4-port IEEE802.3bt

power sourcing equipment (PSE) composed of a

DC2684A (daughter card) and DC2683A (mother-

board). The DC2685A (kit) is used for evaluation of the

LTC4292/LTC4291 PSE chipset. Up to four IEEE802.3af,

IEEE802.3at, or IEEE802.3bt powered devices (PDs) can

be connected and powered from this system using a sin-

gle power supply. A DC590 is connected to the DC2685A

for I2C interfacing with QuikEval™.

All registered trademarks and trademarks are the property of their respective owners.

BOARD PHOTO

This demonstration manual provides a quick start pro-

cedure, a DC2684A daughter card overview, a DC2683A

mother board overview, schematics, and layout printouts.

Design files for this circuit board are available at

http://www.analog.com/DC2685A

UG-1339 Rev 0

DEMO MANUAL DC2685A

QUICK START PROCEDURE

Follow the quick start procedure below for basic operation

of the DC2685A kit. Refer to Figure 1 through Figure 3

and Table 1 through Table 4 for proper equipment setup.

1. On the DC2684A daughter card set 4PV# jumper JP2

(Figure 1) to a selected 4-Pair Valid setting as shown

in Table 1.

2. On the DC2684A daughter card set PM1 jumper JP4

and PM0 jumper JP3 (Figure 1) to the power mode

for evaluation specified in Table 2.

3. Align pin 1 of the 30-pin male connector on the

DC2684A daughter card with pin 1 of the 30-pin

female connector on the DC2683A motherboard

as shown in Figure 2. Pin 12 is polarized to assist

with the alignment. Carefully push the daughter card

straight down until the male and female 30-pin con-

nectors are flush with each other.

4. Connect a supply to the motherboard with the posi-

tive rail to AGND (+) and negative rail to VEE (–) as

shown in Figure 3. Use a power supply capable of

sourcing the maximum delivered power for all four

ports set by JP3 and JP4 on the daughter card (or

I2C configured power). Ramp the supply up to within

the recommended voltage range specified in Table 3.

5. Set the LTC4292/LTC4291 I2C address switch SW1

on the motherboard to the one of the four addresses

shown in Table 4.

6. On the DC590, set the VCCIO jumper JP6 to 3.3V.

(Refer to Table 5 and the DC590 demo manual for

further instructions for the DC590.)

7. Connect the DC590 to the DC2683A at connector

J6 with a 14-pin ribbon cable as shown in Figure 3

and open the QuikEval GUI. A GUI for the LTC4292/

LTC4291 is brought up by QuikEval. (Follow the

DC590 demo manual instructions if this has not been

previously setup.)

8. Follow the instructions in the LTC4291 PSE GUI

Users Manual for GUI operation. Firmware must be

downloaded before proceeding with evaluation of the

LTC4292/LTC4291.

9. Connect up to four PDs to the DC2685A RJ45 con-

nector J1, bottom row ports 1-4 as shown in Figure

10. Optionally a 1000BASE-T data source may be con-

nected to the DC2685A RJ45 connector J1, top row

ports 1-4 for data pass through testing.

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DEMO MANUAL DC2685A

QUICK START PROCEDURE

Figure 1. DC2684A Jumpers: 4PV#, PM0 and PM1

Figure 2. Inserting the DC268A Daughter Card Into J7 of the DC2683A Motherboard

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DEMO MANUAL DC2685A

QUICK START PROCEDURE

Table 1. DC2684A 4PV# Jumper Settings

JUMPER SETTING OPERATION

4PV# (JP2) LO Port powered only when both

pairsets present a valid signature

HI Any pairset presenting a valid

signature is powered

Table 3. DC2685A Power Supply Voltage Range per PSE Type

IEEE TYPE Supply Voltage Range

Type 3 51V to 57V

Type 4 53V to 57V

Table 4. DC2685A Address Settings

SW3 ADDRESS

AD3 AD2

LO LO 20h

LO HI 24h

HI LO 28h

HI HI 2Ch

Table 2. DC2684A Auto Mode Maximum Delivered Power Capabilities

Jumper Settings

PM1

(JP4)

PM0

(JP3)

Max Port Power

(Single-Signature)

Max Pairset Power

(Dual-Signature)

LO LO 40W 13W

LO HI 51W 25.5W

HI LO 62W 25.5W

HI HI 71.3W 35.6W

Figure 3. DC2685A Kit Connections

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DEMO MANUAL DC2685A

DEMONSTRATION CIRCUIT 2684A DAUGHTER CARD

Figure 4. DC2684A Digital and Analog Isolation

Demonstration circuit 2684A is an IEEE802.3bt 8-channel

PSE daughter card that features the LTC4292/LTC4291

chipset. This daughter card mates with a 4-Port, 4-Pair

PoE motherboard for use in IEEE 802.3bt Type 3 or 4

compliant Power over Ethernet PSE systems.

Board Layout

Parts placement, sense resistor block and Kelvin sens-

ing, copper fill, trace routing, and spacing are crucial

for LTC4292/LTC4291 chipset operation, robustness,

and measurement accuracy. It is imperative to fol-

low the layout requirements specified in the LTC4292/

LTC4291 data sheet. The DC2684A demonstrates proper

LTC4292/LTC4291 board layout on a compact daughter

card approximately the height and width of a 2 ×4 RJ45

connector.

Isolation and Power Supplies

The LTC4292/LTC4291 chipset provides communication

across an isolation barrier through a data transformer

(Figure 4). All digital pins reside on the digital ground

reference and are isolated from the analog PoE supply on

the daughter card layout. A VDD logic supply and VEE PoE

supply is brought in at the 30-pin connector J1.

VDD33

VDD

DND

CPD

CND

DPD

AGNDP

VEE

DNA

VEE

ISOLATION

WÜRTH 7490100143

CPA

30-PIN

CONNECTOR

DC2684 SIDE MOTHERBOARD SIDE

VDD SUPPLY

VEE SUPPLY

CNA

DPA

TX+

RX–

CT(4)

CT(2)

RX+

TX–

TD+

RD–

CT(3)

RD+

TD–

LTC4291

LTC4292

C23

1µF

C21

0.1µF

R13

100Ω

DC2685A F04

DGND

C19

1µF

100V

SMAJ58A

R14

100Ω

C22

1µF

R15

100Ω

R16

100Ω

R21

100Ω R35

10Ω

R22

100Ω

R23

100Ω

R24

100Ω

C24, 2.2nF

2kV

TVSBULK

CBULK

–

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DEMO MANUAL DC2685A

I/O LED Indicators

The DC2684A features two LEDs to indicate the states

of the LTC4292/LTC4291 general purpose input/output

pins GP0 and GP1. These pins are configured as inputs

or outputs via I2C. GP1 and GP0 are referenced to DGND

and driven by the LTC4291 when set as outputs (Figure

5). J2 provides test points for these pins.

DEMONSTRATION CIRCUIT 2684A DAUGHTER CARD

VDD

GP1

GP0

DGND

J2, PIN 5

J2, PIN 6

LTC4291

DC2685A F05

R28

560Ω R29

560Ω

GRN

GP0

GRN

GP1

Figure 5. DC2684A, LTC4291 General Purpose I/O LED Indicators

Figure 6. DC2684A, LTC4291 I2C and Address Connections

I2C Communication and Addressing

The LTC4292/LTC4291 internal registers are accessed via

I2C to read and/or write configuration, status, events and

interrupt registers. The I2C lines SDAOUT, SDAIN and SCL

connect to the 30-pin connector (Figure 6). Subsequently,

the I2C bus is accessed on the motherboard. SDAOUT and

SDAIN are tied together through shunt resistor R11 on

the DC2684A for a common SDA line.

The LTC4291 address pins AD0 and AD1 are tied to DGND

through shunt resistors R9 and R10 respectively. This

sets these two address bits low. Address pins AD2 and

AD3 are brought out to the 30-pin connector for configu-

ration on the motherboard. See Figure 6 and Table 4.

4PV# Jumpers

The 4PVALID pin of the LTC4291 is set by the 4PV# jumper

JP2 on the DC2684A. See Table 1 for jumper settings. This

jumper configuration along with Auto mode reset state is

used to automatically determine the number of powered

pairs. Refer to Table 1 for the configuration description.

DGND

SDAOUT

SDAIN

SCL

INT

SDAOUT

SDAIN

SCL

INT

AD3

AD2

AD1

AD0

AD3

AD2

TO 30-PIN

CONNECTOR

LTC4291

R11

0Ω

DC2685A F06

0Ω R10

0Ω

Power Mode and Power Path Components

The DC2684A power mode jumpers PM1 and PM0 either

tie the respective LTC4292/LTC4291 PWRMD1 and

PWRMD0 pins to VEE or CAP2 through a 100Ω resis-

tor. This configures the maximum port output power in

the Auto mode reset state (see Table 2). The power path

components (Hot Swap MOSFETs and resistors) for each

channel on the DC2684A have been selected to handle all

four power levels.

Surge Protection

The DC2684A has basic surge protection components

across the VEE supply, VEE and AGNDP supply pins, and

OUTnM pins. Refer to the LTC4292/LTC4291 hardware

data sheet for further details on surge protection. D5

and C27 on the DC2684A provide example bulk TVS and

capacitance components;these components must be

sized to the final system requirements.

UG-1339 Rev 0

DEMO MANUAL DC2685A

DEMONSTRATION CIRCUIT 2683A MOTHER BOARD

Demonstration circuit 2683A is a 4-Port, 2-channels per

port IEEE 802.3bt PoE PSE motherboard. This board

accepts an IEEE 802.3bt four port PSE daughter card

featuring the LTC4292/LTC4291 chipset.

Daughter Card Insertion Precautions

When inserting or removing the daughter card into the

DC2683A motherboard, verify all supplies and LEDs are

off. Push the card straight down for insertion or pull

straight up for removal to avoid bending the connector

pins. Follow the instructions in the Quick Start Procedure

for alignment.

Main VEE PoE Supply

The VEE supply is the main PoE supply and connects to

the DC2683A with the positive rail to AGND (+) and the

negative rail to VEE (–) as shown in Figure 3 of the Quick

Start Procedure. The voltage must be within the range

shown in Table 3 depending on the application PSE type.

For full load testing at each port, choose a power supply

that is set with a current limit higher than the maximum

allowed output power at each port.

Onboard 3.3V Supply

The DC2683A motherboard has an onboard (non-isolated)

3.3V LDO for the LTC4292/LTC4291 VDD supply which is

generated from the VEE supply. This onboard logic supply

is for demonstration purpose to allow for a single sup-

ply connection to the DC2685A kit. DGND is tied to VEE

through shunt resistor R42. To isolate the logic supply

from the PoE supply, remove R42 and R41 and apply an

external isolated 3.3V supply across V

and DGND. If

the DC2685A kit is connected in parallel for multi-quad

port evaluation, verify all ground connections are correct

before applying power.

LED Indicators

VEE LED (D5) and VDD LED (D7) indicate if a voltage is

present at these supplies. Verify these LEDs are off before

inserting or removing the daughter card.

Each pairset channel (2 per port) has a respective OUTnM

LED to indicate if the channel is powered on with PoE.

The INT LED (D6) indicates if the interrupt line is pulled

low by the daughter card. When the interrupt is cleared

(high) via I2C interrupt servicing, the LED is turned off.

Digital Connections

The DC590 (USB to I

C) controller board is connected

to the DC2683A at J6 through a 14-pin ribbon cable. The

QuikEval software must be previously installed. When

QuikEval is opened, the software will automatically detect

the DC2685A kit and open the LTC4291 GUI.

I2C address pins AD3 and AD2 are set with a 2-bit switch

SW3 on the DC2683A. Refer to Table 4 for setting the

individual I2C address for each DC2685A kit.

Turret digital test points for SCL, SDA, DGND, INT, MSD,

and RESET are provided on the DC2683A.

RJ45 Connections

PDs are connected using an Ethernet cable to any of the

bottom row ports at 2 ×4, RJ45 connector J1 on the

DC2683A. Test points for each channel output OUT1A

through OUT4B, are provided. Optionally, an Ethernet data

source may be connected with an Ethernet cable to any of

the top row ports at J1.

MSD and RESET Pushbuttons

Pushbutton switch SW1, when pressed, pulls the RESET

pin of the daughter card logic low. The PSE controller

is then held inactive with all ports off. When SW1 is

released, RESET is pulled high, and the PSE returns to

the AUTO pin reset state.

Pushbutton switch SW2, when pressed, pulls the mask-

able shutdown input (MSD) pin of the daughter card logic

low. When pressed, all ports that have their corresponding

mask bit set in the mconfig register of the PSE controller

will be shutdown. These ports must then be manually

re-enabled via I2C or by resetting the PSE.

UG-1339 Rev 0

DEMO MANUAL DC2685A

Table 5. DC590 Jumper Selection. Refer to the DC590 Demo Manual for Further Details.

JUMPER SETTING OPERATION

JP1 PROG Microcontroller in-circuit programming header. Do NOT install jumper; make no

connections.

JP2 MODE Do NOT install jumper; make no connections.

JP3 Watchdog Enables Do NOT install jumper; make no connections.

JP4 EE Jumper MUST be in the EN position.

JP5 SW

(Right Hand Side) MUST be in the ON position.

See Connections section.

ISO

(Left Hand Side) Controls the isolated supply.

See Connections section.

JP6 VCCA Control See Connections section.

SUPPLEMENTARY

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DEMO MANUAL DC2685A

DC2684A DAUGHTER CARD LAYOUT FILES

Figure 7. DC2684A Top Silkscreen

Figure 8. DC2684A Top Layer

UG-1339 Rev 0

DEMO MANUAL DC2685A

DC2684A DAUGHTER CARD LAYOUT FILES

Figure 9. DC2684A Inner Layer 2

Figure 10. DC2684A Inner Layer 3

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