Cypress CY62136VN Bedienungsanleitung

2-Mbit (128K x 16) Static RAM

CY62136VN MoBL®

Cypress Semiconductor Corporation • 198ChampionCourt • San Jose,CA 95134-1709 • 408-943-2600

Document #: 001-06510 Rev. *A Revised August 3, 2006

Features

• Temperature Ranges

— Industrial: –40°C to 85°C

— Automotive-A: –40°C to 85°C

— Automotive-E: –40°C to 125°C

• High speed: 55 ns

• Wide voltage range: 2.7V–3.6V

• Ultra-low active, standby power

• Easy memory expansion with CE and OE features

• TTL-compatible inputs and outputs

• Automatic power-down when deselected

• CMOS for optimum speed/power

• Available in standard Pb-free 44-pin TSOP Type II,

Pb-free and non Pb-free 48-ball FBGA packages

Functional Description[1]

The CY62136VN is a high-performance CMOS static RAM

organized as 128K words by 16 bits. This device features

advanced circuit design to provide ultra-low active current.

This is ideal for providing More Battery Life™(MoBL®) in

portable applications such as cellular telephones. The device

also has an automatic power-down feature that significantly

reduces power consumption by 99% when addresses are not

toggling. The device can also be put into standby mode when

deselected (CE HIGH). The input/output pins (I/O0through

I/O15) are placed in a high-impedance state when: deselected

(CE HIGH), outputs are disabled (OE HIGH), BHE and BLE

aredisabled(BHE,BLEHIGH), orduring awrite operation (CE

LOW, and WE LOW).

Writing to the device is accomplished by taking Chip Enable

(CE) and Write Enable (WE) inputs LOW. If Byte Low Enable

(BLE) is LOW, then data from I/O pins (I/O0through I/O7), is

written into the location specified on the address pins (A0

through A16). If Byte High Enable (BHE) is LOW, then data

from I/O pins (I/O8through I/O15) is written into the location

specified on the address pins (A0through A16).

Reading from the device is accomplished by taking Chip

Enable (CE) and Output Enable (OE) LOW while forcing the

Write Enable (WE) HIGH. If Byte Low Enable (BLE) is LOW,

then data from the memory location specified by the address

pins will appear on I/O0to I/O7. If Byte High Enable (BHE) is

LOW, then data from memorywill appear on I/O8to I/O15. See

the Truth Table at the back of this data sheet for a complete

description of read and write modes.

Note:

1. For best practice recommendations, please refer to the Cypress application note “System Design Guidelines” on http://www.cypress.com.

Logic Block Diagram

128K x 16

RAM Array I/O0– I/O7

ROW DECODER

COLUMN DECODER

A11

A12

A13

A14

A15

SENSE AMPS

DATA IN DRIVERS

A3I/O8– I/O15

BLE

BHE

A16

A10

14 31

Top View

TSOP II (Forward)

15 29

I/O

BHE

I/O

21 23

I/O

BLE

I/O

PinConfigurations[3]

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CY62136VN MoBL®

Document #: 001-06510 Rev. *A Page 2 of 12

Product Portfolio

Product VCC Range (V) Speed Ranges

Power Dissipation

Operating, ICC (mA) Standby, ISB2 (µA)

Min Typ.[2] Max Typ.[2] Maximum Typ.[2] Maximum

CY62136VNLL 2.7 3.0 3.6 55 Industrial 720 115

55 Automotive-A 720 115

70 Industrial 715 115

70 Automotive-A 715 115

70 Automotive-E 720 120

Pin Configurations[3]

Notes:

2. Typical values are included for reference only and are not guaranteed or tested. Typical values are measured at VCC = VCC Typ, TA= 25°C.

3. NC pins are not connected on the die.

VCC

A11

A10

A3CE

I/O10

I/O8

I/O9

I/O11

I/O13

I/O12

I/O14

I/O15

VSS

I/O0

BHE

BLE

VCC

I/O2

I/O1

I/O3

I/O4

I/O5I/O6

I/O7

A15

A14

A13

A12

NC NC

FBGA

A16

Top View

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CY62136VN MoBL®

Document #: 001-06510 Rev. *A Page 3 of 12

Maximum Ratings

(Above which the useful life may be impaired. For user guide-

lines, not tested.)

Storage Temperature ..................................–65°C to +150°C

Ambient Temperature with

Power Applied.............................................–55°C to +125°C

Supply Voltage to Ground Potential...............–0.5V to +4.6V

DC Voltage Applied to Outputs

in High-Z State[4]....................................–0.5V to VCC + 0.5V

DC Input Voltage[4].................................–0.5V to VCC + 0.5V

Output Current into Outputs (LOW)............................ 20 mA

Static Discharge Voltage...........................................> 2001V

(per MIL-STD-883, Method 3015)

Latch-up Current.....................................................> 200 mA

Operating Range

Range Ambient Temperature [TA][5] VCC

Industrial −40°C to +85°C 2.7V to

3.6V

Automotive-A –40°C to +85°C

Automotive-E –40°C to +125°C

Electrical Characteristics Over the Operating Range

Parameter Description Test Conditions

-55 -70

UnitMin. Typ.[2] Max. Min. Typ.[2] Max.

VOH Output HIGH Voltage VCC = 2.7V, IOH = −1.0 mA 2.4 2.4 V

VOL Output LOW Voltage VCC = 2.7V, IOL = 2.1 mA 0.4 0.4 V

VIH Input HIGH Voltage VCC = 3.6V 2.2 VCC +

0.5V 2.2 VCC +

0.5V V

VIL Input LOW Voltage VCC = 2.7V –0.5 0.8 –0.5 0.8 V

IIX Input Leakage

Current GND < VI< VCC Ind’l –1 +1 –1 +1 µA

Auto-A –1 +1 –1 +1 µA

Auto-E –10 +10 µA

IOZ Output Leakage

Current GND < VO <VCC,

Output Disabled Ind’l –1 +1 –1 +1 µA

Auto-A –1 +1 –1 +1 µA

Auto-E –10 +10 µA

ICC VCC Operating

Supply

Current

f = fMAX

= 1/tRC VCC = 3.6V,

IOUT = 0 mA,

CMOS

Levels

Ind’l 7 20 7 15 mA

Auto-A 7 20 7 15

Auto-E 7 20

f = 1 MHz Ind’l 1 2 1 2 mA

Auto-A 1 2 1 2

Auto-E 1 2

ISB1 Automatic CE

Power-down

Current—

CMOS Inputs

CE > VCC − 0.3V,

VIN > VCC − 0.3V or

VIN < 0.3V, f = fMAX

Ind’l 100 100 µA

Auto-A 100 100 µA

Auto-E 100 µA

ISB2 Automatic CE

Power-down

Current—

CMOS Inputs

CE > VCC − 0.3V

VIN > VCC − 0.3V or

VIN < 0.3V, f = 0

Ind’l 1 15 1 15 µA

Auto-A 1 15 1 15

Auto-E 1 20

Capacitance[6]

Parameter Description Test Conditions Max. Unit

CIN Input Capacitance TA= 25°C, f = 1 MHz,

VCC = VCC(typ) 6pF

COUT Output Capacitance 8 pF

Notes:

4. VIL(min) = –2.0V for pulse durations less than 20 ns.

5. TAis the “Instant-On” case temperature.

6. Tested initially and after any design or process changes that may affect these parameters.

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CY62136VN MoBL®

Document #: 001-06510 Rev. *A Page 4 of 12

Thermal Resistance[6]

Parameter Description Test Conditions TSOPII FBGA Unit

ΘJA Thermal Resistance

(Junction to Ambient) StillAir,solderedona4.25x1.125inch,

4-layer printed circuit board 60 55 °C/W

ΘJC Thermal Resistance

(Junction to Case) 22 16 °C/W

AC Test Loads and Waveforms

Parameters Value Unit

R1 1105 Ohms

R2 1550 Ohms

RTH 645 Ohms

VTH 1.75 Volts

Data Retention Characteristics (Over the Operating Range)

Parameter Description Conditions[9] Min. Typ.[2] Max. Unit

VDR VCC for Data Retention 1.0 V

ICCDR Data Retention Current VCC = 1.0V, CE > VCC −0.3V,

VIN > VCC − 0.3V or VIN < 0.3V, 0.5 7.5 µA

tCDR[6] Chip Deselect to Data

Retention Time 0ns

tR[7] Operation Recovery Time 70 ns

VCC Typ

VCC

OUTPUT

30 pF

INCLUDING

JIG AND

SCOPE

GND

90%

10% 90%

10%

OUTPUT V

Equivalent to: THÉVENIN EQUIVALENT

ALL INPUT PULSES

RTH

R1 VCC

OUTPUT

5 pF

INCLUDING

JIG AND

SCOPE

Rise Time:

1 V/ns Fall Time:

1 V/ns

(a) (b)

(c)

Data Retention Waveform

Note:

7. Full device operation requires linear VCC ramp from VDR to VCC(min) >100 ms or stable at VCC(min) >100 ms.

8. No input may exceed VCC + 0.3V

VCC(min.)

tCDR

VDR >1.0 V

DATA RETENTION MODE

VCC

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CY62136VN MoBL®

Document #: 001-06510 Rev. *A Page 5 of 12

Switching Characteristics Over the Operating Range [9]

Parameter Description

55 ns 70 ns

UnitMin. Max. Min. Max.

Read Cycle

tRC Read Cycle Time 55 70 ns

tAA Address to Data Valid 55 70 ns

tOHA Data Hold from Address Change 10 10 ns

tACE CE LOW to Data Valid 55 70 ns

tDOE OE LOW to Data Valid 25 35 ns

tLZOE OE LOW to Low-Z[10] 55ns

tHZOE OE HIGH to High-Z[10, 11] 25 25 ns

tLZCE CE LOW to Low-Z[10] 10 10 ns

tHZCE CE HIGH to High-Z[10, 11] 25 25 ns

tPU CE LOW to Power-up 0 0 ns

tPD CE HIGH to Power-down 55 70 ns

tDBE BLE / BHE LOW to Data Valid 25 35 ns

tLZBE BLE / BHE LOW to Low-Z[10, 11] 55ns

tHZBE BLE / BHE HIGH to High-Z[12] 25 25 ns

Write Cycle[12, 13]

tWC Write Cycle Time 55 70 ns

tSCE CE LOW to Write End 45 60 ns

tAW Address Set-up to Write End 45 60 ns

tHA Address Hold from Write End 0 0 ns

tSA Address Set-up to Write Start 0 0 ns

tPWE WE Pulse Width 40 50 ns

tBW BLE / BHE LOW to Write End 50 60 ns

tSD Data Set-up to Write End 25 30 ns

tHD Data Hold from Write End 0 0 ns

tHZWE WE LOW to High-Z[10, 11] 20 25 ns

tLZWE WE HIGH to Low-Z[10] 510ns

Notes:

9. Test conditions assume signal transition time of 5 ns or less,timing reference levels of 1.5V, input pulse levels of 0 to VCC typ., and output loading of the specified

IOL/IOH and 30-pF load capacitance.

10.At any given temperature and voltage condition, tHZCE is less than tLZCE, tHZOE is less than tLZOE, and tHZWE is less than tLZWE for any given device.

11. tHZOE, tHZCE, and tHZWE are specified with CL= 5 pF as in (b) of AC Test Loads. Transition is measured ±500 mV from steady-state voltage.

12.The internal write time of the memory is defined by the overlap of CE LOW and WE LOW. Both signals must be LOW to initiate a write and either signal can

terminate a write by going HIGH. The data input set-up and hold timing should be referenced to the rising edge of the signal that terminates the write.

13.The minimum write cycle time for write cycle 3 (WE controlled, OE LOW) is the sum of tHZWE and tSD.

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CY62136VN MoBL®

Document #: 001-06510 Rev. *A Page 6 of 12

Switching Waveforms

Read Cycle No. 1[14, 15]

Read Cycle No. 2[15, 16]

Notes:

14.Device is continuously selected. OE, CE = VIL.

15.WE is HIGH for read cycle.

16.Address valid prior to or coincident with CE transition LOW.

ADDRESS

DATA OUT PREVIOUS DATA VALID DATA VALID

tRC

tAA

tOHA

50%

DATA VALID

ACE

DBE

LZBE

LZCE

DATA OUT HIGH IMPEDANCE IMPEDANCE

HZOE

HZCE

HIGH

SUPPLY

CURRENT

HZBE

BHE/BLE

DOE

LZOE

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CY62136VN MoBL®

Document #: 001-06510 Rev. *A Page 7 of 12

Write Cycle No. 1 (WE Controlled)[12, 17, 18]

Write Cycle No. 2 (CE Controlled)[12, 17, 18]

Notes:

17.Data I/O is high impedance if OE = VIH.

18.If CE goes HIGH simultaneously with WE HIGH, the output remains in a high-impedance state.

19.During this period, the I/Os are in output state and input signals should not be applied.

Switching Waveforms (continued)

tHD

tSD

tPWE

tSA

tHA

tAW

tWC

DATA I/O

ADDRESS

tHZOE

DATAIN VALID

NOTE19

BHE/BLE tBW

tWC

tAW

tSA tHA

tHD

tSD

tSCE

DATA

IN VALID

tBW

tPWE

ADDRESS

BHE/BLE

DATA I/O

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CY62136VN MoBL®

Document #: 001-06510 Rev. *A Page 8 of 12

Write Cycle No. 3 (WE Controlled, OE LOW)[13, 18]

Write Cycle No. 4 (BHE/BLE Controlled, OE LOW)[19]

Switching Waveforms (continued)

DATA I/O

ADDRESS

tHD

tSD

tLZWE

tSA

tHA

tAW

tWC

tHZWE

DATAIN VALID

NOTE 19

BHE/BLE tBW

DATA I/O

ADDRESS

tHD

tSD

tLZWE

tSA

tHA

tAW

tWC

tHZWE

DATAIN VALID

tBW

BHE/BLE

NOTE 19

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CY62136VN MoBL®

Document #: 001-06510 Rev. *A Page 9 of 12

Typical DC and AC Characteristics

1.0 1.9 2.8 3.7

ISB (µA)

1.2

1.4

1.0

0.6

0.4

0.2

1.7 2.2 2.7 3.2 3.7

0.0

0.8

ICC

1.0 1.9 2.8 3.7

SUPPLY VOLTAGE (V)

Access Time vs. Supply Voltage

TAA (ns)

Normalized Operating Current

Standby Current vs. Supply Voltage

SUPPLY VOLTAGE (V)

MoBL

vs. Supply Voltage

2.7

Truth Table

CE WE OE BHE BLE Inputs/Outputs Mode Power

H X X X X High-Z Deselect/Power-down Standby (ISB)

L H L L L Data Out (I/O0–I/O15)Read Active (ICC)

L H L H L Data Out (I/O0–I/O7);

I/O8–I/O15 in High-Z Read Active (ICC)

L H L L H Data Out (I/O8–I/O15);

I/O0–I/O7 in High-Z Read Active (ICC)

L H L H H High-Z Deselect/Output Disabled Active (ICC)

L H H L L High-Z Deselect/Output Disabled Active (ICC)

L H H H L High-Z Deselect/Output Disabled Active (ICC)

L H H L H High-Z Deselect/Output Disabled Active (ICC)

L L X L L Data In (I/O0–I/O15)Write Active (ICC)

L L X H L Data In (I/O0–I/O7);

I/O8–I/O15 in High-Z Write Active (ICC)

L L X L H Data In (I/O8–I/O15);

I/O0 –I/O7 in High-Z Write Active (ICC)

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CY62136VN MoBL®

Document #: 001-06510 Rev. *A Page 10 of 12

Ordering Information

Speed

(ns) Ordering Code Package

Diagram Package Type Operating

Range

55 CY62136VNLL-55ZXI 51-85087 44-pin TSOP II (Pb-Free) Industrial

CY62136VNLL-55BAI 51-85096 48-Ball (7.00 mm x 7.00 mm) FBGA

CY62136VNLL-55ZSXA 51-85087 44-pin TSOP II (Pb-Free) Automotive-A

70 CY62136VNLL-70ZXI 51-85087 44-pin TSOP II (Pb-Free) Industrial

CY62136VNLL-70BAI 51-85096 48-Ball (7.00 mm x 7.00 mm) FBGA

CY62136VNLL-70BAXA 51-85096 48-Ball (7.00 mm x 7.00 mm) FBGA (Pb-Free) Automotive-A

CY62136VNLL-70ZSXA 51-85087 44-pin TSOP II (Pb-Free)

CY62136VNLL-70ZSXE 51-85087 44-pin TSOP II (Pb-Free) Automotive-E

Please contact your local Cypress sales representative for availability of these parts

Package Diagrams

44-pin TSOP II (51-85087)

51-85087-*A

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