DFI E586-ICP Bedienungsanleitung
E586-ICP
E586-IPE
System Board
User’s Manual
-D23540520-
vCopyright1994,byDFIInc.
All rights reserved.
No part of this document may be copied or reproduced
in any form or by any means without the prior written
consent of DFI, Inc.
DFI, Inc. makes no warranties with respect to this
documentation and disclaims any implied warranties of
merchantability, quality, or fitness for any particular
purpose. The information in this document is subject to
change without notice. DFI, Inc. reserves the right to
make revisions to this publication and to make changes
to any and/or all parts of its content, at any time,
without obligation to notify any person or entity of such
changes. Further, DFI, Inc. assumes no responsibility
for any errors that may appear in this document.
DFI is a registered trademark, and E586-ICP/E586-IPE
is a trademark of Diamond Flower, Inc. All other
product names mentioned are trademarks or registered
trademarks of their respective companies.
vFCC Statement on Class B
This equipment has been tested and found to comply
with the limits for a Class B digital device, pursuant to
Part 15 of the FCC rules. These limits are designed to
provide reasonable protection against harmful interfer-
ence when the equipment is operated in a residential
installation. This equipment generates, uses, and can
radiate radio frequency energy and if not installed and
used in accordance with the instruction manual may
cause harmful interference to radio communications.
However, there is no guarantee that interference will not
occur in a particular installation. If this equipment does
cause harmful interference to radio or television recep-
tion, which can be determined by turning the equipment
off and on, the user is encouraged to try to correct the
interference by one or more of the following measures:
•Reorient or relocate the receiving antenna.
•Increase the separation between the equipment and
the receiver.
•Connect the equipment into an outlet on a circuit
different from that to which the receiver is
connected.
•Consult the dealer or an experienced radio TV
technician for help.
Notice:
1. The changes or modification not expressly approved
by the party responsible for compliance could void
the user's authority to operate the equipment.
2. Shielded interface cables must be used in order to
comply with the emission limits.
v Table of Contentsv
Introduction .................................................................................
Features and Specifications .................................................
Package Checklist .................................................................
Installation Overview .................................................................
Preparing the Area ................................................................
Handling the System Board ..................................................
Tips in Handling the System Board ...............................
Hardware Installation.............................................................
Memory Installation .........................................................
Installing the Modules ..............................................
Board Configuration ........................................................
Jumper Settings .......................................................
Cache Configuration ................................................
Jumper Settings for Cache Memory .................
CPU Installation ..............................................................
Jumper Settings for CPU ........................................
Installing Upgrade CPUs ........................................
Installing the System Board ..................................................
Installing the PS/2 Mouse Port .............................................
Initial Setup Program .................................................................
Award BIOS CMOS Setup Utilities ......................................
Standard CMOS Setup ..................................................
BIOS Features Setup .....................................................
Chipset Features Setup .................................................
PCI Slot Configuration ...................................................
Load BIOS Defaults .......................................................
Load Setup Defaults ......................................................
Password Setting ...........................................................
IDE HDD Auto Detection ...............................................
Save & Exit Setup ..........................................................
Exit Without Saving ........................................................
1-1
1-2
1-2
2-1
2-1
2-2
2-2
2-2
2-2
2-6
2-7
2-9
2-13
2-15
2-16
2-17
2-18
2-22
2-24
3-1
3-2
3-2
3-5
3-7
3-8
3-9
3-9
3-10
3-11
3-11
3-12
EISA Configuration Utility .......................................................
Troubleshooting Checklist ......................................................
Appendix A:Types of Modules ..............................................
Appendix B:System Error Report .........................................
Appendix C:Memory & I/O Maps ...........................................
Appendix D:EISA I/O Pin Assignments ................................
Appendix E:PCI I/O Pin Assignments ..................................
Appendix F:Connector Pin Assignments ............................
Appendix G:Award BIOS Hard Disk Table ...........................
4-1
5-1
A-1
B-1
C-1
D-1
E-1
F-1
G-1
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Read Me First
The E586-ICP/E586-IPE system board requires the installation
of the ECU (EISA Configuration Utility), found on the
provided EISA Configuration Utility diskette, for proper
operation of this system board.
The ECU configures the EISA devices and maintains system
parameters by storing them in the Extended CMOS Memory, so
the BIOS can initialize the system and expansion boards
inserted in the EISA slots once you power up your system.
The Extended CMOS Memory is equipped with an internal
battery that needs to be constantly charged. In a small number
of cases, the internal battery may have drained and the
information stored in the Extended CMOS Memory lost during
shipment. If this happens, you will get the message "EISA
CMOS Inoperational" when you power up your system.
Simply run the ECU software, bundled with the system board,
to reconfigure the system. Save the configuration and reboot
your system. Refer to the EISA Configuration Utility section on
page 4-1 for more detailed information.
EISA/PCISystemBoard
vIntroduction
The E586-ICP/E586-IPE system board offers several
advanced features integrated into the system board. It is
designed based on the new PCI (Peripheral Component
Interconnect) local bus and EISA (Extended Industry
Standard Architecture) standards.
The E586-ICP/E586-IPE supports 273-pin Zero Inser-
tion Force socket for PentiumTM processors running at
60MHz or 66MHz bus speed. It also supports an op-
tional Flash EPROM. Flash EPROM is a memory chip
for the storage of BIOS which can be erased in bulk or
modified using a software utility.
The E586-ICP/E586-IPE comes with an EISA Configu-
ration Utility (ECU) that must be installed and run to
configure the board and the EISA expansion boards that
will be inserted in the EISA expansion slots.
The E586-ICP/E586-IPE system board is equipped with
four EISA and four PCI local bus slots. One EISA slot
and one PCI slot are shared, meaning you may use only
one or the other of these three slots. Therefore, in
accord with the PCI standard, seven slots are useable.
The E586-ICP/E586-IPE is also equipped with one
mini-DIN-6 connector for the PS/2 mouse and an op-
tional IDE disk interface, only if installed with the
Symphony SL82C101P chip.
The E586-ICP/E586-IPE can be configured to twenty-
two different sizes from 2MB to 128MB using 256Kx36,
512Kx36, 1Mx36, 2Mx36, 4Mx36 and 8Mx36 HSIM
modules.
1-1 uIntroduction
E586-ICP/E586-IPE
•Microprocessor
PentiumTM Processor
•Chipset
Intel 82430 PCI: system
Symphony SL82C101P: PCI IDE (optional)
•BIOS
Award system BIOS
•Cache Memory
256K or 512K Burst (sync) SRAM for 3-1-1-1
Level 2 cache access (E586-ICP)
256K or 512K Async SRAM for 3-2-2-2 Level 2
cache access (E586-IPE)
Supports direct map write-back or write-through
cache subsystem
Integrated cache tag RAM
•Memory Onboard
2MB to 128MB
•DRAM Type
256Kx36, 512Kx36, 1Mx36, 2Mx36, 4Mx36 and
8Mx36 SIMM
Supports single and/or double density SIMMs
Supports DRAM access time of 60ns or 70ns
Supports page mode
•ZIF Socket
273-pin ZIF socket (Intel Socket 4)
Features and Specifications
Introduction u1-2
EISA/PCISystemBoard
•Slots
Three 32-bit PCI slots
One shared - PCI/EISA slot
Three 32-bit EISA slots
•Connectors
A mini-DIN-6 connector for the PS/2 mouse
One IDE disk interface (optional; only if installed
with the Symphony SL82C101P chip)
•Tooling Holes
Baby AT form factor
•PCB
4 layers
Package Checklist
The E586-ICP/E586-IPE package contains the following
items:
•The E586-ICP/E586-IPE system board
•The E586-ICP/E586-IPE user’s manual
•One EISA Configuration Utility diskette
•One DB-25S hole cover holding the PS/2 mouse port
•One 40-pin IDE hard disk cable (optional)
If any of these items is missing or damaged, please
contact your dealer or sales representative for assistance.
1-3 uIntroduction
Dieses Handbuch passt für folgende Modelle
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