RF12 Program V1.1
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el:
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13．PLL Setting Command
bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 POR
1 1 0 0 1 1 0 0 0 ob1 ob0 1 ddy ddit 1 bw0 CC77h
ob1-ob0: Microcontroller output clock buffer rise and fall time control.
ob1 ob0 Selected uC CLK frequency
005 or 10 MHz (recommended)
013.3 MHz
1X2.5 MHz or less
ddy: phase detector delay enable.
ddi: disables the dithering in the PLL loop.
bw1-bw0: select PLL bandwidth
bw0 Max bit rate [kbps] Phase noise at 1MHz offset [dBc/Hz]
086.2 -107
1256 -102
14．Transmitter Register Write Command
bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 POR
1 0 1 1 1 0 0 0 t7 t6 t5 t4 t3 t2 t1 t0 B8AAh
This command is use to write a data byte to RF12 and then RF12 transmit it
15．Wake-Up Timer Command
bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 POR
1 1 1 r4 r3 r2 r1 r0 m7 m6 m5 m4 m3 m2 m1 m0 E196h
The wake-up period is determined by:
Twake-up = M * 2R [ms]
For continual operation, bit ‘et’ must be cleared and set
16．Low Duty-Cycle Command
bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 POR
1 1 0 0 1 0 0 0 d6 d5 d4 d3 d2 d1 d0 en C8OEh
d6..d0: Set duty cycle
D.C.= (D * 2 +1) / M *100%
