Lauterbach TRACE32 Bedienungsanleitung

MANUAL

Release 02.2022

Meta Debugger

Meta Debugger | 2

Meta Debugger

TRACE32 Online Help

TRACE32 Directory

TRACE32 Index

TRACE32 Documents ...................................................................................................................... 

ICD In-Circuit Debugger ................................................................................................................ 

Processor Architecture Manuals .............................................................................................. 

Meta .......................................................................................................................................... 

Meta Debugger ..................................................................................................................... 1

Introduction ....................................................................................................................... 5

Brief Overview of Documents for New Users 5

Demo and Start-up Scripts 6

Warning .............................................................................................................................. 7

Quick Start of the Debugger ............................................................................................. 8

Troubleshooting ................................................................................................................ 10

Communication between Debugger and Processor can not be established 10

FAQ ..................................................................................................................................... 10

Meta specific Implementations ........................................................................................ 11

Meta Configuration 11

Access Classes 12

Breakpoints 13

Software Breakpoints 13

On-chip Breakpoints 13

On-chip Watchpoints 13

SYStem.CONFIG Configure debugger according to target topology 15

<parameters> describing the “DebugPort” 16

<parameters> describing the “JTAG” scan chain and signal behavior 18

SYStem.CONFIG.state Display target configuration 21

SYStem.CPU Select the used CPU 21

SYStem.JtagClock Define JTAG frequency 21

SYStem.LOCK Lock and tristate the debug port 22

SYStem.MemAccess Run-time memory access (non-intrusive) 23

SYStem.Mode Establish communication with target 24

SYStem.Option.IMASKASM Disable interrupts while single stepping 24

SYStem.Option.IMASKHLL Disable interrupts while HLL single stepping 26

SYStem.Option.MINIM Map execution- to storage address range 26

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SYStem.state Display SYStem.state window 26

TrOnchip.RESet Set on-chip trigger to default state 27

TrOnchip.state Display on-chip trigger window 27

Target Adaption ................................................................................................................. 28

Interface Standards JTAG, Serial Wire Debug, cJTAG 28

Connector Type and Pinout 28

Debug Cable 28

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Meta Debugger

Version 09-Mar-2022

Meta Debugger | 5

Introduction

This manual serves as a guideline for debugging Meta cores and describes all processor-specific

TRACE32 settings and features.

Please keep in mind that only the Processor Architecture Manual (the document you are reading at the

moment) is CPU specific, while all other parts of the online help are generic for all CPUs supported by

Lauterbach. So if there are questions related to the CPU, the Processor Architecture Manual should be your

first choice.

Brief Overview of Documents for New Users

Architecture-independent information:

•“Training - Debugger Basics” (training_debugger.pdf): Get familiar with the basic features of a

TRACE32 debugger.

•“T32Start” (app_t32start.pdf): T32Start assists you in starting TRACE32 PowerView instances

for different configurations of the debugger. T32Start is only available for Windows.

•“General Commands” (general_ref_<x>.pdf): Alphabetic list of debug commands.

Architecture-specific information:

•“Processor Architecture Manuals”: These manuals describe commands that are specific for the

processor architecture supported by your Debug Cable. To access the manual for your processor

architecture, proceed as follows:

- Choose Help menu > Processor Architecture Manual.

•“OS Awareness Manuals” (rtos_<os>.pdf): TRACE32 PowerView can be extended for operating

system-aware debugging. The appropriate OS Awareness manual informs you how to enable the

OS-aware debugging.

To get started with the most important manuals, use the Welcome to TRACE32! dialog (WELCOME.view):

Meta Debugger | 6

Demo and Start-up Scripts

Lauterbach provides ready-to-run start-up scripts for known Meta-based hardware.

To search for PRACTICE scripts, do one of the following in TRACE32 PowerView:

• Type at the command line: WELCOME.SCRIPTS

• or choose File menu > Search for Script.

You can now search the demo folder and its subdirectories for PRACTICE start-up scripts

(*.cmm) and other demo software:

You can also inspect the demo folder manually in the system directory of TRACE32.

The ~~/demo/meta/ folders contain:

hardware/ Ready-to-run debugging and flash programming demos for

evaluation boards. Recommended for getting started!

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Warning

WARNING: To prevent debugger and target from damage it is recommended to connect or

disconnect the Debug Cable only while the target power is OFF.

Recommendation for the software start:

1. Disconnect the Debug Cable from the target while the target power is

off.

2. Connect the host system, the TRACE32 hardware and the Debug

Cable.

3. Power ON the TRACE32 hardware.

4. Start the TRACE32 software to load the debugger firmware.

5. Connect the Debug Cable to the target.

6. Switch the target power ON.

7. Configure your debugger e.g. via a start-up script.

Power down:

1. Switch off the target power.

2. Disconnect the Debug Cable from the target.

3. Close the TRACE32 software.

4. Power OFF the TRACE32 hardware.

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Quick Start of the Debugger

Starting up the debugger is done as follows:

1. Reset the debugger.

The RESet command is only necessary if you do not start directly after booting the TRACE32

development tool.

2. Set the target CPU to configure the debugger.

The default values of all other options are set in such a way that it should be possible to work without

modifications. Please consider that this may not be the best configuration for your target.

3. Establish the communication to the target.

This command resets the target and tries to stop it. After this command is executed, it is possible to

access memory and registers.

4. Load the program into the memory.

A typical start sequence is shown below. This sequence can be written to a PRACTICE script file (*.cmm,

ASCII format) and executed with the command DO <file>.

RESet

SYStem.CPU <cpu>

SYStem.Up

Data.LOAD.Elf sieve.elf ; .ELF specifies the file format

; sieve.elf is the file name

RESet ; Reset the debugger

System.CPU META-MTP ; Set target CPU, here the generic

; META-MTP to configure the debugger

SYStem.Up ; Establish communication to target

Data.LOAD.Elf sieve.elf ; Load the application program

WinCLEAR ; Remove all windows

List.Mix ; Open source window *)

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*) These commands open windows on the screen. The window position can be specified with the WinPOS

command.

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Troubleshooting

Communication between Debugger and Processor can not be established

Typically the SYStem.Up command is the first command of a debug session where communication with the

target is required. If you receive error messages like “debug port fail” or “debug port time out” while executing

this command, this may have the reasons described below. “target processor in reset” is just a follow-up

error message. Open the AREA.view window to view all error messages.

• The target has no power or the debug cable is not connected to the target or the target reference

voltage is not connected to the debug connector. This results in the error message “target power

fail”.

• The target is in reset.

• The target is in an unrecoverable state. Re-power your target and try again.

• You have selected the incorrect CPU with SYStem.CPU.

• There is an issue with the JTAG interface. See “ARM JTAG Interface Specifications”

(app_arm_jtag.pdf) and the manuals or schematic of your target to check the physical and

electrical interface. Maybe there is the need to set jumpers on the target to connect the correct

signals to the JTAG connector.

• The default JTAG clock speed is too fast, especially if you emulate your core or if you use an

FPGA-based target. In this case try SYStem.JtagClock 50kHz and optimize the speed when you

got it working.

• You might have several TAP controllers in a JTAG-chain. Example: You have a multicore system

with chained TAPs. In this case you have to check your pre- and post-bit configuration. See

SYStem.CONFIG IRPRE or SYStem.CONFIG DRPRE.

FAQ

Please refer to our Frequently Asked Questions page on the Lauterbach website.

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