LSI LSI53C1510 Bedienungsanleitung

S14024.B

LSI53C1510

I2O-Ready

PCI RAID Ultra2

SCSI Controller

TECHNICAL

MANUAL

April 2001

Version 2.2

This document contains proprietary information of LSI Logic Corporation. The

information contained herein is not to be used by or disclosed to third parties

without the express written permission of an ofﬁcer of LSI Logic Corporation.

LSI Logic products are not intended for use in life-support appliances, devices,

or systems. Use of any LSI Logic product in such applications without written

consent of the appropriate LSI Logic ofﬁcer is prohibited.

Document DB14-000101-02, Fourth Edition (April 2001)

This document describes the LSI Logic LSI53C1510 I2O-Ready PCI RAID Ultra2

SCSI Controller and will remain the ofﬁcial reference source for all

revisions/releases of this product until rescinded by an update.

To receive product literature, visit us at http://www.lsilogic.com.

LSI Logic Corporation reserves the right to make changes to any products herein

at any time without notice. LSI Logic does not assume any responsibility or

liability arising out of the application or use of any product described herein,

except as expressly agreed to in writing by LSI Logic; nor does the purchase or

use of a product from LSI Logic convey a license under any patent rights,

copyrights, trademark rights, or any other of the intellectual property rights of

LSI Logic or third parties.

Ultra SCSI is the term used by the SCSI Trade Association (STA) to describe

Fast-20 SCSI, as documented in the SCSI-3 Fast-20 Parallel Interface standard,

X3.277-199X.

Ultra2 SCSI is the term used by the SCSI Trade Association (STA) to describe

Fast-40 SCSI, as documented in the SCSI Parallel Interface–2 standard, (SPI–2)

X3T10/1142D.

TRADEMARK ACKNOWLEDGMENT

The LSI Logic logo design, TolerANT, SDMS, SCRIPTS, SYMplicity, and LVDlink

are registered trademarks or trademarks of LSI Logic Corporation. ARM is a

registered trademark of Advanced RISC Machines Limited, used under license.

All other brand and product names may be trademarks of their respective

companies.

Preface iii

Preface

This book is the primary reference and technical manual for the LSI Logic

Corporation LSI53C1510 I2O-Ready PCI RAID Ultra2 SCSI Controller. It

contains a complete functional description for the product and includes

complete physical and electrical speciﬁcations.

This technical manual assumes the user is familiar with the current and

proposed standards for SCSI and PCI. For additional background

information on these topics, please refer to the list of reference materials

provided in the Related Publications list.

Audience

This document was prepared for system designers and programmers

who are using this device to design an Ultra2 SCSI port for PCI-based

personal computers, workstations, servers or embedded applications.

Organization

This document has the following chapters and appendix:

•Chapter 1, Introduction, provides a general overview about the

LSI53C1510.

•Chapter 2, Functional Description, describes the main functional

areas of the chip in more detail, including the interfaces to the SCSI

bus and external memory.

•Chapter 3, Software Description, describes the software features,

ﬁrmware features, and hardware requirements.

•Chapter 4, Signal Descriptions, contains the pin conﬁguration

signal deﬁnitions.

iv Preface

•Chapter 5, Registers (Nonintelligent Mode), describes the PCI and

host interface registers that are visible to the host in nonintelligent

mode.

•Chapter 6, Registers (Intelligent Mode), describes the PCI and

host interface registers that are visible to the host in intelligent mode.

•Chapter 7, Speciﬁcations, contains the electrical characteristics and

AC timing diagrams.

•Appendix A, Register Summary, is a register summary.

Related Publications

For background please contact:

ANSI

11 West 42nd Street

New York, NY 10036

(212) 642-4900

Ask for document number X3.131-199X (SCSI-2)

Global Engineering Documents

15 Inverness Way East

Englewood, CO 80112

(800) 854-7179 or (303) 397-7956 (outside U.S.) FAX (303) 397-2740

Ask for document number X3.131-1994 (SCSI-2) or X3.253

(SCSI-3 Parallel Interface)

ENDL Publications

14426 Black Walnut Court

Saratoga, CA 95070

(408) 867-6642

Document names:

SCSI Bench Reference, SCSI Encyclopedia,

SCSI Tutor

Prentice Hall

113 Sylvan Avenue

Englewood Cliffs, NJ 07632

(800) 947-7700

Ask for document number ISBN 0-13-796855-8,

SCSI: Understanding

the Small Computer System Interface

Preface v

LSI Logic World Wide Web Home Page

www.lsil.com

PCI Special Interest Group

2575 N. E. Katherine

Hillsboro, OR 97214

(800) 433-5177; (503) 693-6232 (International); FAX (503) 693-8344

I2O (Intelligent Input/Output) SIG Web Site

http:\\www.i2osig.org

LSI53C1510 I

O-Ready PCI RAID Ultra2 SCSI Controller Programming

Guide

SCSI SCRIPTS Processors Programming Guide,

Order Number

S14044.A

LSI53C896 PCI to Dual Channel Ultra2 SCSI Multifunction Controller

Technical Manual

, Order Number S14015.B

Conventions Used in This Manual

The word

assert

means to drive a signal true or active. The word

deassert

means to drive a signal false or inactive.

Hexadecimal numbers are indicated by the preﬁx “0x” —for example,

0x32CF. Binary numbers are indicated by the preﬁx “0b” —for example,

0b0011.0010.1100.1111.

vi Preface

Revision Record

Revision Date Remarks

0.1 3/98 First Draft.

0.2 4/98 Second Draft.

1.0 5/98 Preliminary.

1.1 5/98 Preliminary. Change bars mark all changes. In Chapter 7, all

GPIO0_FETCH/ and GPIO1_MASTER/ items were deleted.

2.0 1/00 Final Version.

2.1 11/00 Updated Table 7.2 Operating Conditions. All product names changed from

SYM to LSI.

2.2 4/01 Updated DC electrical speciﬁcations and test conditions.

Contents vii

Contents

Chapter 1 Introduction

1.1 General Description 1-1

1.1.1 Block Diagram 1-2

1.2 Module Overviews 1-3

1.2.1 PCI Interface 1-3

1.2.2 Memory Controller 1-3

1.2.3 I2O Message Unit 1-3

1.2.4 ARM7TDMI RISC Processor 1-4

1.2.5 RAID Parity Assist Engine (PAE) 1-4

1.2.6 SCSI Cores 1-4

1.3 LSI53C1510 Features 1-4

1.3.1 Features List 1-5

1.4 LSI53C1510 Beneﬁts 1-5

1.4.1 Ultra2 SCSI Beneﬁts 1-5

1.4.2 LVDlink™ Beneﬁts 1-6

1.4.3 TolerANT®Technology Beneﬁts 1-6

1.4.4 I2O Beneﬁts 1-7

1.4.5 PAE Beneﬁts 1-7

1.4.6 ARM7TDMI RISC Processor Beneﬁts 1-8

1.5 LSI53C1510 Beneﬁts Summary 1-8

1.5.1 PCI Performance 1-8

1.5.2 SCSI Performance 1-8

1.5.3 RAID Performance 1-9

1.5.4 Testability 1-9

1.5.5 Integration 1-10

1.5.6 Reliability 1-10

1.6 Applications 1-11

1.6.1 Embedded Motherboard Application 1-11

1.6.2 Host Adapter Board Application 1-12

viii Contents

Chapter 2 Functional Description

2.1 Modes of Operation 2-2

2.1.1 LSI53C1510 Overview 2-3

2.1.2 Conﬁguration and Initialization 2-4

2.1.3 I2O Overview 2-6

2.1.4 I2O Conceptual Overview 2-6

2.1.5 I2O Beneﬁts 2-7

2.1.6 The I2O Communications Model 2-8

2.1.7 Operational Overview 2-8

2.1.8 System Interface 2-8

2.2 The Host Interface 2-11

2.2.1 Messages 2-11

2.2.2 Message Transport 2-11

2.2.3 Request Message 2-12

2.2.4 Reply Message 2-14

2.3 LSI53C1510 Protocol Engine 2-16

2.3.1 Random Block Storage Class 2-16

2.4 Support Components 2-18

2.4.1 DRAM Memory 2-19

2.4.2 Flash ROM 2-19

2.4.3 Serial EEPROM 2-19

Chapter 3 Software Description

3.1 PCI RAID Software Solutions 3-1

3.1.1 PCI RAID 3-1

3.1.2 SYMplicity Storage Manager 3-2

3.1.3 Wind River Systems’ IxWorks RTOS 3-3

3.2 Management Software Features 3-3

3.3 RAID Firmware Features 3-3

3.3.1 RAID Levels 0, 1, 3, 5, and 10 3-4

3.3.2 Caching 3-5

3.3.3 Runs in Optimal and Degraded Mode 3-5

3.3.4 Hardware Assisted Parity Calculation 3-6

3.3.5 Tagged Command Queuing 3-6

3.3.6 Global Hot Spare Drives 3-6

3.3.7 Hot Swap Drive with Automatic, Transparent

Reconstruction 3-7

Contents ix

3.3.8 Variable Stripe Size 3-7

3.3.9 Online Dynamic Capacity Expansion 3-7

3.3.10 Online RAID Level Migration/Reconﬁguration 3-7

3.3.11 Battery Backup Support and Cache Recovery 3-8

3.3.12 Supports SAF-TE 3-8

3.4 SDMS Software 3-8

3.5 Memory Requirements 3-8

Chapter 4 Signal Descriptions

4.1 Signal Groupings 4-2

4.2 PCI Interface Signals 4-4

4.2.1 System Signals 4-4

4.2.2 Address and Data Signals 4-5

4.2.3 Interface Control Signals 4-6

4.2.4 Arbitration Signals 4-7

4.2.5 Interrupt Signals 4-7

4.2.6 ARM Signal 4-8

4.2.7 Error Recording Signals 4-8

4.2.8 Power Management Signal 4-8

4.2.9 GPIO Interface Signals 4-9

4.3 SCSI Interface Signals 4-10

4.3.1 SCSI Clock Signal 4-10

4.3.2 SCSI A-Channel Interface Signals 4-10

4.3.3 SCSI B-Channel Interface Signals 4-13

4.4 Memory Interface Signals 4-15

4.4.1 ROM/SRAM Interface Signals 4-15

4.4.2 SCAN Signals 4-16

4.4.3 DRAM Interface Signals 4-17

4.5 Miscellaneous Interface Signals 4-18

4.5.1 UART Interface Signals 4-18

4.5.2 JTAG Interface Signals 4-18

4.5.3 ARM Debug Interface Signals 4-19

4.5.4 RAID Interface Signal 4-19

4.5.5 Power and Ground Signals 4-20

x Contents

Chapter 5 Registers (Nonintelligent Mode)

5.1 PCI Functional Description (Nonintelligent Mode) 5-3

5.1.1 PCI Addressing 5-3

5.1.2 PCI Bus Commands and Functions Supported 5-5

5.1.3 Internal Arbiter 5-9

5.1.4 PCI Cache Mode 5-9

5.2 PCI Conﬁguration Registers (Nonintelligent Mode) 5-10

5.3 Differences from the LSI53C895 and the LSI53C896 5-26

Chapter 6 Registers (Intelligent Mode)

6.1 Programming Models 6-3

6.1.1 System Programming Model 6-3

6.1.2 Local Programming Model 6-3

6.2 PCI Conﬁguration Registers (Intelligent Mode) 6-4

6.3 Host Interface Registers (Intelligent Mode) 6-19

6.4 Shared Memory 6-27

Chapter 7 Speciﬁcations

7.1 DC Characteristics 7-1

7.2 TolerANT Technology Electrical Characteristics 7-7

7.3 AC Characteristics 7-11

7.4 PCI and External Memory Interface Timing Diagrams 7-14

7.4.1 Target Timing 7-14

7.4.2 Initiator Timing 7-20

7.4.3 External Memory Timing 7-31

7.5 SCSI Timing Diagrams 7-36

7.6 Pinouts and Packaging 7-43

Appendix A Register Summary

Index

Customer Feedback

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