The following annotated parts list describes circuit operation by part
number (integrated circuits first). Refer to the schematic diagram,
SD242-1, on page 9.
DESIG.
U101
U102
U103-9
FUN TION S I PART // DES RIPTION
INTEGRATED CIRCUITS
Optoisolator 1-330 Sharp P -900
The optoisolator electrically isolates the external MIDI
device and the 64/242 system. This is useful for
preventing ground loops, which might cause audio hum and
noise.
When data at pin 5 of MIDI IN is low (0), current flows
over pin 4 and through limiter R101 and UlOl's internal
LED. The LED lights, turning on the phototransistor
between pins 4 and 5, enabling current flow, which pulls
receiver input U105-2 low. When MIDI IN is high (1), no
current flows through R101 and the LED. Thus the
phototransistor turns off, and R114 pulls U105-2 high.
D101 protects the circuit from non-standard or faulty
MIDI drivers.
omparator 1-301 LM311
The comparator squares-up the drum clock input signal to
provide a logic signal for the PIA. Since the LM311 must
operate on supplies of 0 and +5V, a bias network shifts the
input signal so that it is centered between the supplies,
and a comparator reference voltage is provided of the
same value. The 2.5-V bias is generated by voltage divider
R112/R105, filtered by 101, and added to both the signal
path through R106 and to the comparator reference (pin
2) through R107. The incoming signal, meanwhile,
encounters load resistor R109, passes through dc-blocking
capacitor l03, and is offset by the 2.5 Vdc bias, before
going through R108 to the high-impedance inverting input
of the comparator (U102-3).
When the input is positive, output U102-7 is 0V, and when
the input is negative, the output is +5V. R113 is a pull-up
for the open collector output of the LM311. R110 provides
positive feedback for hysteresis to prevent oscillations on
slow input edges. 104 is for comparator stability.
"T" Flip Flop 1-109 74LS74
Divides the approximately 1 MHz 64 clock by two,
supplying U105-3 and U105-4 with the 500 KHz fron
which the 31.25 kBaud data rate is derived (internally).
M 242 A 8
