Sony SPP-A941 - Cordless Telephone With Answering... Kurzanleitung

MICROFILM

SERVICE MANUAL

CORDLESS TELEPHONE

WITH ANSWERING SYSTEM

US Model

Canadian Model

SPECIFICATIONS

SPP-A941

Ver 1.1 1999. 11

SPP-A941

– 25 – – 26 –

5-6. SCHEMATIC DIAGRAM – BASE RF Board – • See page 43 for IC Block Diagrams.

(Page 30)

SPP-A941

– 29 – – 30 –

5-8. SCHEMATIC DIAGRAM – BASE MAIN Board – • See page 31 for Waveform. •See page 43 for IC Block Diagrams.

(Page 26)

(Page 33)

(Page 36)

SPP-A941

– 33 – – 34 –

5-10. SCHEMATIC DIAGRAM – BASE I-TAD Board – • See page 31 forWaveform.

(Page 30)

SPP-A941

– 35 – – 36 –

5-12. SCHEMATIC DIAGRAM – BASE KEY Board –

5-11. PRINTED WIRING BOARD – BASE KEY Board –

• Semiconductor

Location

Ref. No. Location

LD1 C-6

LD2 H-5

LD3 G-5

LD4 F-5

LED1 I-2

LED2 H-2

U1 C-4

(Page 28)

(Page 30)

BLK

RED SP1

LD2

KP10

LED2

LED1

KP20

KP11

LD3

LD4

KP12

KP42 KP41

KP30 KP31

LD1

KP2

KP1

(MESSAGE COUNTER)

BASE KEY BOARD

KP0

REC/MEMO

ERASE

TIME/SET

SLOW

REPEAT

CHARGE

IN USE

KP10, LD2

MAIL BOX

KP11, LD3

KP12, LD4

SELECT

KP40

– +

VOLUME

KP2, LD1

ANSWER

ON/OFF

16 9

1-676-810-

KP22

QUICK

SKIP

KP16

HANDSET

LOCATOR

BASE MAIN

BOARD

1 2 3 4 5 6

SPP-A941

– 39 – – 40 –

5-14. SCHEMATIC DIAGRAM – HAND RF Board – • See page 43 for IC Block Diagrams.

(Page 42)

SPP-A941

– 41 – – 42 –

5-15. SCHEMATIC DIAGRAM – HAND MAIN Board – • See page 31 forWaveform. •See page 44 for IC Block Diagrams.

(Page 40)

– 43 – – 44 –

• IC Block Diagrams

U1 U2765B-AFSG3 (BASE RF Board)

U1 U2765B-AFSG3 (HAND RF Board)

U3 TB31202BFN-EL (HAND RF Board)

U10 TB31202BFN-EL (BASE RF Board)

U3 CAT93C46KI (BASE MAIN Board)

VCC/2

COMPARATOR SLICER

LOCAL OSC

BUFFER

VCC2

LO REF

LO IN

GND2

VCC3

LIM1 OUT

GND3

LIM2 IN

LIM2 REF

GND4

DEM NTANK

DEM TANK

DEM OUT

A1 REF

A1 IN

GND1

MIX OUT

VCC1

MIX NOUT

LIM1 REF

LIM1 IN

RSSI

DATA OUT

COM NIN

COM IN

SL IN

1 2 3 4 5 6 7 8 910 11 12 13 14

28 27 26 25 24 23 22 21 20 19 18 17 16 15

MIX

LIMITER

AMP

LIMITER

AMP

DE-

MODULATOR

RSSI

–

235

4 6 78

BUF

BUF PROGRAMABLE

DIVIDER

PHASE

COMPARATOR

OUTPUT

SWITCH

L. OSC

REFERENCE

DIVIDER

LOCK

DET

CONTROL

CIRCUIT

1/2

BUF

––––––––

32, 33

––––––––

32, 33

PHASE

COMPARATOR

OUTPUT

PROGRAMABLE

DIVIDER

FIN1

VCC

CP1

GND

DATA

STB

FIN2

VCC

CP2

GND

XIN

XOUT

U4 TA31103F (BASE MAIN Board)

U7 TA31103F (HAND MAIN Board)

U10 MC74HC595AF (BASE MAIN Board) U11 LP2953IM (HAND MAIN Board)

E-RECT

PRE OUT

PRE NF

VCC

VREF

THROUG

RO2

RIN

EXP OUT

RO1

COMP MUTE

EXP MUTE

FIL1 OUT

FIL2 IN

FIL2 OUT

–

IN2

C-RECT

C-NF

FIL1 IN

COMP OUT

10 11 12

24 20

23 19 17

18 15 14 13

GND

MIC IN

MIC OUT

MIC NF

∆G

VREF

–

VREF

SWITCH

CONTROL

–

MIC AMP

SUM

AMP

–

∆G

VREF

PRE AMP

SUM

AMP

RO1

AMP

COMP

MUTE

EXP

MUTE

THROUG

THROUGH

IN 2

AMP

FILTER

AMP 1

FILTER

AMP 2

–

VREF

RO2

AMP

–

12 3 45 6 7 8

91016 15 14 13 12 11

SHIFT REGISTER

LATCH

PARALLEL DATA

OUTPUT

GND

VCC

LATCH

CLOCK

PARALLEL DATA

OUTPUT

SERIAL DATA

INPUT

OUTPUT

ENABLE

SHIFT

CLOCK

SERIAL DATA

OUTPUT

RESET

SQH

SHUT DOWN

ERROR

GND

OUTPUT

SENSE

GND

VREF

COMP IN

COMP OUT

GND

INPUT

FEEDBACK

5V TAP

–

ERROR

AMP

SHUT DOWN

COMPARATOR

DROP OUT

DETECTION AMP

AUXILLARY

COMPARATOR

1.23V

16 GND

8 7 6 5

MEMORY ARRAY

128X8 bit/

64X16 bit

HIGH VOLTAGE

GENERATOR

ADDRESS

DECODER

DATA REGISTER

DECODE & CONTROL

LOGIC

CLOCK GENERATOR

21 3 4

BUFFER

VCC

ORG

GND

U6 KA8602D (BASE MAIN Board)

+–

BIAS

CIRCUIT

+–

AMP1 AMP2

IN+

IN–

OUT1

VCC GND

OUT2

MUTE

RIPPLE

REJECTION

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