TDA7296
8/15
5 INTRODUCTION
In consumer electronics, an increasing demand has arisen for very high power monolithic audio amplifiers
able to match, with a low cost the performance obtained from the best discrete designs.
The task of realizing this linear integrated circuit in conventional bipolar technology is made extremely dif-
ficult by the occurence of 2nd breakdown phenomenon. It limits the safe operating area (SOA) of the pow-
er devices, and as a consequence, the maximum attainable output power, especially in presence of highly
reactive loads. Moreover, full exploitation of the SOA translates into a substantial increase in circuit and
layout complexity due to the need for sophisticated protection circuits.
To overcome these substantial drawbacks, the use of power MOS devices, which are immune from sec-
ondary breakdown is highly desirable. The device described has therefore been developed in a mixed bi-
polar-MOS high voltage technology called BCD 80.
5.1 Output Stage
The main design task one is confronted with while developing an integrated circuit as a power operational
amplifier, independently of the technology used, is that of realising the output stage. The solution shown
as a principle schematic by Fig 18 represents the DMOS unity-gain output buffer of the TDA7296.
This large-signal, high-power buffer must be capable of handling extremely high current and voltage levels
while maintaining acceptably low harmonic distortion and good behaviour over frequency response; more-
over, an accurate control of quiescent current is required.
A local linearizing feedback, provided by differential amplifier A, is used to fullfil the above requirements,
allowing a simple and effective quiescent current setting. Proper biasing of the power output transistors
alone is however not enough to guarantee the absence of crossover distortion. While a linearization of the
DC transfer characteristic of the stage is obtained, the dynamic behaviour of the system must be taken
into account.
A significant aid in keeping the distortion contributed by the final stage as low as possible is provided by
the compensation scheme, which exploits the direct connection of the Miller capacitor at the amplifier’s
output to introduce a local AC feedback path enclosing the output stage itself.
5.2 Protections
In designing a power IC, particular attention must be reserved to the circuits devoted to protection of the
device from short circuit or overload conditions.
Due to the absence of the 2nd breakdown phenomenon, the SOA of the power DMOS transistors is de-
limited only by a maximum dissipation curve dependent on the duration of the applied stimulus.
In order to fully exploit the capabilities of the power transistors, the protection scheme implemented in this
device combines a conventional SOA protection circuit with a novel local temperature sensing technique
which " dynamically" controls the maximum dissipation.
Figure 18. Principle Schematic of a DMOS Unity-gain Buffer.
