ST SPC572LADPT100S Bedienungsanleitung

Introduction

The SPC572LADPT100S mini module is an evaluation board supporting STMicroelectronics SPC572L64E3 device in

LQFP100-EP package.

Figure 1. SPC572LADPT100S

Note: picture not contractual.

SPC572LADPT100S evaluation board

UM3063

User manual

UM3063 - Rev 1 - August 2022

For further information contact your local STMicroelectronics sales office.

www.st.com

1Overview

The SPC572LADPT100S mini module is an evaluation board supporting the STMicroelectronics SPC572L64E3

device in LQFP100-EP package.

The SPC572LADPT100S mini module can be connected onto the SPC58XXMB motherboard. It offers a

mechanism for easy customer evaluation of the SPC572Lxx family of device and to facilitate hardware and

software development. High density connectors provide the interface between the EVB and MCU daughter cards

and help the developers evaluate all device peripherals.

This user manual provides information on using the SPC572LADPT100S mini module board and its hardware

features.

The mini module may be used as a standalone unit allows access to the CPU, but no access to the I/O pins as

any motherboard peripherals.

Figure 2. Overview of SPC572LADPT100S mini module - top

UM3063

Overview

UM3063 - Rev 1 page 2/29

Figure 3. Overview of SPC572LADPT100S mini module - bottom

1.1 Supported devices

The SPC572LADPT100S evaluation board supports the following STMicroelectronics family of microcontrollers in

LQFP100-EP:

• SPC572L64E3

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Supported devices

UM3063 - Rev 1 page 3/29

2License agreement

The packaging of this evaluation board was sealed with a seal stating, by breaking this seal, you agree to the

terms and conditions of the evaluation board license agreement, the terms and conditions of which are available

at https://www.st.com/resource/en/evaluation_board_terms_of_use/evaluationproductlicenseagreement.pdf.

Upon breaking the seal, you and STMicroelectronics entered into the evaluation board license agreement, a copy

of which is also enclosed with the evaluation board for convenience.

Attention: This evaluation board only offers limited features for evaluating ST products. It has not been tested for use

with other products and is not suitable for any safety or other commercial or consumer application. This

evaluation board is otherwise provided “AS IS” and STMicroelectronics disclaims all warranties, express or

implied, including the implied warranties of merchantability and fitness for a particular purpose.

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License agreement

UM3063 - Rev 1 page 4/29

3Handling precautions

Please take care to handle the package content in order to prevent electrostatic discharge.

Before the EVB is used or the power is applied, please fully read the following sections on how to correctly

configure the board. Failure to correctly configure the board may cause irreparable component, MCU or EVB

damage.

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Handling precautions

UM3063 - Rev 1 page 5/29

4Hardware description

4.1 Hardware features

The SPC572LADPT100S mini module board has the following features:

• Can be used as a stand-alone board by providing external power supplies input (5 V, 3.3 V, 1.25 V)

• Reset button with driver and led indicator

• SPC572LADPT100S has socket for device in LQFP100-EP package

• Debug ports:

– 34-pin SAMTEC connector for Nexus 2

– 14-pin header connector for JTAG port

– 12-pin header connector for SIPI interface

• 40 MHz crystal main oscillator with jumpers to optionally disconnect it

• 8 MHz oscillator with jumpers to optionally disconnect it

• Clock input through SMA connector to optionally disconnection

• 2 X SAMTEC QSH series, 240 way connector to connect mini module to motherboard

4.2 Hardware dimensions

The evaluation board has the following dimensions:

• PCB area: 127 mm x 114.3 mm

• Top components height: 18.8 mm

• Bottom components height: 3.5 mm

• PCB thickness 1.6 mm

4.3 Pin numbering for jumpers

3-pin jumpers for the mini module have rectangular pad to indicate the position of pin 1 and there is the PCB

silk-screen with the numbers of all the pins. See the example below for the numbering convention used in this

manual for jumpers settings:

Figure 4. Overview of 3-pin jumpers numbering convention

6-pin jumpers for the mini module have the PCB serigraphy with the numbers of all pins. See the example below

for the numbering convention used in this manual for jumpers settings:

Figure 5. Overview of 6-pin jumpers numbering convention

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Hardware description

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5Power and system configuration

5.1 Power supplies

When the mini module is plugged onto the motherboard, power is supplied directly by the motherboard. In this

setup, the external power supply input available on the mini module should NOT be used.

When the SPC572LADPT100S mini module is used as a stand-alone board external power supplies must be

used (5 V, 3.3 V, 1.25 V).

The following jumpers are used to configure the power supply:

Table 1. Power supplies configuration jumpers

Jumper Description Default Position

VDD_HV_ADV voltage configuration:

• 1-2: 5V_LR (linear)

• 2-3: 5V_SW (switching)

1-2 (5V_LR) B2(1)

VDD_HV_ADR voltage configuration:

• 1-2: 5V_LR (linear)

• 2-3: 5V_SW (switching)

1-2 (5V_LR) B2(1)

VDD_HV_IO_JTAG/VDD_HV_OSC0 voltage configuration:

• 1-2: 5V_SR

• 2-3: 3.3V_SR

1-2 (5V_SR) B2(1)

VDD_HV_IO_MAIN voltage configuration:

• 1-2: 5V_SR

• 2-3: 3.3V_SR

1-2 (5V_SR) B2(1)

VDD_HV_IO_ETH voltage configuration:

• 1-2: 5V_SR

• 2-3: 3.3V_SR

1-2 (5V_SR) B2(1)

VDD_LV1 configuration for external 1.25 V use:

• Open: VDD_LV1 not connected to 1.25 V

• Closed: VDD_LV1 connected to 1.25 V

Open C2(1)

J25

VDD_LV2 configuration for external 1.25V use:

• Open: VDD_LV2 not connected to 1.25 V

• Closed: VDD_LV2 connected to 1.25 V

Open B2(1)

J26

VDD_LV3 configuration for external 1.25 V use:

• Open: VDD_LV3 not connected to 1.25 V

• Closed: VDD_LV3 connected to 1.25 V

Open B2(1)

1. Refer to the Figure 10. SPC572LADPT100S mini module - top.

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Power and system configuration

UM3063 - Rev 1 page 7/29

5.2 Port configuration

The following jumpers need to configure the ports:

Table 2. Ports related jumpers

Jumper Description Default Position

PD[6] connection to QSH connectors configuration:

• Open: PD[6] not connected to QSH connectors (motherboard)

• Closed: PD[6] connected to QSH connectors (motherboard)

Closed C2(1)

J10

PD[6] c connection to EVTI configuration:

• Open: PD[6] not connected to EVTI

• Closed: PD[6] connected to EVTI

Open C2(1)

J11

TESTMODE connection configuration:

• Open: TESTMODE not connected

• Closed: TESTMODE connected to:

– R6 mounted: pulldown (default)

– R3 mounted: pullup

Closed (default pull-down) A2(1)

J27

PD[6] connection to EVTO configuration:

• Open: PD[6] not connected to EVTO

• Closed: PD[6] connected to EVTO

Open C2(1)

JP1

PD[6] connection to VDD_LV3

• Open: PD[6] not connected to VDD_LV3

• Closed: PD[6] connected to VDD_LV3

Open C2(2)

JP2

PA[6] connection configuration:

• 1-2: PA[6] connected to TCK

• 2-3: PA[6] connected to DRCLK

1-2 (TCK) B2(1)

JP3

PA[9] connection to QSH connectors configuration:

• Open: PA[9] not connected to QSH connectors (motherboard)

• Closed: PA[9] connected to QSH

Open A3(1)

JP4

PA[2] connection configuration

• 1-2: PA[2] connected to QSH

• 2-3: PA[2] connected to VDD_HV_IO_MAIN

1-2 A2(1)

JP5

PA[8] connection configuration:

• 1-2: PA[8] connected to TDI

• 2-3: PA[8] connected to SIPI_TXP

1-2 (TDI) B2(1)

JP7

PF[13] connection to QSH connectors configuration:

• Open: PF[13] not connected to QSH connectors (motherboard)

• Closed: PF[13] connected to QSH

Closed B2(1)

JP8

PD[6] c connection to SIPI_TXN configuration:

• Open: PD[6] not connected to SIPI_TXN

• Closed: PD[6] connected to SIPI_TXN

Open B2(1)

JP9

PD[7] connection to QSH connectors configuration:

• Open: PD[7] not connected to QSH connectors (motherboard)

• Closed: PD[7] connected to QSH

Closed B2(1)

JP10

PA[6] connection to QSH connectors configuration:

• Open: PA[6] not connected to QSH connectors (motherboard)

• Closed: PA[6] connected to QSH

Open B2(1)

JP11 PA[7] connection to QSH connectors configuration:

• Open: PA[7] not connected to QSH connectors (motherboard) Open B2(1)

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Port configuration

UM3063 - Rev 1 page 8/29

Jumper Description Default Position

• Closed: PA[7] connected to QSH

JP12

PA[8] connection to QSH connectors configuration:

• Open: PA[8] not connected to QSH connectors (motherboard)

• Closed: PA[8] connected to QSH

Open B2(1)

1. Refer to the Figure 10. SPC572LADPT100S mini module - top

2. Refer to the Figure 11. SPC572LADPT100S mini module - bottom

5.3 System clock configuration

The mini module supports the usage of crystal clock sources as well as external clock source:

Table 3. System clock related jumpers

Jumper Description Default Position

J13

EXTAL connection configuration:

• 1-2: EXTAL connected to 40 MHz crystal clock source

• 2-3: EXTAL connected to EXTAL EVB clock source

1-2 (XT1 pin2) C3(1)

J15

XTAL connection configuration:

• 1-2: XTAL connected to 40 MHz crystal clock source

• 2-3: XTAL connected to XTAL EVB clock source

1-2 (XT1 pin1) C3(1)

J17

8 MHz oscillator enable jumper:

• Open: 8 MHz oscillator not enabled

• Closed: 8 MHz oscillator enabled

Open D3(1)

J19

Jumper selector of external clock source:

• 1-2: from 8 MHz oscillator

• 2-3: from SMA connector

1-2 C3(1)

1. Refer to the Figure 10. SPC572LADPT100S mini module - top

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System clock configuration

UM3063 - Rev 1 page 9/29

5.4 Reset circuit configuration

The mini module supports different ways to reset the devices. To use and perform the reset driving there are

different jumpers and switches:

Table 4. Reset configuration jumpers

Jumper Description Default Position

SW1 Reset push button Open D1(1)

J18

External reset connection to the ESR0 pin configuration:

• Open: the external reset is not connected to the ESRO pin

• Closed: the external reset is connected to the ESRO pin

Closed D1(1)

J20

External reset connection used to reset driver configuration:

• Open: the external reset is not connected to the reset driver for ESRO and PORST pins

• Closed: the external reset is connected to the reset driver for ESRO and PORST pins

Closed D1(1)

J21

External reset connection to PORST pin configuration:

• Open: the external reset is not connected to the PORST pin

• Closed: the external reset is connected to the PORST pin

Closed D2(1)

1. Refer to the Figure 10. SPC572LADPT100S mini module - top

5.5 Connectors

The mini module has other connectors described in the table below:

Table 5. Connectors

Connectors Description Position

J12 14-pin header connector for JTAG port A1(1)

J14 34-pin SAMTEC connector for nexus 2 A2(1)

J16 10-pin SIPI interface connector C2(1)

J2 External power supplies input D4(1)

J23 2 X SAMTEC QSH series, 240 way connector to

connect minimodule to motherboard

A4 ... D4(2)

J24 A1 ... D1(2)

1. Refer to the Figure 10. SPC572LADPT100S mini module - top

2. Refer to the Figure 11. SPC572LADPT100S mini module - bottom

UM3063

Reset circuit configuration

UM3063 - Rev 1 page 10/29

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