Sunrise telecom SunSet DSL Series Bedienungsanleitung
22 Great Oaks Blvd,
San Jose CA 95119 USA
ph 1 408 3 3 8000
fax 1 408 3 3 8313
www.sunrisetelecom.com
… a step ahead
Application Series
SunSet xDSL IDSL Module:
IDSL Circuit Testing
Publication Number APP-xDSL-011 Rev. A
2
© 2001 Sunrise Telecom Incor orated SunSet xDSL: IDSL Circuit Testing
TRANSPORT FOR IDSL CIRCUITS
IDSL Circuits can be rovisioned
from the DSLAM at the Central
Office (CO) location to the
Customer Premises Equi ment
(CPE) over a co er air directly
(as shown in Figure 1), if the
customer is located within the
reach range (about 18,000 feet
without re eaters). A number of
IDSL circuits can also be multi-
lexed and trans orted over a
Digital Loo Carrier (DLC) system,
which meets the Telcordia TR-
TSY-000397 requirement to bring
IDSL service to a cluster of
customers in the same area (refer
to Figure 2).
TESTING IDSL CIRCUITS
The turn-u of an IDSL circuit
requires verifying end-to-end
continuity and bit error erfor-
mance of the circuit between the
CO and the CP. There are two
ossible ways to achieve the
verification test for the circuit:
• Single-ended test: Only one test set is required and
the circuit can be tested from either:
– The central office where the test set emulates the
Line Termination (LT) device, i.e. the DSLAM or,
– From the field where the test set emulates the
customer remises equi ment (NT).
• Two-ended test: Two test sets are required, one
emulates the LT at the CO location and the other
emulates the NT at the CPE location.
SINGLE-ENDED TESTING FROM THE
CENTRAL OFFICE
In general, single-ended testing is done from the CO
location. A test set, emulating the LT at the CO, is
connected to the IDSL circuit under test. Then, ANSI
T1.601 embedded o erations channel (eoc) loo u
commands can be sent to loo u the IDSL Router (NT/
TA) at the CP if it has been installed. A Bit Error Rate
Test (BERT) can then be run towards the loo , to verify
the erformance of the circuit.
For an IDSL circuit trans orted over a DLC system, it is
required that the DLC be configured to use the 3-DS0
TDM multi lexing method to enable eoc commands to
ass through the system. In this method, the DLC
designates three DS0 channels to trans ort the entire
2B+D ayload lus the overhead from one end to the
other end of the system. This method also enables eoc
loo commands to be sent to the channel unit cards (U-
BRiTE cards), which act as re eaters at either the DLC
CO Terminal or the DLC Remote Terminal. These loo
commands can hel when troubleshooting the line
cards. If the DLC is set to run in Trans arent mode, the
eoc channel will not be assed through the DLC to the
CPE and the loo commands will not be su orted in
the DLC system. Therefore, a two-ended test must be
erformed.
To successfully BERT test an IDSL circuit over a DLC, the
test set must be synchronized to the network clock to
avoid intermittent attern sync loss due to clock sli s.
This is detailed in the SunSet xDSL A lication Series,
Publication Number APP-XDSL-010, IDSL Testing with
an External Reference Clock.
U-2B1Q
2-wire DSL
to ATM
backbone
Central Office
DSLAM
IDSL Router
NT/TA
Customer Premises
T1or
higher order U-2B1Q
2-wire DSL
U-2B1Q
2-wire DSL
to ATM
backbone
DSLAM
IDSL Router
NT/TA
DLC
CO
Terminal
DLC
Remote
Terminal
Central Office Customer Premises
Figure 1 IDSL Circuit transported over a 2-wire Copper Pair
Figure 2 IDSL Circuit transported over a Digital Loop Carrier
3
© 2001 Sunrise Telecom Incor orated SunSet xDSL: IDSL Circuit Testing
The single-ended tests from the
CO (Figures 3 and 4) are a li-
cable only if the CPE has already
been connected to the IDSL
circuit, or if the DLC system
su orts and asses through the
eoc channel. If the eoc is su -
orted, the SunSet xDSL with an
IDSL Module will be able to
loo back not only the CPE, but
also the channel unit line cards in
each of the DLC Terminals (CO and
Remote) for BERT analysis.
Configuring the Test Set
The configuration of the test set is
similar for testing an IDSL circuit
over a co er air or over a DLC
system. The only difference is the
TX CLOCK setting. For testing
IDSL over a co er air, the TX
CLOCK source should be set to
INTERN, to use the internal clock
of the test set. However, for IDSL
circuits carried over a DLC, an
external reference clock should be
used to synchronize the test set to
the network. In most cases, a U
interface signal from either the DSLAM or an ISDN
switch is used, so TX CLOCK should be set to EXT-U (as
shown in Figure 5).
The TX CLOCK setting is only available when the test set
is configured to LT-144k. In this mode, the selected test
attern is sent in the test channel s ecified. As you
cursor down to the TX CLOCK field, four F-keys will be
dis layed. Select the a ro riate clock setting that fits
the a lication to be run.
Connect the U-2B1Q connector of the test set to the
IDSL circuit under test and connect the U EXT CLK
connector to the external clock source, if a licable.
The TEST CHANNEL selection should be set to 2B+D to
BERT test the IDSL circuit at the full rate of 144 kb s.
You can also select a smaller set of channels to BERT
test at a lower s eed.
The T1/E1 SIG LED should turn green, followed by the
LP1 SYNC LED after Layer 1 frame synchronization is
acquired. When the TX CLOCK field is set to EXT-U, the
FRAME LED will be used to indicate the status of the
external clock in ut. The FRAME LED will be solid green
to indicate a ro er external clock signal, or will be red
if the external clock is not received ro erly.
T
1
or
higher order
Channel loopback
SSxDSL
w/IDSL Module
LT-
1
44K Mode
IDSL Router
NT/TA
DLC
CO
Terminal
U-2B
1
Q
2-wire DSL
U-2B
1
Q
2-wire DSL
DLC
Remote
Terminal
eoc loop up command
Central Office Customer Premises
Figure 3 Single-ended test on IDSL Circuit fro the CO
Figure 4 Single-ended test on IDSL Circuit transported over a DLC fro the CO
TEST CONFIGURATION
INTERFACE : U
MODE : LT-144K
TEST CHANNEL : 2B+D
TEST PATTERN : 2047
INTERN EXT-T1 EXT-E1 EXT-U
08:11:01
TX CLOCK : EXT-U
Figure 5 IDSL Module TEST CONFIGURATION Screen
SSxDSL
w/IDSL Module
LT-144K Mode
Ext.Clock
from DSLAM or
ISDN Switch
Central Office
IDSL Router
NT/TA
U-2B1Q
2-wire DSL
Channel loopback
eoc loop up command
Customer Premises
4
© 2001 Sunrise Telecom Incor orated SunSet xDSL: IDSL Circuit Testing
ADDRESS : 0 (NT1
EOC CONTROL
COMMAND : 2B+D LOOPBACK
EOC BITS : 000101010000
RX ADDRESS : 0 (NT1
RX COMMAND : 2B+D LOOPBACK
RX EOC BITS: 000101010000
SEND NORMAL LOOP2BD MORE
08:11:05
---------------------------
Figure 6 EOC CONTROL Screen
ELAPSED TIME:
000:10:08
ERROR COUNT:
0
PAGE-UP PAGE-DN STOP STORE
MEAS 08:23:20
Figure 7 BERT & RESULTS Screen
Looping Up a Channel Unit Line Card or CPE
Esca e from the TEST CONFIGURATION screen and enter
the EOC CONTROL screen (Figure 6).
To loo back the IDSL Router (NT/TA), set the ADDRESS
to 0 (NT1) and the COMMAND to LOOP2BD. This eoc
command will then be sent to the NT (CPE) and will
initiate a loo back of the B1, B2, and D-channels. Press
the SEND F-key to transmit the eoc command. Check in
the bottom half of the screen to see the RX (received)
ADDRESS and COMMAND returned from the device.
The RX ADDRESS and COMMAND should be identical to
those transmitted. This indicates a successful command
and res onse, and that the loo back is in lace. If the
identical message is not shown in the Received field, the
loo command has failed.
Running a BERT Test
Once the loo back is confirmed, a BERT test can be
started. Esca e from the EOC CONTROL screen and
enter the BERT & RESULTS screen from the IDSL/ISDN
BERT menu. Check that the PAT SYNC LED is solid green
(indicating test attern synchronization) and that the
BIT ERR LED is off. Inject a bit error from the test set by
ressing the ERR INJ key on the key ad. The BIT ERR
LED should turn red for about one second and start
blinking red. Check that the ERROR COUNT reads one;
this verifies that the channel is ro erly loo ed back.
Press the HISTORY key to acknowledge the error
condition. You will notice that the BIT ERR LED will
sto blinking. Press the STOP/
START F-key twice to restart the
BERT test. This will set the ERROR
COUNT back to 0 (see Figure 7).
For testing a bit rate of 144 kb s
(i.e. TEST CHANNEL setting of
2B+D), it is recommended by the
ANSI T1.601 s ecification, that the
BERT test be run for at least 10
minutes. For testing a bit rate of
64 kb s (i.e. TEST CHANNEL setting
of B1 or B2), the test should be run
for 25 minutes.
SINGLE-ENDED TESTING
FROM THE FIELD
The test set functions as an NT
emulating the CPE, and the DSLAM
is required to rovide a loo back
on the IDSL circuit to be able to
erform a BERT test from the CP
(Refer to Figures 8 and 9).
Single-ended BERT to loop
SSxDSL
w/IDSL Module
NT-144K Mode
T1or
higher order U-2B1Q
2-wire DSL
U-2B1Q
2-wire DSL
to ATM
backbone
Central Office Customer Premises
DSLAM
DLC
CO
Terminal
DLC
Remote
Terminal
Figure 8 Single-ended test on IDSL Circuit fro the CP
Figure 9 Single-ended test over a DLC fro the CP
U-2B1Q
2-wire DSL
Single-ended BERT to loop
to ATM
backbone
Central Office
DSLAM
SSxDSL
w/IDSL Module
NT-144K Mode
Customer Premises
5
© 2001 Sunrise Telecom Incor orated SunSet xDSL: IDSL Circuit Testing
-POWER
TEST CONFIGURATION
INTERFACE : U
TEST PATTERN : 2047
NT-144K LT-144K NT-LOOP LT-LOOP
09:11:01
TEST CHANNEL : 2B+D
MODE : NT-144K
Figure 10 TEST CONFIGURATION Screen
-POWER
NET NT
M4 ACCESS
M4 : 11111111
*ACT *DEA *SOC *UOA *AIB
08:11:05
Figure 11 M4 ACCESS Screen
With the SunSet xDSL test set, you can choose which
channels to run a BERT test on, from only the D-channel
(16 kb s) to the full combined 2B+D channels (144 kb s).
If the eoc channel is not assed through the DLC
system, or a loo cannot be laced at the DSLAM, a
two-ended test is required to run a BERT test on the
IDSL circuit.
Configuring the Test Set
The configuration of the test set is identical for testing
IDSL circuits over a co er air or over a DLC. The
configuration is as shown in Figure 10. The test set is
configured to the NT-144k emulation mode and allows
the user to configure a TEST PATTERN and designate
which TEST CHANNEL is used.
Connect the U-2B1Q connector of the test set to the
IDSL circuit under test. The TEST CHANNEL selection
should be set to 2B+D to run the BERT test at the full
rate of 144 kb s. As with single-ended testing from the
CO, you can also select a smaller set of channels to BERT
test at a lower s eed.
The T1/E1 SIG LED should turn green, followed by the
LP1 SYNC LED after Layer 1 synchronization is acquired.
Checking Continuity to the DSLAM
If the IDSL goes through a DLC, a green T1/E1 SIG LED
means that the test set has achieved Layer 1 frame
synchronization to the last channel unit line card of the
DLC. This does not necessarily mean you have connec-
tivity all the way to the DSLAM. To confirm this, check
the status of the ACT bit in the M4 channel, which is
art of the overhead. Enter the M4 ACCESS screen
(Figure 11). In NT-144k mode, the test set shows only
the received M4 bits. The left most M4 bit dis layed on
the screen is the ACT bit. If it is set to a 1, or if the ACT
indication is marked with an asterisk (*), the circuit is
connected through the DLC all the way to the DSLAM.
Running a BERT Test
If a loo can be rovided at the DSLAM, then a BERT
test can be started on the IDSL circuit. Enter the BERT
& RESULTS screen to start the BERT test. Check that the
PAT SYNC LED is solid green (indicating test attern
synchronization) and that the BIT ERR LED is off. Inject
a bit error from the test set by ressing the ERR INJ key
on the key ad. The BIT ERR LED should turn red for
about one second and start blinking red. Check that
the ERROR COUNT reads one. This verifies that the
channel is ro erly loo ed back. Press the HISTORY key
to acknowledge the error condition. You will notice
that the BIT ERR LED will sto blinking. Press the STOP/
START F-key twice to restart the BERT test. This will set
the ERROR COUNT back to 0.
TWO-ENDED TEST OVER AN IDSL CIRCUIT
In this case, two test sets are used to test from each end
of the IDSL circuit. One in the CO, emulating the LT (or
the DSLAM), and the other at the customer remises
emulating the NT (or the CPE). This test is extremely
useful to qualify the cable air and/or ath rovisioned
by the DLC for IDSL service before the DSLAM is
connected to the circuit and the CPE is installed.
Because of the two-ended, bidirectional BERT test
erformed in this a lication, it will also detect
directional roblems from assing data over the IDSL
circuit and through the DLC system.
Configuring the Test Set
In this two-ended testing a lication, two SunSet xDSL
units with IDSL modules are required (one at each end
of the IDSL circuit - see Figures 12 and 13 on next
age). The test set on the CO side of the circuit will be
configured to LT-144k mode and the test set on the
customer side of the circuit will be configured to NT-
144k. Each test set should have the TEST CHANNEL set
6
© 2001 Sunrise Telecom Incor orated SunSet xDSL: IDSL Circuit Testing
U-2B
1
Q
2-wire DSL
SSxDSL
w/IDSL Module
NT-
1
44K Mode
SSxDSL
w/IDSL Module
LT-
1
44K Mode Bidirectional end-to-end BERT
Central Office Customer Premises
Figure 12 Two-ended test on an IDSL Circuit
SSxDSL
w/IDSL Module
NT-
1
44K Mode
SSxDSL
w/IDSL Module
LT-
1
44K Mode
T
1
or
higher order
DLC
CO
Terminal
U-2B
1
Q
2-wire DSL
U-2B
1
Q
2-wire DSL
DLC
Remote
Terminal
Ext.Clock
from DSLAM or
ISDN Switch
Bidirectional end-to-end BERT
Central Office Customer Premises
Figure 13 Two-ended test on an IDSL Circuit over a DLC
to 2B+D in order to run the test at
the full rate of 144 kb s. An
external clock reference in ut for
the LT-144k unit on the CO side of
the circuit, is required if the circuit
goes through a DLC system.
The configuration of the test set
emulating the LT-144k mode is the
same as that shown in Figure 5.
The TX CLOCK is set according to
the requirement as detailed in the
Single-Ended Testing section. Refer
to Figure 10 for the configuration
of the test set emulating the NT-
144k mode.
The T1/E1 SIG LED should turn
green, followed by the LP1 SYNC
LED after Layer 1 frame synchroni-
zation is acquired. If the circuit
goes through a DLC, enter the M4
ACCESS screen on the NT-144k
unit to confirm ath continuity
between the two test sets. This
will allow you to observe the
status of the ACT bit (see Figure
11). If it is set to a 1, or if the ACT
indication is marked with an asterik (*), the circuit is
connected through the DLC to the DSLAM, or in this
case, the SunSet xDSL emulating the DSLAM (LT-144k).
When set to 1, the end-to-end BERT test can be started
by going to the BERT & RESULTS screen. Check that the
PAT SYNC LED is solid green (indicating test attern
synchronization) and that the BIT ERR LED is off on
both test sets. Inject a bit error from each of the test
sets by ressing the ERR INJ key on the key ad. The BIT
ERR LED should turn red for about one second and start
blinking red. Check that the ERROR COUNT reads one.
This verifies that the channel is ro erly loo ed back.
Press the HISTORY key to acknowledge the error
condition. You will notice that the BIT ERR LED will
sto blinking. Press the STOP/START F-key twice to
restart the BERT test. This will set the ERROR COUNT
back to 0 (refer back to Figure 7).
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