Icom IC-R100 Bedienungsanleitung

е

СОМ

SERVICE

MANUAL

WIDEBAND

RECEIVER

IC-RIOO

Icom

Inc.

INTRODUCTION

This

service

manual

describes

the

latest

service

infor-

mation

for

the

IC-R100

VVIDEBAND

RECEIVER

at

the

time

of

going

to

press.

5

versions

of

the

IC-R100

have

been

designed.

This

service

manual

covers

each

version.

VERSION

NO.

VERSION

SYMBOL

m

|

To

upgrade

quality,

all

electrical

or

mechanical

parts,

and

internal

circuits

are

subject

to

change

without

notice

or

obligation.

DANGER

NEVER

connect

the

receiver

to

an

AC

outlet

or

to

a

DC

power

supply

that

uses

more

than

16

V.

This

will

ruin

the

receiver.

DO

NOT

expose

the

receiver

to

rain,

snow

or

any

liquids.

DO

NOT

reverse

the

polarities

of

the

power

supply

when

connecting

the

receiver.

DO

NOT

apply

an

RF

signal

of

more

than

20

dBm

(100

mW)

to

the

antenna

connector.

This

could

damage

the

receiver's

front

end.

UQUID

CRYSTAL

DISPLAY

ЕМ

АРС

aim

nni

UTLIULULILELI

PAUSE

MODE

пока

12

se

COMMUNICATIONS

RECEIVER

TC

-R1OO

ORDERING

PARTS

Be

sure

to

include

the

following

four

points

when

ordering

replacement

parts:

1.

10-digit

order

numbers

2.

Component

part

number

and

name

3.

Equipment

model

name

and

unit

name

4.

Quantity

required

«SAMPLE

ORDER»

1130001000

IC

UPD4066BC

—

IC-R100

MAIN

UNIT

5

pieces

8810006130

Screw

BiH

M2.6

x5

IC-R100

Top

cover

10

pieces

Addresses

are

provided

on

the

inside

back

cover

for

your

convenience.

REPAIR

NOTE

.

Make

sure

a

problem

is

internal

before

disassembling

the

receiver.

.

DO

NOT

open

the

receiver

until

the

receiver

is

dis-

connected

from

its

power

source.

.

DO

NOT

force

any

of

the

variable

components.

Turn

them

slowly

and

smoothly.

.

DO

NOT

short

any

circuits

or

electronic

parts.

An

insulated

tuning

tool

MUST

be

used

for

all

adjustments.

.

DO

NOT

keep

power

ON

for

a

long

time

when

the

receiver

is

defective.

.

READ

the

instructions

of

test

equipment

thoroughly

before

connecting

equipment

to

the

receiver.

SECTION

Ф

> A

A

b

a

RA

aan

о

~

لح

لد

لح

оо

o o

со

ж

о N

~

о

со

+

G

N

一

ко

N

一

TABLE

OF

CONTENTS

SPECIFICATIONS

22222222222..........4222....2..2...

1—

1

INSIDE

VIEWS.

RR]

eee

ens

2—1

BLOCK

DIAGRAM

оон

Lees

od

a

E

арды

лы

URN

3—

1

CIRCUIT

DESCRIPTION

eem

4—1~8

RE

CIRCUITS.

vo

а

лкен

Rem

Se

eae

ak

ди

SES

4

一

1

IF

CIRCUITS:

оа

ERE

xU

e

eher

Бека

бады

ад

„=

о

4

一

2

PLL

СІНСІЛТ5...........................................................

Ц.

4--4

POWER

SUPPLY

CIRCUITS

.

e

hme

mrt

4—5

OTHER

СІНСІЛТ5............................................43л4л.2........Ш

Ж

4--6

LOGIC

СІНСІЛТ5.....................................................Ҙ0...а.

ЗУ

4--7

MECHANICAL

PARTS

AND

0І$АЅЅЕМВІҮ............................

5—1~3

FRONT

PARTS

.......................

hh

heh

hh

eme

hh

5

一

1

ACCESSORIES

................................................

........

as

5--1

CHASSIS

РАВТЗ................

GOES

edle

gU

ма

О

СЕТ

Ur

AE

5—2

PARTS

ET

а

аи

ои

аи

ақтар

ыны

ары

6—1~9

ADJUSTMENT

PROCEDURES

ea

7—1~8

PREPARATION

BEFORE

SERVICING.

........

cee

eee

tnt

7

一

1

TEST

EQUIPMENT

СОММЕСТІОМ.............................................

7—1

PLL

ADJUSTMENT

......

неее

еек"

7

一

2

RECEIVER

АРЈОЅТМЕМТ.

......

ee

tte

eee

tees

7—3

BOARD

LAYOUTS

La

вон

a

bisce

eal

seeds

8-1-5

SUBORDINATE

LOGIC

ӘМІТ5........................................2....Д2ДШД...

8

—

1

MAIN

UNIT

.................

RR

Rh

eek

heran

8

一

3

PLE

UNIT

са

ОО

ie

да

к

а

алы

ОСО

ORE

eh

ы

dela

8—4

SUBORDINATE

PLL

UNITS

..................................................

8—5

VOLTAGE

DIAGRAM

|.

9—1

SECTION

1

SPECIFICATIONS

e

Frequency

coverage

e

Mode

е

Tuning

step

increments

e

Antenna

impedance

e

Power

Supply

requirement

e

Current

drain

(at

13.8

V

DC)

e

Usable

temperature

range

e

Frequency

stability

(at

1800

MHz):

e

Number

of

memory

channels

e

Dimensions

e

VVeight

e

Sensitivity

e

Selectivity

e

Audio

output

povver

e

Audio

output

impedance

VERSION

FREQUENCY

COVERAGE

U.S.A.,

Europe,

0.1--1856

MHz*

Australia

13.95—

14.5

MHz,

28.0—

29.7

MHz,

144.0

—

146.0

MHz,

430.0--440.0

MHz,

1240.0

--1300.0

MHz

0.1--87.5

MHz,

108.0--1856

MHz*

*Specifications

guaranteed

for

0.5--1800

MHz

AM,

FM,

Wide

FM

(WFM)

1,

5,

8,

10,

12.5,

20

ог

25

kHz

(100~521.5

kHz

and

1.630—

904.9995

MHz)

1,

5,

8, 9,

10,

12.5,

20

or

25

kHz

(522—

1629.5

kHz)

12.5,

20

ог

25

kHz

(905-1856

MHz)

50

Q

(unbalanced)

13.8

V

DCx

15

%

(negative

ground)

Less

than

1.1

A

—10

'C—

+60

°С

(+14

^F—

+140

°F)

+3.5

ppm

(0

'C—

+50

°C;

+32

°F~

+122

°F)

Memory

channels

100

Priority

channel

1

Scan

edge

channels

20

(for

10

scan

ranges)

150

(W)

x

50

(H)

x

181

(D)

mm

5.9

(VV)

x

2.0

(H)

x

7.1

(D)

in

(Projections

not

included)

1.4

kg

(3.1

Ib)

Frequenc

Germany

Еве

|

-一

saw

|

с

L

-

|

su

|

[

res

вање

|

mw

|

—

|

w

|

Measurement

conditions

:

Preamp

is

ON

in

the

50--904.9995

MHz

frequency

гапде.

FM

12

dB

SINAD

(1

kHz

modulation

with

+3.5

kHz

deviation)

WFM

12

dB

SINAD

(1

kHz

modulation

with

+50

kHz

deviation)

АМ

10

4В

5/М

(1

kHz

modulation

with

30

96

depth)

FM

More

than

15

RHz/—6

dB

VVFM

More

than

180

КН2/-3

dB

AM

More

than

6

kHz/—6

dB

More

than

2.5

VV

at

10

96

distortion

with

an

8

О

load.

4-8

О

All

stated

specifications

are

subject

to

change

without

notice

ог

obligation.

SECTION

2

INSIDE

VIEWS

e

TOP

VIEW

Switching

relay

circuit

IC7

ND487C1

tst

me

(Се

CB346M1B

50.0

一

905.0

MHz

Preamplifier

(IC2:

MC-5156)

ғазып-----

"MEN,

ЕЧ

d

f

FIL

1

UNIT

-

à

4

L

TUNER

UNIT

Reference

crystal

m

(X1:

CR316

12.6

MHz)

a

=

10

V

DC-DC

Converter

Pulse-swallow

counter

(IC5:

BA6161M)

(IC1:

M54562P)

Expander

(IC11:

LA7910)

e

BOTTOM

VIEW

FM

detector

circuit

(IC1:

MC3357P)

Lithium

backup

battery

Reference

crystal

(X1:

CR114

10.24

MHz)

AFC

circuit

(IC2:

BA695)

у

ircuit

арашы

WFM

detector

circuit

(СЗ:

MC3356P)

Analog

switching

circuit

AM,

ЕМ

1st

IF

circuit

(IC5:

uPD4066BC)

BLOCR

DIAGRAM

SECTION

3

LINO

NIV

LINN

Td

SECTION

4

CIRCUIT

DESCRIPTION

41

RF

CIRCUITS

4-1-1

FILTER

CIRCUIT

(PLL

UNIT)

The

IC-R100

has

3

antenna

connectors

(J7,

98,

J9)

for

a

super-wideband

receiving

range

of

0.1

MHz

to

1856.0

MHz.

Received

signals

enter

one

of

the

3

antenna

connectors

depending

on

the

receive

frequency

range.

(1)

0.1—50.0

MHz

FILTER

RF

signals

from

an

antenna

connector

(J8)

are

distributed

to

three

separate

filters

through

switching

diodes

(D10,

D12)

for

filter

selection.

*

0.1000—

1.6290

MHz

After

passing through

a

switching

diode

(D10)

a

0.1000—

1.6290

MHz

signal

is

applied

to

an

attenuator

consisting

of

R64~R66.

The

attenuator

prevents

distortion

of

very

strong

signals

from

medium

wave

broadcasting

stations.

The

signal

is

applied

to

FIL

1

(С1--С5,

11,

12)

which

forms

a

low-pass

filter.

The

filter

circuit

cuts

off

frequencies

of

1.6290

MHz

or

higher.

The

filtered

signal

passes

through

a

switching

diode

(D11).

•

1.6295--32.7495

MHz

After

passing

through

a

switching

diode

(012)

a

1.6295--32.7495

MHz

signal

is

applied

to

FIL

2

(C1—

C7,

L1,

L2)

which

forms

a

high-pass

filter.

The

filter

circuit

passes

frequencies

approx.

1.630

MHz

or

lower.

The

signal

is

applied

to

FIL

3

(С1--5,

11,

12)

which

forms

a

low-pass

filter.

The

filter

circuit

cuts

off

approx.

32.75

MHz

or

higher.

The

filtered

signal

passes

through

a

switching

diode

(D14).

|

32.7500--49.9995

MHz

A

32.7500

MHz~49.9995

MHz

signal

is

applied

to

FIL

2

through

the

switching

diode

(О12).

The

signal

is

applied

to

FIL

4

(C1~C9,

L1~L4)

which

forms

a

bandpass

filter.

The

bandpass

filter

passes

signal

within

the

frequency

range

of

32.7500~50.0000

MHz.

The

filtered

signal

is

applied

to

the

switching

diode

(D14).

е

RF

CIRCUITS

0,1--49,9995

MHz

0.1—1.8290

MHZ

1.6295--49.9995

MHz

1.6295

一

32.7495

MHz

(2)

50.0--905.0

MHz

FILTER

No

filter

is

installed

in

this

frequency

range.

RF

signals

enter

an

antenna

connector

(J7)

and

then

are

applied

to

the

RF

relay

circuit

(RL2,

RL3).

The

RF

relay

circuit

switches

the

signals

to

bypass

through

a

preamplifier

(С2)

ог

be

amplified

at

the

preamplifier.

The

pre-

amplifier

(IC2)

provides

15

dB

gain

to

attenuate

ап

IF

signal

level

at

an

attenuator

circuit

(Q16)

when

the

preamplifier

circuit

is

turned

ON.

(3)

905.0--1856.0

MHz

FILTER

RF

signals

enter

an

antenna

connector

(J9)

and

then

pass

through

a

switching

diode

(018).

The

signals

are

applied

to

two

separate

high-pass

filters

for

frequencies

lower

than

and

higher

than

1380.5

MHz.

The

filtered

signals

pass

through

a

switching

diode

(D21).

4-1-2

HF

BAND

CONVERTER

CIRCUIT

(PLL

UNIT)

The

filtered

signals

entering

at

J8

are

applied

to

a

1st

mixer

circuit

consisting

of

IC7,

L29,

L30

and

then

are

mixed

with

a

63.0

MHz

1st

LO

signal

to

produce

a

63.1

~112.9995

MHz

1st

IF

signal

corresponding

to

the

receive

frequency

range

ої

0.17-49.9995

MHz.

The

63.0MHz

1st

LO

signal

is

generated

by

a

local

oscillator

(X1,

Q1).

X1

produces

a

12.6

MHz

reference

frequency.

The

reference

frequency

is

multiplied

by

five

at

LO

amplifiers

(Q6,

Q15)

for

producing

the

63.0

MHz

1st

LO

signal.

4-1-3

1GHz

BAND

CONVERTER

CIRCUIT

(PLL

UNIT)

The

filtered

signals

entering

at

J9

are

applied

to

a

RF

amplifier

(IC8)

corresponding

to

a

UHF

band

and

then

applied

to

a

1st

mixer

circuit

(IC9).

IC9

is

a

DBM

(Double

Balanced

Mixer)

The

signals

are

mixed

with

a

475.5

905.0

MHz

1st

LO

signal

to

produce

a

429.5—

905.0

MHz

1st

IF

signal

corresponding

to

the

receive

frequency

range

of

905.0—

1856.0

MHz.

Тһе

475.5--905.0

MHz

1st

Lo

signal

is

buffer-amplified

at

IC10

depending

on

the

receive

frequencies.

The

signal

is

applied

to

the

1st

mixer

circuit

(IC9).

©?

1st

LO

signat

from

|016

4-2

IF

CIRCUITS

4-2-1

TUNER

UNIT

(PLL

UNIT)

The

TUNER

UNIT

(EP2)

contains

an

RF

amplifier

controlled

by

the

ТАСС

signal,

mixer

and

4

VCOs.

Тһе

RF

signals

are

applied

to

P2

on

the

TUNER

UNIT

(EP2)

to

be

con-

verted

to

а

46

MHz

IF

signal.

Тһе

TUNER

UNIT

(EP2)

outputs

the

signal

from

8.

IC2

on

the

LOGIC

UNIT

supplies

2-bit

data

to

IC11

(pin

3,

4).

IC11

is

ап

expander

for

switching

the

operating

band

of

TUNER

UNIT

(EP2).

The

following

table

(Fig

2)

shows

the

relations

between

2-bit

data

and

the

band

signal.

H:

High

level

No

indication:

Lovv

level

4-2-2

AMIFM

IF

AND

2ND

MIXER

CIRCUITS

(MAIN

UNIT)

The

46

MHz

IF

signal

passes

through

a

switching

diode

(D1)

with

AM

5

and

FM

5

signals

when

AM

or

FM

mode

is

selected.

The

signal

is

applied

to

an

IF

amplifier

and

then

applied

to

a

crystal

filter

(ЕП)

to

improve

the

selectivity.

The

filtered

signal

is

applied

to

a

2nd

mixer

(Q2)

and

then

mixed

with

the

35.3

MHz

2nd

LO

signal

to

produce

a

10.7

MHz

2nd

IF

signal.

A

35.3

MHz

2nd

LO

signal

is

generated

by

a

2nd

local

oscillator

circuit

consisting

of

D8,

X3,

Q5,

and

other

components.

The

2nd

LO

oscillator

circuit

produces

a

frequency

step

less

than

the

PLL

reference

frequency.

The

LOGIC

UNIT

supplies

D/A

converted

signals

to

IC10

(pin

3)

which

correspond

to

each

tuning

step.

The

signals

are

amplified

at

IC10

and

then

applied

to

a

varactor

diode

(D8)

which

shifts

the

oscillation

frequency.

•

АМІЕМ

IF

AND

2ND

MIXER

CIRCUITS

46.0

MHz

10.7

MHz

Q1

IF

|

PLL

IC

signal

(IC1,

16)

AM,

FM

35.3

MHz

signal

DIA

signal

from

LOGIC

UNIT

Fig.

3

4—2

4-2-3

2ND

IF

AND

FM

DEMODULATOR

CIRCUITS

(MAIN

UNIT)

The

10.7

MHz

2nd

IF

signal

is

applied

to

ҒІ2.

Fl2

is

а

MCF

(Monolithic

Crystal

Filter)

which

suppresses

out-of-

band

signals.

The

2nd

IF

signal

is

applied

to

a

3rd

mixer

section

of

IC1

and

is

mixed

vvith

a

3rd

LO

signal

to

be

converted

to

a

455

kHz

3rd

IF

signal.

IC1

is

designed

for

use

in

FM

dual

conversion

com-

munications

equipment.

IC1

contains

the

3rd

mixer,

local

oscillator

circuit,

limiter

amplifier,

quadrature

detector

circuit,

and

active

filter

circuit.

The

local

oscillator

section

and

X1

generate

10.245

MHz

for

a

3rd

LO

signal.

The

3rd

IF

signal

from

the

3rd

mixer

(IC1,

3)

passes

through

a

ceramic

filter

(F13)

where

unwanted

signals

are

suppressed.

It

is

then

amplified

at

the

limiter

amplifier

section

(IC1,

5)

and

applied

to

the

quadrature

detector

section

(IC1,

8

and

ceramic

discriminator

X2)

to

demodulate

the

3rd

IF

signal

into

an

AF

signal.

The

AF

signal

is

output

from

IC1

(pin

9).

4-2-4

AM

DEMODULATOR

CIRCUIT

(MAIN

UNIT)

A

portion

of

the

455

kHz

3rd

IF

signal

is

applied

to

an

IF

amplifier

(Q4)

after

passing

through

the

ceramic

filter

(FI3)

when

AM

mode

is

selected

by

switching

diodes

(D5,

D7).

When

the

switching

diodes

are

turned

ON,

AM

5

signal

line

obtains

5

V.

The

amplified

signal

passes

through

a

ceramic

filter

(Fl4)

to

improve

selectivity.

The

filtered

signal

is

re-amplified

at

an

IF

amplifier

(Q7)

and

then

rectified

by

the

AM

detector

circuit

(D10,

D11).

The

detected

signal

is

demodulated

into

an

AM

signal.

e

2ND

IF

AND

ҒМ/АМ

DEMODULATOR

CIRCUITS

5.0У

I01

2nd

LO

AM5

line

AF

signal

Fig.

4

4-2-5

WFM

DEMODULATOR

CIRCUIT

When

the

“WFM

5"

line

becomes

“HIGH”,

the

S-meter

(MAIN

UNIT)

switch

(Q9)

is

turned

ON

to

cut

off

the

FM

or

AM

signal.

The

46

MHz

IF

signal

is

applied

to

a

2nd

mixer

section

In

FM

or

AM

mode,

the

S-meter

signal

is

applied

to

IC4(b)

of

IC3

and

then

mixed

with

the

35.3

MHz

2nd

LO

signal

(pin

6)

through

the

ТАСС

signal

line.

Тһе

inverted

and

to

produce

а

10.7

MHz

2nd

IF

signal.

amplified

signal

is

applied

to

the

main

CPU

(IC2,

93).

The

35.3

MHz

2nd

LO

signal

is

amplified

at

an

LO

When

the

"FM

5"

or

"AM

5"

line

becomes

"HIGH",

the

amplifier

(Q6)

and

is

then

applied

to

the

2nd

mixer

S-meter

switch

(Q10)

is

turned

ON

to

cut

off

the

WFM

section

through

IC3

(pin

3).

S-meter

signal.

IC3

is

designed

for

use

in

digital

data

communications

equipment.

IC3

contains

the

2nd

mixer,

local

oscillator

4-2-7

AGC

CIRCUIT

(MAIN

UNIT)

circuit,

limiter

amplifier

and

quadrature

detector

circuit.

In

FM

or

AM

mode,

the

signal

is

detected

to

obtain

AGC

vol

at

D1

D11

and

is

then

amplified

at

an

AGC

The

2nd

IF

signal

from

the

2nd

mixer

(IC3,

5)

passes

age

ا󰾯

M

|

:

P

|

i

ih

h

ic

filter

(Е15)

wh

têd

апа!

amplifier

(Q11).

The

amplified

signal

is

distributed

to

a

des

i

È

SF

M

Va

put

i

SIE

"di

base

of

the

IF

amplifier

(Q1)

on

the

MAIN

UNIT

and

the

Suppressed..

DEAS

шеп-атриес

atthe:

р

ВЕ

amplifier

on

the

TUNER

UNIT

(EP2)

through

the

section

(IC3,

7)

and

applied

to

the

quadrature

detector

TAGC

line

section

(IC3,

11

and

ceramic

discriminator

X4)

to

|

ек

И

de

an

AF

signal.

The

AF

Іп

WFM

mode,

the

"WFM

5"

line

becomes

“HIGH”,

ЗОНА

IS

UPAR

ONE

(pin

13).

turning

ОМ

012.

Тһе

АСС

voltage

is

cut

off

when

Q12

is

turned

ON.

4-2-6

S-METER

CIRCUIT

(MAIN

UNIT)

When

the

scan

is

in

operation,

the

AGCR

signal

from

In

WFM

mode,

the

S-meter

signal

is

output

from

IC3

(pin

the

LOGIC

UNIT

turns

OFF

Q23.

C132

is

bypassed

to

14)

and

then

applied

to

IC4(a)

(pin

3).

The

amplified

reduce

the

AGC

time

constant.

signal

is

applied

to

a

main

CPU

(IC2,

93).

e

МЕМ

DEMODULATOR

CIRCUIT

5.0

V

2nd

LO

signal

WFMS5

line

S-METER

MUTE

Q9

TAGC

Signal

SM

line

from

LOGIC

UNIT

(сз

S-Meter

АМР

signal

S-METER

MUTE

010

1st

IF

signal

4-2-8

SQUELCH

CIRCUIT

(MAIN

UNIT)

The

IC-R100

has

2

squelch

systems,

S-meter

squelch

and

noise

squelch.

The

noise

squelch

functions

in

FM

mode.

Some

of

the

noise

components

in

the

AF

signal

from

IC1

are

applied

to

IC1

(pin

10)

via

a

de-emphasis

circuit

(R17,

C28,

C29).

This

de-emphasis

circuit

is

an

integrated

circuit

vvith

frequency

characteristics

of

—6

dB/octave.

The

active

filter

section

in

IC1

amplifies

noise

components

of

frequencies

of

20

kHz

and

above,

and

outputs

the

resulting

signals

from

11.

Output

signals

are

rectified

by

D2

and

D3,

and

converted

to

DC

voltage.

The

rectified

voltage

triggers

the

squelch

switch

(Q3)

and

then

is

applied

to

a

squelch

trigger

circuit

(IC1,

12).

The

output

level

from

IC1

(pin

14)

becomes

"LOW"

and

turns

ON

D29.

The

AF

signal

is

muted

when

the

output

level

from

IC6(b)

(pin

7)

becomes

"LOW."

The

S-meter

squelch

functions

in

either

AM

or

WFM

mode.

The

S-meter

squelch

signal

from

IC1

(pin

11)

is

applied

to

IC6(a)

through

the

squelch

switch

(Q3)

to

compare

with

a

reference

voltage

controlled

by

R86

on

the

LOGIC

UNIT.

When

this

reference

voltage

level

is

higher

than

.the

S-meter

squelch

level

from

IC1

(pin

11),

028

is

turned

ON.

The

output

level

from

IC6(b)

(pin

7)

becomes

"LOW"

to

mute

an

AF

signal

line.

When

the

S-meter

squelch

is

in

operation,

Q19

is

turned

ON

to

cut

off

the

noise

squelch.

4-2-9

AFC

CIRCUIT

(MAIN

UNIT)

This

circuit

automatically

controls

the

receive

frequency

to

compensate

for

the

frequency

drift

in

FM

or

AM

mode.

IC2

is

a

monolithic

IC

which

lights

up

"AFC"

on the

function

display

when

AFC

function

is

in

operation.

A

current

regulator

(IC8)

supplies

a

10V

reference

voltage

to

IC2

(pin

1)

for

comparison

with

the

DC

component

in

the

detected

FM

or

AM

signal.

The

frequency

drift

selects

an

output

signal

to

control

the

receive

frequency.

The

signal

is

output

from

IC2

(pin

6—8)

and

applied

to

the

LOGIC

UNIT.

4-2-10

AF

AMP

CIRCUIT

(MAIN

UNIT)

The

de-modulated

signals

are

applied

to

an

AF

mute

circuit

consisting

of

IC5(b)~IC5(d)

and

then

amplified

at

015.

The

amplified

signals

are

applied

to

the

[VOL]

control

(R1)

on

the

VR

UNIT.

When

the

squelch

is

closed,

IC5

cuts

off

the

AF

signals

like

an

AF

mute

switch.

The

AF

signals

are

power-amplified

at

an

AF

power

amplifier

(IC7)

to

drive

a

speaker.

4-2-11

ANL

CIRCUIT

(MAIN

UNIT)

This

circuit

eliminates

the

noise

components

to

obtain

clear

reception

in

AM

mode.

4

一

4

The

ANL

circuit

consists

of

В70--В73,

012,

C69,

and

Q8.

The

detector

output

from

D10

and

D11

is

applied

to

the

anode

of

D12

through

R72

and

В73.

The

detector

output

is

also

applied

to

the

cathode

of

D12,

passing

through

R70

where

it

is

divided

by

R70

and

R71.

When

the

[AFC

*

ANL]

switch

is

turned

OFF,

the

anode

voltage

of

012

is

higher

than

the

cathode

voltage.

012

is

therefore

activated.

However,

when

the

[AFC

*

ANL]

switch

is

turned

ON,

the

ANL

signal

line

becomes

"HIGH"

to

turn

ON

08.

C69

and

C117

are

grounded.

Therefore

the

detector

output,

including

pulses,

is

only

applied

to

the

cathode

of

D12.

The

cathode

voltage

becomes

higher

than

the

anode

voltage

and

D12

shuts

OFF

just

at

the

moment

when

the

pulses

are

received.

The

AF

signal

(excluding

pulses)

then

passes

through

D12

and

is

applied

to

!С5(с).

*

ANL

CIRCUIT

Q8

069,

R72

D10

AM

signal

[AFC-ANL]

switch

(LOGIC

UNIT)

to

015

Fig.

6

AM5

line

4-3

PLL

CIRCUITS

4-3-1

GENERAL

(PLL

UNIT)

The

PLL

circuit,

using

a

one

chip

modulus

prescaler

(IC3),

directiy

generates

the

1st

LO

frequencies

vvith

4

VCO's

on the

TUNER

UNIT.

The

modulus

prescaler

(IC3)

sets

the

dividing

ratio

based

on

serial

data

from

the

CPU,

and

compares

the

phases

of

VCO

signals

and

the

reference

oscillator

frequency.

The

PLL

IC

(IC3)

detects

the

out-of-step

phase

and

outputs

it

from

IC3

(pin

5).

A

reference

frequency

is

oscillated

at

X1.

4-3-2

REFERENCE

OSCILLATOR

CIRCUIT

(PLL

UNIT)

A

12.6

MHz

reference

frequency

is

produced

by

the

local

oscillator

section

of

(СЗ

and

X1.

C14

provides

frequency

control.

4-3-3

LOOP

FILTER

CIRCUIT

(PLL

UNIT)

Phase-detected

signals

from

!C3

(pin

5)

are

converted

to

DC

voltage

by

a

loop

filter

consisting

of

an

active

filter

(Q2

and

Q3).

The

DC

voltage

(PLL

lock

voltage)

is

fed

back

to

the

TUNER

UNIT

(EP2)

through

an

LV

signal

line

to

control

the

VCO

oscillation

frequency.

The

unlock

signal

is

output

from

(СЗ

(pin

7).

Icom IC-R100 Bedienungsanleitung

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