Sony APR-5000 Bedienungsanleitung

SONY

APR

5000

TECHNICAL

SERVICE

TRAINING

MANUAL

Prepared

SONY

PROFESSIONAL

AUDIO

TRAINING

GROUP

APR

5000

TRAINING

MANUAL

TABLE

CONTENTS

SECTION

INTRODUCTION

1.0

Overview

Standard

Models

Opt

ions

Specifications

1.1

1.3

SECTION

INSTALLATION

Over

Unpacking

2.1

Inventory

Check

List

Operational

Environment

Setting

the

Operating

Voltage

Stand

Assembly

2.4

Assembly

Procedure

5010

Remote

Control

Unit

APR

5000

Series

Cabinet

Dimensions

Connection

Examples

for

the

APR

5003

2.2

2.3

2.4

2.5

2.6

2.7

SECTION

CONTROLS

INDICATORS

AND

OPERATIONAL

GUIDELINES

Overview

Initial

Power

3.1

Headstack

DIP

Switch

3.1

Error

Codes

3.1

Control

and

Indicator

Status

Transport

and

Audio

Operations

3.2

Transport

Operations

3.2

1.1

Basic

Operation

3.2

1.2

Use

the

MVC

Wheel

3.2

1.3

Vari

Speed

Mode

3.2

1.4

Repeat

Mode

3.2

Audio

Operations

3.2

2.1

Basic

Operation

3.2

2.2

Spot

Erase

Audio

Alignment

3.3

PRESET

Storage

Time

Code

Operations

3.4

Time

Code

Generation

3.4

Auto

Time

Code

Mode

3.4

External

Time

Code

Recording

3.4

Internal

Time

Code

Recording

3.4

Analog

422

Type

Time

Code

Output

3.4

Time

Code

Synchronization

3.4

6.1

Chase

Lock

3.4

6.2

Offset

3.4

6.3

Offset

Calculation

3.0

3.1

3.2

3.3

3.4

6.4

Resolve

Play

3.4

6.5

Acceleration

Allowance

3.4

6.6

Burst

Time

Code

3.4

6.7

Control

Track

Editing

Operations

3.5

Programming

Manual

Edits

3.5

1.1

Edit

Out

Points

3.5

1.2

Preroll

and

Pestroll

Durations

3.5

Executing

Manual

Edits

3.5

2.1

Preview

3.5

2.2

Edit

3.5

2.3

Rev

3.5

Programming

Triggered

Edits

3.5

3.1

Establish

Lock

Reference

3.5

3.2

Maintain

Lock

Reference

3.5

Executing

Triggered

Edits

5.4

Preview

Edit

and

Review

Memory

Locations

3.6

Default

Settings

3.6

Recalling

and

Stqring

3.6

Storage

Registers

3.6

Memory

Location

Reference

3.5

3.6

SECTION

TRANSPORT

CIRCUIT

DESCRIPTIONS

4.0

Overview

Transport

System

Overview

Transport

Contro

Interface

System

4.0

Transport

Key

Panel

Command

Flow

4.0

Remote

Control

Unit

Command

Flow

4.1

4.2

Fundamentals

Synchronizer

Operation

4.2

3.1

APR

5003

Built

Synchronizer

Operation

4.2

APR

5003

Chase

Synchronized

External

LTC

Source

4.2

4.1

External

LTC

Time

Code

Signal

Path

4.2

Playback

Time

Code

Signal

Path

4.2

4.3

CPU

Synchronization

LTC

4.2

APR

5003

Chase

Synchronized

External

VITC

Source

4.2

5.1

External

VITC

Time

Code

Signal

Path

4.2

5.2

Playback

Time

Code

Signal

Path

4.2

5.3

CPU

Synchronization

Operation

VITC

Tape

Tension

Servo

System

Capstan

Servo

System

Transport

Circuit

Descriptions

4.5

Hall

Efect

Sensor

(

HES

)

Board

Overview

4.5

HES

Circuit

Decsription

4.5

Reel

Tach

Sensor

(

RTS

)

Tape

Tach

Sensor

(

TTS

)

Board

Overview

4.5

RTS

TTS

Circuit

Description

4.5

Capstan

Servo

Loop

(

CSL

)

Board

Overview

4.5

CSL

Circuit

Description

4.3

4.4

4.5

Reel

Motor

Driver

(

RMD

)

Board

Overview

4.5

RMD

Circuit

Description

4.5

Transport

Interface

Board

(

TIB

)

Overview

4.5

TIB

Circuit

Description

4.5

Connector

Interface

(

CNX

)

Board

Overview

4.5

11.1

Longitudinal

Time

Code

(

LTC

)

Circuitry

4.5

11.2

Parallel

Remote

Port

4.5

11.3

Serial

Interface

Circuitry

4.5

11.4

Record

Playback

Time

Code

Circuit

4.5

Video

Vertical

Interval

Time

Code

Translator

(

VVT

)

Board

4.5

12.1

Tone

Resolve

4.5

12.2

Film

Resolve

4.5

12.3

Video

Resolve

4.5

•

(

cal

Resolve

Interval

Time

Code

Translate

4.5

12.6

Control

Signals

and

Functibn

4.5

12.7

VVT

Circuit

Description

4.5

Central

Processing

Unit

(

CPU

)

Board

Overview

4.5

13.1

CPU

Operating

Principles

4.5

13.2

CPU

Circuit

Description

4.5

13.3

Programmable

Interval

Timers

(

PIT

)

4.5

13.4

RESET

Circuits

Vide

Vert

4.5

13.5

System

Clock

4.5

13.6

Serial

Communications

Controller

4.5

13.7

Communications

Input

Output

(

CIO

)

4.5

13.8

Time

Code

Readers

4.5

13.9

Time

Code

Generators

4.5

13.10

Clock

Recovery

Principles

Operation

4.5

Local

Network

Transceiver

(

LNT

)

Board

Overview

4.5

14.1

Central

Processing

Unit

(

CPU

)

Block

4.5

14.2

Serial

Communications

Controller

4.5

13.11

Clock

Recovery

Circuit

Overview

(

SCC

)

Block

4.5

14.3

Random

Access

Memory

(

RAM

)

Interface

Block

(

FIFO

RAM

)

4.5

14.4

Audio

System

Data

Block

4.5

14.5

Explanation

Signals

4.5

Key

Matrix

Board

(

KBD

)

Overview

4.5

15.1

8279

Programmable

Keyboard

Display

Interface

Block

4.5

15.2

Latched

Address

Decoding

4.5

15.3

End

Tape

Sensor

Circuit

4.5

15.4

MVC

Touch

Semsor

Circuit

SECTION

AUDIO

CIRCUIT

DESCRIPTIONS

5.0

Overview

Audio

System

Signal

Flow

5.1

Record

Signal

Flow

5.1

Playback

Signal

Flow

Audio

Circuit

Descriptions

5.2

Master

Card

(

MST

)

Overview

5.1

5.2

MST

Circuit

Description

5.2

Channel

Card

(

CNL

)

Overview

5.2

CNL

Circuit

Description

5.2

Audio

Motherboard

(

ADM

)

Overview

Circuit

Descript

ion

5.2

Front

End

Transformer

(

FEX

)

Board

Overview

5.2

FEX

Board

Circuit

Description

5.2

Alignment

(

ALN

)

Board

Overview

5.2

ALN

Circuit

Description

5.2

Audio

Control

Motherboard

(

ACM

)

5.2

10.1

ACM

Functions

5.2

10.2

ACM

Circuit

Description

5.2

10.3

Power

Amplifier

5.2

Control

Meter

(

CTM

)

Board

Overview

5.2

11.1

CTM

Circuit

Description

5.2

Time

Code

Channel

(

TCC

)

Card

5.2

12.1

TCC

Principles

Operation

5.2

12.2

TCC

Control

rcui

Description

5.2

12.3

TCC

Bias

and

Erase

Circuitry

5.2

12.4

TCC

Noise

Reduction

Circuitry

5.2

12.5

TCC

Audio

Circuitry

5.2

Time

Code

Meter

(

TCM

)

Board

5.2

13.1

TCM

Circuit

Description

5.2

APR

Head

Board

(

AHB

)

Description

SECTION

MAINTENANCE

AND

CALIBRATION

PROCEDURES

6.0

Overview

Necessary

Tools

6.1

Test

Equipment

6.1

Service

Tools

6.1

Cleaning

Items

6.1

Test

Tapes

Routine

Maintenance

Adjustment

After

Major

Parts

Replacement

6.3

Adjustment

After

Head

Replacement

6.3

Adjustment

After

Reel

Motor

Replacement

6.3

Adjustment

After

Capstan

Motor

Replacement

6.3

Adjustment

After

Roller

Guide

Replacement

6.3

Adjustment

After

CNL

Card

Replacement

Cleaning

and

Demagnetizing

6.4

General

Notes

Cleaning

6.4

Capstan

Cleaning

...

6.4

Demagnetizing

the

Tape

Path

6.4

Cleaning

the

Moving

Guides

6.5

Transport

Check

and

Alignment

Procedures

6.5

Reel

Motor

Assembly

Check

Adjustment

Procedure

6.5

Reel

Turntable

Height

Check

Adjustment

Procedure

6.5

Hours

Meter

Renewal

Procedure

6.5

;

Shield

Assembly

Check

Adjustment

Procedure

6.5

4.1

Shield

Assembly

Check

Procedure

6.5

4.2

Shield

Assembly

Adjustment

Procedure

6.2

6.3

6.4

6.5

Reel

Tach

Sensor

(

RTS

)

Tape

Tach

Sensor

(

TTS

)

Check

Adjustment

Procedure

6.5

5.1

Tape

Tachometer

Sensor

TTSA

Check

Procedure

6.5

5.2

Tape

Tachometer

Sensor

TTSA

Adjustment

Procedure

6.5

5.3

Tape

Tachometer

Sensor

TTSB

Check

Procedure

6.5

5.4

Tape

Tachometer

Sensor

TTSB

Adjustment

Procedure

6.5

5.5

Supply

Reel

Motor

RTSA

Check

Procedure

6.5

5.6

Supply

Reel

Motor

RTSA

Adjustment

Procedure

6.5

5.7

Supply

Reel

Motor

RTSB

Check

Procedure

6.5

5.8

Supply

Reel

Motor

RTSB

Adjustment

Procedure

6.5

5.9

„

Take

Reel

Motor

RTSA

Check

Procedure

6.5

5.10

Take

Reel

Motor

RTSA

Adjustment

Procedure

6.5

5.11

Take

Reel

Motor

RTSB

Check

Procedure

6.5

5.12

Take

Reel

Motor

RTSB

Adjustment

Procedure

6.5

Reel

Motor

Driver

(

RMD

)

Check

Adjusment

Procedure

6.5

6.1

RMD

Board

Offset

Check

6.5

6.2

RMD

Board

Offset

Adjustment

Procedure

6.5

6.3

RMD

Tension

Check

Procedure

6.5

6.4

RMD

Tension

Adjustment

Procedure

6.5

Flutter

Dampener

Arm

Check

Adjustment

6.5

Flutter

Start

Check

Adjustment

6.5

8.1

Flutter

Start

Check

Procedure

6.5

8.2

Flutter

Start

Adjustment

Procedure

6.5

End

Tape

(

EOT

)

Sensor

Check

Adjustment

6.5

9.1

EOT

Sensor

Check

Procedure

6.5

9.2

EOT

Sensor

Adjustment

Procedure

6.5

Variable

Speed

Check

Adjustment

Procedure

6.5

10.1

Variable

Speed

Check

Procedure

6.5

10.2

Variable

Speed

Adjustment

Procedure

Audio

System

Check

Adjustment

Procedures

6.6

Head

Azimuth

and

Wrap

Check

Adjustment

Procedure

6.6

1.1

Head

Wrap

and

Azimuth

Check

Procedure

6.6

1.2

Head

Wrap

and

Azimuth

Adjustment

Procedure

6.6

Input

Level

Check

Adjustment

Procedure

6.6

2.1

Input

Level

Check

Procedure

6.6

2.2

Input

Level

Adjustment

Procedure

6.6

Meter

Calibration

Check

Adjustment

Procedure

6.6

3.1

Meter

Calibration

Check

Procedure

6.6

3.2

Meter

Calibration

Adjustment

Procedure

6.6

Repro

Sync

Level

Check

Adjustment

Procedure

6.6

4.1

Repro

Sync

Level

Check

Procedure

6.6

4.2

Repro

Sync

Level

Adjustment

Procedure

6.6

Repro

Sync

High

Frequency

Response

Check

Adjustment

Procedure

6.6

5.1

Repro

Sync

High

Frequency

Check

Procedure

6.6

5.2

Repro

Sync

High

Frequency

Adjustment

Procedure

6.6

Audio

System

Record

Calibration

Check

Adjustment

Procedure

6.6

6.1

Record

Level

Bias

Level

Check

Adjustment

Procedure

6.6

6.2

Record

High

Frequency

Check

Adjustment

Procedure

6.6

6.3

Repro

Low

Frequency

Response

Check

Adjustment

Procedure

6.6

6.4

Sync

Low

Frequency

Response

Check

Adjustment

Procedure

6.6

RCB

and

RCF

Record

Compensations

6.6

RGC

and

SGC

Head

Gap

Compensations

6.7

Time

Code

Clock

Recovery

Check

Adjustment

Procedures

6.8

Board

Internal

Adjustments

6.8

MST

Board

Bias

and

Erase

Clock

Adjustment

6.8

CNL

Card

Bias

and

Erase

Envelope

Adjustment

SECTION

SCHEMATIC

DIAGRAMS

AND

TECHNICAL

DATA

7.0

Overview

Board

Locations

ACM

Board

Layout

ACM

Board

Schematic

Diagram

ADM

AHB

Board

Layout

and

AHB

Board

Schematic

Diagram

ADM

Board

Schematic

Diagram

ALN

Board

Layout

ALN

Board

Schematic

Diagram

CNL

Board

Layout

(

Early

)

CNL

Board

Layout

(

Late

model

)

CNL

Board

Schematic

Diagram

(

)

CNL

Board

Schematic

Diagram

(

)

CNX

Board

Layout

CNX

Board

Schematic

Diagram

CNX

Board

Layout

CNX

Board

Schematic

Diagram

CPU

Board

Layout

CPU

Board

Schematic

Diagram

(

)

CPU

Board

Schematic

Diagram

(

)

CPU

Board

Schematic

Diagram

(

)

CTM

Board

Layout

CTM

Board

Schematic

Diagram

DSP

Board

Layout

DSP

Board

Schematic

Diagram

FEX

Board

Layout

(

Early

and

Late

model

)

FEX

Board

Schematic

Diagram

HES

KBD

Board

Layout

and

HES

Board

Schematic

Diagram

KBD

Board

Schematic

Diagram

MSB

LNT

Board

Layout

and

MSB

Schematic

Diagram

LNT

Board

Schematic

Diagram

MST

Board

Layout

(

Early

model

)

MST

Board

Schematic

Diagram

(

Early

model

)

MST

Board

Layout

(

Late

model

)

MST

Board

Schematic

Diagram

(

Late

model

)

RMD

Board

Layout

and

Schematic

Diagram

RTS

Board

Layout

Schematic

Diagram

and

SBR

Board

Layout

Schematic

Diagram

TCC

Board

Layout

(

Early

model

)

TCC

Board

Layout

(

Late

model

)

TCC

Board

Schematic

Diagram

(

)

TCC

Board

Schematic

Diagram

(

)

TCM

Board

Layout

Schematic

Diagram

and

TIB

Board

Layout

TIB

Board

Schematic

Diagram

(

)

Til

ISIFi

}

jghiilf

[

Lzka

ifa

Layout

VVT

Board

Schematic

Diagram

CSL

Board

Layout

CSL

Board

Schematic

Diagram

PDB

Board

Layout

PDB

Board

Schematic

Diagram

RGA

and

RGB

Board

Layout

Schematic

Diagram

Board

Layout

Schematic

Diagram

RGC

and

RGD

Board

Layout

Schematic

Diagram

Board

Layout

Schematic

Diagram

Power

Supply

Wiring

(

Early

model

)

Power

Supply

Wiring

(

Late

model

)

•

SECTION

POWER

SUPPLY

INFORMATION

8.0

Overview

APR

5000

Series

Early

Power

Supply

Unit

8.1

Power

Supply

Sub

Chassis

for

Early

APR

5000

Units

8.1

Regulator

Board

(

RGA

)

8.1

Regulator

Board

(

RGB

)

8.1

Regulator

Board

(

RGC

)

8.1

Regulator

Board

(

RGD

)

New

Power

Supply

Unit

8.2

Power

Distribution

Board

8.2

Regulator

(

)

Board

8.2

Regulator

(

)

Board

8.1

8.2

APPENDIX

GLOSSARY

thru

•

APPENDIX

SERIAL

CONTROL

INFORMATION

BVE

900

and

BVE

9000

Operational

Guidelines

thru

APPENDIX

SMPTE

TIME

CODE

INFORMATION

Overview

Time

Code

Background

1.1

Time

Code

Types

and

Formats

1.2

SMPTE

Drop

Frame

1.3

The

Time

Code

Word

1.4

VITC

Time

Code

APPENDIX

APR

5000

SERIES

JUMPER

SWITCH

LOCATION

AND

FUNCTION

Overview

APR

5000

Jumpers

and

Switches

1.1

ACM

Board

1.2

ADM

Board

1.3

ALN

Board

1.4

CNL

Board

1.5

CNX

Board

1.6

CNX

Board

1.7

CPU

Board

1.8

CTM

Board

1.9

DSP

Board

1.10

FEX

Board

1.11

HES

Board

1.12

KBD

Board

1.13

MSB

Board

1.14

LNT

Board

1.15

MST

Board

(

Early

model

)

1.16

MST

Board

(

Late

model

)

1.17

RMD

Board

1.18

RTS

Board

1.19

SBR

Board

1.20

TCC

Board

1.21

TCM

Board

1.22

TIB

Board

1.23

TTS

Board

1.24

VVT

Board

1.25

CSL

Board

1.26

PDB

Board

1.27

Power

Supply

Regulator

Boards

APPENDIX

LNT

BOARD

BAUD

RATE

SELECTION

DIP

Switch

Settings

APPENDIX

TAPE

PATH

ADJUSTMENT

TUTORIAL

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