Texas Instruments DLP LightCrafter Dual DLPC900 Merkblatt

Preface

DLPU018–October 2014

Read This First

About This Manual

This document specifies the command and control interface to the DLPC900 controller and defines all

applicable commands, default settings, and control register bit definitions.

Related Documents from Texas Instruments

• DLPC900 Data Sheet. DLPS037

• DLP6500FLQ Data Sheet. DLPS040

• DLP6500FYE Data Sheet DLPS053

• DLP9000FLS Data Sheet. DLPS036

If You Need Assistance

See the DLP and MEMS TI E2E Community support forums.

LightCrafter is a trademark of Texas Instruments.

DLP is a registered trademark of Texas Instruments.

All other trademarks are the property of their respective owners.

DLPU018–October 2014 Read This First

DLPU018–October 2014

Interface Protocol

This chapter describes the interface protocol between the DLPC900 and a host processor. The DLPC900

supports two host interface protocols: I2C and USB 1.1 slave interfaces.

1 I2C Interface

The DLPC900 controller uses the I2C protocol to exchange commands and data with a host processor.

The I2C protocol is a two-wire serial data bus that conforms to the NXP I2C specification. One wire, SCL,

serves as a serial clock, while the second wire, SDA, serves as serial data. Several different devices can

be connected together in an I2C bus. Each device is software addressable by a unique address.

Communication between devices occurs in a simple master-to-slave relationship.

1.1 I2C Transaction Structure

All I2C transactions are composed of a number of bytes, combined in the following order:

START Condition, Slave Address Byte + R/W Bit, Sub-Address Byte, N-Data Bytes, STOP Condition

where N in "N-Data Bytes" varies based on the sub-address.

1.1.1 I2C START Condition

All I2C transactions begin with a START condition. A START condition is defined by a high-to-low

transition on the SDA line, followed by a high-to-low transition on the SCL line.

1.1.2 I2C STOP Condition

All I2C transactions end with a STOP condition. A STOP condition is defined by a low-to-high transition on

the SDA line, followed by a low-to-high transition on the SCL line.

1.1.3 DLPC900 Slave Address

The DLPC900 offers a programmable slave address. Refer to the App Defaults Settings found in the DLP®

LightCrafter™ 6500 & 9000 GUI Firmware tab to set a different slave address. The default I2C settings are

shown in Table 1. The Write Slave Address must be an even 7-bit address, and the Read Slave Address

must be the Write Slave Address plus 1.

Table 1. I2C Slave Settings

Addressing Default Write Address Default Read Address Maximum Clock Rate (kHz)

Mode

7-bit 0x34 0x35 400

1.1.4 DLPC900 Sub-Address and Data Bytes

The DLPC900 I2C sub-address corresponds to the byte address of the DLPC900 commands described in

Appendix A. Most I2C sub-addresses have a Read and Write command pair where the Write command

equals the Read command with the most significant bit set. For example, Table 2 and Table 4 shows the

Input Data Channel Swap sub-address command pair is (0x04,0x84), where the Write sub-address

command 0x84 is the Read sub-address command 0x04 with the most significant bit set. Each sub-

address command requires a certain number of data bytes, and each command is followed by variable

length data where the least significant byte is first for each parameter.

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SDA

SCL

0x34 0x04

START Slave Write Address Sub-addressACK ACK

SCL held low by

DLPC900 STOP

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I2C Interface

NOTE: The DLPC900 I2C command data is formatted with the least significant byte first for each

parameter in the data. This maintains the same format with the USB protocol. However, it

deviates from the DLPC350 I2C format where the most significant byte is first.

The DLPC900 internal command buffer has a maximum of 512 bytes and it is shared between the Read

and Write commands; therefore, whenever a Read command is executed it must be followed by I2C

operation with the Read Slave Address to retrieve the data otherwise the data will be overwritten by the

next command executed. See Section 1.2 for a Read command example.

1.2 Example I2C Read Command Sequence

To execute a command to read the Input Data Channel Swap setting, the host builds a sequence of bytes

containing the slave address, the sub-address, and the data (if any), and performing the following steps.

1. The host performs the required START condition followed by sending the sequence of bytes.

2. The DLPC900 will hold the SCL line low to indicate it is busy.

3. The host waits for the DLPC900 to release the SCL line.

4. Once the SCL line goes high, the host performs a STOP condition.

5. The host then performs a START condition followed by sending the Read Slave Address (0x35), and

then reads the required number of bytes and concluding with a STOP condition.

An example of the above read command sequence is shown in Table 2, and a waveform diagram of a

host executing this read sequence, is shown in Figure 1 and Figure 2.

Table 2. Read Command Sequence Example(1)

Slave Sub-address Data

Address

34 04

35 03

(1) All values shown are in HEX notation.

Figure 1. I2C Read Command Waveform Diagram

DLPU018–October 2014 Interface Protocol

SDA

SCL

0x35 0x03

START Slave Read Address DataACK ACK STOP

I2C Interface

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Figure 2. I2C Read Data Waveform Diagram

1.2.1 Read Command Example with Parameters

Some Read sub-address commands require a parameter(s) to be included in the sequence. For example,

the command in Section 3.6.1 has multiple GPIO to choose from. Therefore, the GPIO selection

parameter must be included in the Read byte sequence in order to retrieve the configuration for the GPIO

chosen. Table 3 shows the two I2C operations, where the first row contains the parameter data 06 which

indicates GPIO 6. The second row is the returned data of 06 03, where 06 was the chosen GPIO 6 and

has a configuration of 03.

Table 3. Read Command with Parameter Sequence Example(1)

Slave Sub-address Data

Address

34 44 06

35 06 03

(1) All values shown are in HEX notation.

1.3 Example I2C Write Command Sequence

To execute a command to set the Input Data Channel Swap value, the host builds a sequence of bytes

containing the slave address, the sub-address, and the data, and performing the following steps.

1. The host performs the required START condition followed by sending the sequence of bytes.

2. The host performs a STOP condition

An example of the above write command sequence is shown in Table 4, and a waveform diagram of a

host executing this write sequence, is shown in Figure 3.

Table 4. Write Command Sequence Example(1)

Slave Sub-address Data

Address

34 84 02

(1) All values shown are in HEX notation.

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Header Bytes

Report ID = 0 Flag Byte Sequence Byte Length LSB

Payload Bytes

USB Command

LSB MSB Data...

R/W Reply Error Reserved Destination

Byte 0 Byte 1 Byte 2 Byte 3 Byte 4 Bytes 5 ...N

USB Transaction Sequence

Bit 7 Bit 6 Bit 5 Bit 4:3 Bit 2:0

Length MSB

SDA

SCL

0x34 0x84

START Slave Write Address Sub-addressACK ACK STOP

0x02

Data ACK

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USB Interface

Figure 3. I2C Write Command Waveform Diagram

2 USB Interface

The DLPC900 controller also supports the USB 1.1 human interface device (HID) to exchange commands

and data with a host processor. The USB commands are variable length data packets that are sent with

the least significant byte first for each parameter.

2.1 USB Transaction Sequence

The USB 1.1 HID protocol has the structure shown in Figure 4. The host must build a stream of bytes that

consist of the Report ID, Header, and the payload. The following is a description of these three parts.

Report ID: The Report ID is always set to 0 and always the leading byte of all transfers.

Header: The header consists of four bytes.

1) Flag Byte as shown in Figure 4 and described in the Read and Write examples. Section 2.2

2) Sequence Byte. The sequence byte can be a rolling counter. It is used primarily when the host

wants a response from the DLPC900. The DLPC900 will respond with the same sequence byte that

the host sent. The host can then match the sequence byte from the command it sent with the

sequence byte from the DLPC900 response.

3) Length: Two byte length denotes the number of data bytes in the Payload only.

Payload Bytes: The payload bytes consists of the USB command followed by the data that is associated

with the command.

Figure 4. USB HID Protocol

DLPU018–October 2014 Interface Protocol

Header Bytes

Report ID = 0 0x00 0x17 0x4C

Payload Bytes

USB Command

0x12 0x20 0x12 0x83 ««««...

Byte 0 Byte 1 Byte 2 Byte 3 Byte 4 Bytes 5 - 64

Multiple USB Transaction Transfers

0x00

Payload Bytes

0x45 0xAE 0xF7 «««««««..0x3B 0x1D 0xC5

Bytes 66 - 83

Report ID = 0

Byte 65

First transfer

Second transfer

USB Interface

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During a Write operation, the host transmits the entire transaction sequence to the DLPC900, and the

DLPC900 performs the operation associated with the Write command. During a Read operation, the host

transmits the entire transaction sequence to the DLPC900, and the DLPC900 performs the operation

associated with the Read command. Therefore, both Write and Read transactions are considered "writes"

to the DLPC900 where the host performs an API level "Writefile" to the HID driver. The difference is when

the DLPC900 executes a Read operation, where the DLPC900 places the response into its internal buffer

and waits for the host to perform an API level "Readfile" to the HID driver and only then does the

DLPC900 transmits the response data back to the host.

The DLPC900 internal command buffer has a maximum of 512 bytes and it is shared between both the

Write and Read operations; therefore, whenever the host performs a Read operation, it must be followed

by the "Readfile" to the HID driver to get the response otherwise the response data will be overwritten by

the next Write or Read operation.

The HID protocol is limited to 64 byte transfers in both directions. Therefore, commands that are larger

than 64 bytes require multiple transfers. Whenever such a command is used, only the very first transfer

requires the Header and the USB Command. The Report ID is always the leading byte of all transfers.

Figure 5 shows an example of a Write command that contains 76 bytes and requires two transfers. Notice

that the first transfer contains 65 bytes, which is correct. The host hardware level HID driver will extract

the Report ID before transmitting or receiving the data over the USB bus.

Figure 5. USB Multi-Transfer Transaction

2.2 USB Read Transaction Sequence Example

To perform a Read operation on the DLPC900, the host must assemble a sequence of bytes that

corresponds to the command being used. The following Table 5 shows an example on how to read the

curtain color intensity of each color.

Table 5. Read Operation Example(1)

Report ID Sequence

Flag Byte Length(2) USB Command(2)

Byte Byte

00 C0 11 02 00 00 11

(1) All values shown are in HEX notation.

(2) LSB precedes the MSB for each parameter.

1. Report ID byte. Always set to 0.

2. Flag byte. Where:

• Bits 2:0 are set to 0x0 for regular DLPC900 operation.

• Bit 6 is set to 0x1 to indicate the host wants a reply from the device

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USB Interface

• Bit 7 is set to 0x1 to indicate a read transaction

3. Sequence byte: The sequence byte can be a rolling counter. It is used primarily when the host wants a

response from the DLPC900. The DLPC900 will respond with the same sequence byte that the host

sent. The host can then match the sequence byte from the command it sent with the sequence byte

from the DLPC900 response.

4. Length: Two byte length denotes the number of data bytes in the sequence and excludes the number

of bytes in steps 1 through 4. It denotes the total number of bytes sent in steps 5 (command bytes).

5. USB Command: Two byte USB command.

6. Once the host transmits the data over the USB interface, the DLPC900 will respond to the Read

operation by placing the response data in its internal buffer. The host must then perform a HID driver

read operation. Table 6 shows the response data sent back from the DLPC900.

(a) Report ID: Always set to 0.

(b) Flag byte: The same as was sent plus error bit. The host may check the error flag (bit 5) as follows.

(i) 0 = No errors.

(ii) 1 = Command not found or command failed.

response sequence byte.

(d) Length: Number of data bytes. The host must assemble the data according to the definition of the

command.

Table 6. Read Response Example(1)

Report ID Sequence

Flag Byte Length(2) Data(2)

Byte Byte

00 C0 11 06 00 FF 01 FF 01 FF 01

(1) All values shown are in HEX notation.

(2) LSB precedes the MSB for each parameter.

2.3 USB Write Transaction Sequence Example

To perform a Write operation on the DLPC900, the host must assemble a sequence of bytes that

corresponds to the command being used. The following Table 7 shows an example on how to set the

curtain color intensity of each color to 511.

Table 7. Write Operation Example(1)

Report ID Flag Sequence Length(2) USB Command(2) Data(2)

Byte Byte Byte

00 00 12 08 00 00 11 FF 01 FF 01 FF 01

(1) All values shown are in HEX notation.

(2) LSB precedes the MSB for each parameter.

1. Report ID byte. Always set to 0.

2. Flag byte. Where :

• Bits 2:0 are set to 0x0 for regular DLPC900 operation.

• Bit 6 is set to 0x0 to indicate the host does not want a reply from the device. This bit is set to 0x1

only if a reply is needed, which is usually not required.

• Bit 7 is set to 0x0 to indicate a write transaction

3. Sequence byte: The sequence byte can be a rolling counter. It is used primarily when the host wants a

response from the DLPC900. Normally during a write operation, the DLPC900 does not respond;

however, the host can continue to increment the sequence byte for the next command operation.

4. Length: Two byte length denotes the number of data bytes in the sequence and excludes the number

of bytes in steps 1 through 4. It denotes the total number of bytes sent in steps 5 (command bytes)

and 6 (data bytes).

DLPU018–October 2014 Interface Protocol

USB Interface

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5. USB Command: Two byte USB command.

6. Data: The data appropriate to the command.

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DLPU018–October 2014

DLPC900 Control Commands

This chapter lists the DLPC900 control commands.

The following sections list the supported control commands of the DLPC900. In the Type column, ‘wr’ type

is writeable field through I2C or USB write transactions. Data can also be read through I2C or USB read

transactions for ‘wr’ type bits. Type ris read-only. Write transactions to read-only fields are ignored.

The Reset column in all of the following command tables is the default value after power up. These values

may be overwritten after power up.

NOTE: Reserved bits and registers. When writing to valid command bit fields, all bits marked as

unused or reserved should be set to 0, unless specified otherwise.

NOTE: Momentary Image Corruption During Command Writes. Certain commands may cause

brief visual artifacts in the display image under some circumstances. Command data values

may always be read without impacting displayed image. To avoid momentary image

corruption due to a command, disable the LEDs prior to the command write, then reenable

the LEDs after all commands have been issued.

NOTE: Writing or reading from undocumented registers is NOT recommended.

1 DLPC900 Status Commands

The DLPC900 has the following set of status commands:

Hardware Status

System Status

Main Status

Retrieve Firmware Version

Read Error Codes

1.1 Hardware Status

The Hardware Status command provides status information on the DLPC900's sequencer, DMD

controller, and initialization.

Command

I2C USB

Read 0x1A0A

0x20

DLPU018–October 2014 DLPC900 Control Commands

DLPC900 Status Commands

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Table 8. Hardware Status Command Definition

BYTE BITS DESCRIPTION RESET TYPE

Internal Initialization

0 0 = Error d1 r

1 = Successful

0 = No Error

1 d0 r

1 = Incompatible Controller or DMD

DMD Reset Controller Error

0 = No error has occurred

2 d0 r

1 = Multiple overlapping bias or reset operations are accessing the same

DMD block.

Forced Swap Error

3 0 = No error has occurred. d0 r

01 = Forced Swap Error occurred.

0 = No Slave Controller Present

4(1) d0 r

1 = Slave Controller Present and Ready

5 Reserved d0 r

Sequencer Abort Status Flag

6 0 = No error has occurred d0 r

1 = Sequencer has detected an error condition that caused an abort

Sequencer Error

7 0 = No error has occurred. d0 r

1 = Sequencer detected an error.

(1) When the DLPC900 is combined with a DLP6500, this bit will be 0. When two DLPC900 controllers are combined with a

DLP9000, this bit must be 1 for proper operation. If the bit is 0 and the DLPC900 is combined with a DLP9000, indicates a

malfunction in one or both controllers.

NOTE: Any error condition indicates a fault condition and it must be corrected.

1.2 System Status

The System Status command provides DLPC900 status on internal memory tests.

Command

I2C USB

Read 0x1A0B

0x21

Table 9. System Status Command Definition

BYTE BITS DESCRIPTION RESET TYPE

Internal Memory Test

0 0 = Internal Memory Test failed d1 r

01 = Internal Memory Test passed

1:7 Reserved d0 r

1.3 Main Status

The Main Status command provides the status of DMD park and DLPC900 sequencer, frame buffer, and

gamma correction.

10 DLPC900 Control Commands DLPU018–October 2014

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