Transcend CompactFlash CF 300X Bedienungsanleitung

300X CompactFlash Card

Transcend Information Inc.

V1.1

Description

The Transcend CF 300X is a High Speed Compact

Flash Card with high quality Flash Memory assembled

on a printed circuit board.

Placement

Features

•CompactFlash Specification Version 4.1 Complaint

•RoHS compliant products

•Single Power Supply: 3.3V

5% or 5V

10%

•Operating Temperature: -25

C to 85

•Storage Temperature: -40

C to 85

•Operation Modes:



PC Card Memory Mode



PC Card IO Mode



True IDE Mode

•True IDE Mode supports:

 Ultra DMA Mode 0 to Ultra DMA Mode 5 (Ultra DMA

mode 5 must use Power supply: 3.3V)

 MultiWord DMA Mode 0 to MultiWord DMA Mode 4

 PIO Mode 0 to PIO Mode 6

•PC Card Mode supports up to Ultra DMA Mode 5

•True IDE mode: Fixed Disk (Standard)

•PC Card Mode: Removable Disk (Standard)

•Durability of Connector: 10,000 times

•Support S.M.A.R.T (Self-defined)

•Support Security Command

•

Support Wear-Leveling to extend product life

•Compliant to CompactFlash, PC Card Mode, and ATA

standards

Dimensions

300X CompactFlash Card

Transcend Information Inc.

V1.1

Transcend

300X CompactFlash Card

Transcend Information Inc.

V1.1

Block Diagram

300X CompactFlash Card

Transcend Information Inc.

V1.1

Pin Assignments and Pin Type

PC Card Memory Mode PC Card I/O Mode True IDE Mode

Num

Signal

Name

Type

In, Out Type

Pin Num

Signal

Name

Type

In, Out

Type

Num

Signal

Name

Type

In, Out

Type

1 GND

Ground 1 GND

Ground

1 GND

Ground

2 D03 I/O I1Z, OZ3 2 D03 I/O I1Z, OZ3

2 D03 I/O I1Z, OZ3

3 D04 I/O I1Z, OZ3 3 D04 I/O I1Z, OZ3

3 D04 I/O I1Z, OZ3

4 D05 I/O I1Z, OZ3 4 D05 I/O I1Z, OZ3

4 D05 I/O I1Z, OZ3

5 D06 I/O I1Z, OZ3 5 D06 I/O I1Z, OZ3

5 D06 I/O I1Z, OZ3

6 D07 I/O I1Z, OZ3 6 D07 I/O I1Z, OZ3

6 D07 I/O I1Z, OZ3

7 -CE1 I I3U 7 -CE1 I I3U 7 -CS0 I I3Z

8 A10 I I1Z 8 A10 I I1Z 8 A10

I I1Z

9 -OE I I3U 9 -OE I I3U 9 -ATA SEL

I I3U

A09 I I1Z 10 A09 I I1Z 10 A09

I I1Z

A08 I I1Z 11 A08 I I1Z 11 A08

I I1Z

A07 I I1Z 12 A07 I I1Z 12 A07

I I1Z

VCC

Power 13 VCC

Power

13 VCC

Power

A06 I I1Z 14 A06 I I1Z 14 A06

I I1Z

A05 I I1Z 15 A05 I I1Z 15 A05

I I1Z

A04 I I1Z 16 A04 I I1Z 16 A04

I I1Z

A03 I I1Z 17 A03 I I1Z 17 A03

I I1Z

A02 I I1Z 18 A02 I I1Z 18 A02 I I1Z

A01 I I1Z 19 A01 I I1Z 19 A01 I I1Z

A00 I I1Z 20 A00 I I1Z 20 A00 I I1Z

D00 I/O I1Z, OZ3 21 D00 I/O I1Z, OZ3

21 D00 I/O I1Z, OZ3

D01 I/O I1Z, OZ3 22 D01 I/O I1Z, OZ3

22 D01 I/O I1Z, OZ3

D02 I/O I1Z, OZ3 23 D02 I/O I1Z, OZ3

23 D02 I/O I1Z, OZ3

WP O OT3 24 -IOIS16

O OT3 24 -IOCS16

O ON3

-CD2 O Ground 25 -CD2 O Ground

25 -CD2 O Ground

-CD1 O Ground 26 -CD1 O Ground

26 -CD1 O Ground

D11

I/O

I1Z, OZ3 27 D11

I/O

I1Z, OZ3

27 D11

I/O

I1Z, OZ3

D121 I/O

I1Z, OZ3 28 D12

I/O

I1Z, OZ3

28 D12

I/O

I1Z, OZ3

D13

I/O

I1Z, OZ3 29 D13

I/O

I1Z, OZ3

29 D13

I/O

I1Z, OZ3

D14

I/O

I1Z, OZ3 30 D14

I/O

I1Z, OZ3

30 D14

I/O

I1Z, OZ3

D15

I/O

I1Z, OZ3 31 D15

I/O

I1Z, OZ3

31 D15

I/O

I1Z, OZ3

-CE2

I I3U 32 -CE2

I I3U 32 -CS1

I I3Z

-VS1 O Ground 33 -VS1 O Ground

33 -VS1 O Ground

300X CompactFlash Card

Transcend Information Inc.

V1.1

PC Card Memory Mode PC Card I/O Mode True IDE Mode

Num

Signal Name

Type

In, Out

Type

Num

Signal Name

Type

In, Out

Type

Num

Signal Name

Type

In, Out

Type

-IORD

HSTROBE

-IORD

HSTROBE

HDMARDY

I I3U 34

-IORD

HSTROBE

-HDMARDY

I I3U 34

-HDMARDY

I I3Z

-IOWR -IOWR -IOWR

STOP

10,11

I I3U 35

STOP

10,11

I I3U 35

STOP

8,9

I I3Z

-WE I I3U 36 -WE I I3U 36 -WE

I I3U

READY O OT1 37 -IREQ O OT1 37 INTRQ O OZ1

VCC Power

38 VCC Power

-CSEL

I I2Z 39 -CSEL

I I2Z 39 -CSEL I I2U

-VS2 O OPEN

40 -VS2 O OPEN

RESET I I2Z 41 RESET I I2Z 41 -RESET I I2Z

-WAIT -WAIT IORDY

ON1

-DDMARDY

DSTROBE

O OT1 42

DSTROBE

O OT1 42

DSTROBE

O OT1

-INPACK -INPACK

-DMARQ

O OT1 43

-DMARQ

O OT1 43 DMARQ O OZ1

-REG I I3U 44 -REG

-DMACK

DMACK

I I3U 44 -DMACK

I I3U

BVD2 O OT1 45 -SPKR O OT1 45 -DASP I/O I1U, ON1

BVD1 O OT1 46 -STSCHG O OT1 46 -PDIAG I/O I1U, ON1

D08

I/O

I1Z,

OZ3 47 D08

I/O

I1Z,

OZ3 47 D08

I/O

I1Z, OZ3

D09

I/O

I1Z,

OZ3 48 D09

I/O

I1Z,

OZ3 48 D09

I/O

I1Z, OZ3

D10

I/O

I1Z,

OZ3 49 D10

I/O

I1Z,

OZ3 49 D10

I/O

I1Z, OZ3

GND Ground

50 GND Ground

Note: 1) These signals are required only for 16 bit accesses and not required when installed in 8 bit systems. Devices should allow for 3-state

signals not to consume current.

2) The signal should be grounded by the host.

3) The signal should be tied to VCC by the host.

4) The mode is required for CompactFlash Storage Cards.

5) The -CSEL signal is ignored by the card in PC Card modes. However, because it is not pulled upon the card in these modes,

it should not be left floating by the host in PC Card modes. In these modes, the pin should be connected by the host to PC

Card A25 or grounded by the host.

6) If DMA operations are not used, the signal should be held high or tied to VCC by the host. For proper operation in older hosts: while DMA

operations are not active, the card shall ignore this signal,including a floating condition

7) Signal usage in True IDE Mode except when Ultra DMA mode protocol is active.

8) Signal usage in True IDE Mode when Ultra DMA mode protocol DMA Write is active.

9) Signal usage in True IDE Mode when Ultra DMA mode protocol DMA Read is active.

10) Signal usage in PC Card I/O and Memory Mode when Ultra DMA mode protocol DMA Write is active.

11) Signal usage in PC Card I/O and Memory Mode when Ultra DMA mode protocol DMA Read is active.

12) Signal usage in PC Card I/O and Memory Mode when Ultra DMA protocol is active.

300X CompactFlash Card

Transcend Information Inc.

V1.1

Signal Description

Signal Name

Dir.

Description

A10 – A00

(PC Card Memory Mode)

A10 – A00

(PC Card I/O Mode)

A02 - A00

(True IDE Mode)

8,10,11,12,

14,15,16,17,

18,19,20

These address lines along with the -REG signal are used to

select the following:

The I/O port address registers within the CompactFlash Storage Card , the

memory mapped

port address registers within the CompactFlash Storage Card,

a byte in the card's information structure and its configuratio

n control and status

registers.

This signal is the same as the PC Card Memory Mode signal.

In True IDE Mode, only A[02:00] are used to select the one of eight registers

in the Task File, the remaining address lines should be grounded by the

host.

BVD1

(PC Card Memory Mode)

-STSCHG

(PC Card I/O Mode)

Status Changed

-PDIAG

(True IDE Mode)

I/O

46 This signal is asserted high, as BVD1 is not supported.

This signal is asserted low to alert the host to changes in the

READY and Write

Protect states, while the I/O interface is configured. Its use is controlled by the

Card Config and Status Register.

In the True IDE Mode, this input / output is the Pass Diagnostic signal in the

Master / Slave handshake protocol.

BVD2

(PC Card Memory Mode)

-SPKR

(PC Card I/O Mode)

-DASP

(True IDE Mode)

I/O

45 This signal is asserted high, as BVD2 is not supported.

This line is the Binary Audio output from the card. If the Card does not support

the Binary Audio function, this line should be held negated.

In the True IDE Mode, this input/output is the Disk Active/Slave

Present signal in

the Master/Slave handshake protocol.

-CD1, -CD2

(PC Card Memory Mode)

-CD1, -CD2

(PC Card I/O Mode)

-CD1, -CD2

(True IDE Mode)

26,25 These Card Detect pins are connected to ground on the

CompactFlash Storage

Card. They are used by the host to determine that the CompactFlash Storage

Card is fully inserted into its socket.

This signal is the same for all modes.

300X CompactFlash Card

Transcend Information Inc.

V1.1

Signal Name

Dir.

Description

-CE1, -CE2

(PC Card Memory Mode)

Card Enable

-CE1, -CE2

(PC Card I/O Mode)

Card Enable

-CS0, -CS1

(True IDE Mode)

7,32 These input signals are used both to select the card and to indicate to the card

whether a byte or a word operation is being performed. -CE2 always accesses

the odd byte of the word.-CE1 accesses the even byte or the Odd byte of the

word depending on A0 and -CE2. A multiplexing scheme based on A0,-CE1,

-CE2 allows 8 bit hosts to access all data on D0-D7. See Table 27, Table 29,

Table 31, Table 35, Table 36 and Table 37.

This signal is the same as the PC Card Memory Mode signal.

In the True IDE Mode, -CS0 is the address range select for the task file

registers while -CS1 is used to select the Alternate Status Register and the

Device Control Register.

While –DMACK is asserted, -CS0 and –CS1 shall be held negated and the

width of the transfers shall be 16 bits.

-CSEL

(PC Card Memory Mode)

-CSEL

(PC Card I/O Mode)

-CSEL

(True IDE Mode)

39 This signal is not used for this mode, but should be connected by

the host to PC

Card A25 or grounded by the host.

This signal is not used for this mode, but should be connected by

the host to PC

Card A25 or grounded by the host.

This internally pulled up signal is used to configure this device as

a Master or a

Slave when configured in the True IDE Mode.

When this pin is grounded, this device is configured as a Master.

When the pin is open, this device is configured as a Slave.

D15 - D00

(PC Card Memory Mode)

D15 - D00

(PC Card I/O Mode)

D15 - D00

(True IDE Mode)

I/O

31,30,29,28,

27,49,48,47,

6,5,4,3,2,

23, 22, 21

These lines carry the Data, Commands and Status information

between the host

and the controller. D00 is the LSB of the Even

Byte of the Word. D08 is the LSB

of the Odd Byte of the Word.

This signal is the same as the PC Card Memory Mode signal.

In True IDE Mode, all Task File operations occur in byte mode

on the low order

bus D[7:0] while all data transfers are 16 bit using D[15:0].

GND

(PC Card Memory Mode)

GND

(PC Card I/O Mode)

GND

(True IDE Mode)

1,50 Ground.

This signal is the same for all modes.

300X CompactFlash Card

Transcend Information Inc.

V1.1

Signal Name

Dir.

Description

-INPACK

(PC Card Memory Mode except

Ultra DMA Protocol Active)

-INPACK

(PC Card I/O Mode except Ultra

DMA Protocol Active)

Input Acknowledge

-DMARQ

(PC Card Memory Mode -Ultra

DMA Protocol Active)

-DMARQ

(PC Card I/O Mode -Ultra DMA

Protocol Active)

DMARQ

(True IDE Mode)

43 This signal is not used in this mode.

The Input Acknowledge signal is asserted by the CompactFlash Storage Card

when the card is selected and responding to an I/O read cycle at the address

that is on the address bus. This signal is used by the host to control the enable

any input data buffers between the CompactFlash Storage Card and the CPU.

Hosts that support a single socket per interface logic, such as for Advanced

Timing Modes and Ultra DMA operation may ignore the –INPACK signal from

the device and manage their input buffers based solely on Card Enable signals.

This signal is a DMA Request that is used for DMA data

transfers between host

and device. It shall be asserted by the

device when it is ready to transfer data to

or from the host. For Multiword DMA transfers, the direction of data transfer is

controlled by -IORD and -IOWR. This signal is used in a

handshake manner with

(-)DMACK, i.e., the device shall wait until the host asserts (-)DMACK before

negating (-)DMARQ, and re-asserting (-)DMARQ if there is more data to

transfer.

In PCMCIA I/O Mode, the

DMARQ shall be ignored by the host

while the host is

performing an I/O Read cycle to the device. The host shall not initiate an I/O

Read cycle while

DMARQ is asserted by the device.

In True IDE Mode, DMARQ shall not be driven when the device

is not selected in

the Drive-Head register.

While a DMA operation is in progress, -CS0 (-CE1)and -CS1 (-CE2) shall be

held negated and the width of the transfers shall be 16 bits.

If there is no hardware support for True IDE DMA mode in the host, this output

signal is not used and should not be connected at the host. In this case, the

BIOS must report that DMA mode is not supported by the host so that device

drivers will not attempt DMA mode operation.

A host that does not support DMA mode and implements both

PC Card and True

IDE modes of operation need not alter the PC Card mode connections while in

True IDE mode as long as this does not prevent proper operation in any mode.

-IORD

(PC Card Memory Mode except

Ultra DMA Protocol Active)

-IORD

(PC Card I/O Mode except Ultra

DMA Protocol Active)

-IORD

(True IDE Mode – Except Ultra

DMA Protocol Active)

-HDMARDY

(All Modes - Ultra DMA Protocol

DMA Read)

HSTROBE

(All Modes - Ultra DMA Protocol

DMA Write)

34 This signal is not used in this mode.

This is an I/O Read strobe generated by the host. This signal

gates I/O data onto

the bus from the CompactFlash Storage

Card when the card is configured to use

the I/O interface.

In True IDE Mode, while Ultra DMA mode is not active, this

signal has the same

function as in PC Card I/O Mode.

In all modes when Ultra DMA mode DMA Read is active, this

signal is asserted

by the host to indicate that the host is ready to receive Ultra DMA data-

in bursts.

The host may negate – HDMARDY to pause an Ultra DMA transfer.

In all modes when Ultra DMA mode DMA Write is active, this signal is the data

out strobe generated by the host. Both the

rising and falling edge of HSTROBE

cause data to be latched by the device. The host may stop generating

HSTROBE edges to pause an Ultra DMA data-out burst.

300X CompactFlash Card

Transcend Information Inc.

V1.1

Signal Name

Dir.

Description

-IOWR

(PC Card Memory Mode– Except

Ultra DMA Protocol Active)

-IOWR

(PC Card I/O Mode –

Except Ultra

DMA Protocol Active)

-IOWR

(True IDE Mode – Except Ultra

DMA Protocol Active)

STOP

(All Modes – Ultra DMA Protocol

Active)

35 This signal is not used in this mode.

The I/O Write strobe pulse is used to clock I/O data on the Card Data bus into

the CompactFlash Storage Card controller registers when the CompactFlash

Storage Card is configured to use the I/O interface.

The clocking shall occur on the negative to positive edge of the signal (trailing

edge).

In True IDE Mode, while Ultra DMA mode protocol is not active, this signal has

the same function as in PC Card I/O Mode. When Ultra DMA mode protocol is

supported, this signal must be negated before entering Ultra DMA mode

protocol.

In All Modes, while Ultra DMA mode protocol is active, the

assertion of this signal

causes the termination of the Ultra DMA data burst.

-OE

(PC Card Memory Mode)

-OE

(PC Card I/O Mode)

-ATA SEL

(True IDE Mode)

9 This is an Output Enable strobe generated by the host interface. It is used to

read data from the CompactFlash Storage Card in Memory Mode and to read

the CIS and configuration registers.

In PC Card I/O Mode, this signal is used to read the CIS and configuration

registers.

To enable True IDE Mode this input should be grounded by the host.

READY

(PC Card Memory Mode)

-IREQ

(PC Card I/O Mode)

INTRQ

(True IDE Mode)

37 In Memory Mode, this signal is set high when the CompactFlash Storage Card

ready to accept a new data transfer operation and is held low when the card is

busy.

At power up and at Reset, the READY signal is held low (busy) until the

CompactFlash Storage Card has completed its power up or reset function. No

access of any type should be made to the CompactFlash Storage Card during

this time.

Note, however, that when a card is powered up and used with RESET

continuously disconnected or asserted, the Reset function of the RESET pin is

disabled. Consequently, the

continuous assertion of RESET from the application

of power shall not cause the READY signal to remain continuously in the busy

state.

I/O Operation – After the CompactFlash Storage Card Card has been

configured for I/O operation, this signal is used as -

Interrupt Request. This line is

strobed low to generate a pulse mode interrupt or held low for a level mode

interrupt.

In True IDE Mode signal is the active high Interrupt Request to the host.

300X CompactFlash Card

Transcend Information Inc.

V1.1

Signal Name

Dir.

Description

-REG

(PC Card Memory Mode– Except

Ultra DMA Protocol Active)

Attribute Memory Select

-REG

(PC Card I/O Mode –

Except Ultra

DMA Protocol Active)

This signal is used during Memory Cycles to distinguish between Common

Memory and Register (Attribute) Memory accesses.

High for Common Memory,

Low for Attribute Memory.

In PC Card Memory Mode, when Ultra DMA Protocol is supported by the host

and the host has enabled Ultra DMA

protocol on the card the, host shall keep the

-REG signal negated during the execution of any DMA Command by the device.

The signal shall also be active (low) during I/O Cycles when the

I/O address is on

the Bus.

In PC Card I/O Mode, when Ultra DMA Protocol is supported by

the host and the

host has enabled Ultra DMA protocol on the card the, host shall keep the -

REG

signal asserted during the execution of any DMA Command by the device.

-DMACK

(PC Card Memory Mode when

Ultra DMA Protocol Active)

DMACK

(PC Card I/O Mode when Ultra

DMA Protocol Active)

-DMACK

(True IDE Mode)

This is a DMA Acknowledge signal that is asserted by the host in response to

(-)DMARQ to initiate DMA transfers.

In True IDE Mode, while DMA operations are not active, the card

shall ignore the

(-)DMACK signal, including a floating condition.

If DMA operation is not supported by a True IDE Mode only host, this signal

should be driven high or connected to VCC by the host.

A host that does not support DMA mode and implements both PC Card and

True-IDE modes of operation need not alter the PC Card mode connections

while in True-IDE mode as long as this does not prevent proper operation all

modes.

RESET

(PC Card Memory Mode)

RESET

(PC Card I/O Mode)

-RESET

(True IDE Mode)

41 The CompactFlash Storage Card is Reset when the

RESET pin is high with the

following important exception:

The host may leave the RESET pin open or keep it continually high from the

application of power without causing a continuous Reset of the card. Under

either of these conditions, the card shall emerge from power-up having

completed an initial Reset.

The CompactFlash Storage Card is also Reset when the Soft Reset bit in the

Card Configuration Option Register is set.

This signal is the same as the PC Card Memory Mode signal.

In the True IDE Mode, this input pin is the active low hardware reset from the

host.

VCC

(PC Card Memory Mode)

VCC

(PC Card I/O Mode)

VCC

(True IDE Mode)

13,38 +5 V, +3.3 V power.

This signal is the same for all modes.

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