IBM 5-1/4" Diskette Drive Adapter Anwendungshandbuch

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Personal Computer

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Hardware Reference

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Library

5-1/4" Diskette

Drive

Adapter

6361505

Contents

Description

....................................

Programming Considerations

......................

Digital-Output Register

......................

Floppy Disk Controller

.......................

Command Summary

.........................

Programming Summary

......................

Interface

.....................................

System

I/O

Channel Interface

................

Drive A and B Interface

.....................

Specifications

.................................

Logic Diagrams

................................

Description

The IBM

5-1/4"

Diskette Drive Adapter fits into one of the

expansion slots in the system unit.

connected to one or two

diskette drives through an internal, daisy-chained flat cable. The

adapter has a connector

the other end that extends through the

rear panel of the system unit. This connector has signals for two

additional external diskette drives; thus, the

5-1/4

inch diskette

drive adapter can attach four

5-1/4

inch drives -two internal

and two external.

The adapter

designed for double-density, MFM-coded, diskette

drives and uses write precompensation with an analog phase-lock

loop for clock and

data

recovery. The adapter

general-purpose device using the

NEe

fLPD765

or equivalent

controller. Therefore, the diskette drive parameters are

programmable. In addition, the attachment supports the diskette

drive's write-protect feature. The adapter

buffered

the

I/O

bus and uses the system board's direct memory access (DMA) for

record data transfers.

interrupt level also

used to indicate

when an operation

complete and that a status condition requires

microprocessor attention.

In general, the

5-1/4

inch diskette drive adapter presents a

high-level command interface to software

I/O

drivers.

Diskette Adapter 1

t:::'

('!)

...

--A

Buffer

hr-v

INTR.

J..-

)

ti>-l

Clock

::i. :;J"

f---C>

and

...

Write Write

Data

(l)

......,

Precompensate

Timing

AJ"

Circuit

----

C;"u;,

..,

0..0

:;;

1 ~

S·

r--.

...

~(JQ

Write

......

"'--

I---

til

lJata

...

Read

Data

..,

Data

f-----,

....-

<J---

VCO

SYNC

Separator

I-----,

0'"

STD.

DATA

..-.

()

I""I"Data

Window

:;.;"

I"'"

0..

......

NEC

Step

..,

Floppy

(JQ

>-;

Direction

Disk

Controller

""J../

Write

Enable

Head

Select

......,

-V

Index

.....

:;J"

I"'"

Write

Protect

(l)

...r.

I"'"

Track

-"<""1

tt:I

I"'"

Drive

Motor

iRes~t

f--B

.........

Digital

f--C

.j::o.

Control

Decoder

f--

Drive

Select

Port

......

til

f--C

:;.;"

r-D

(l)

.....

(l)

5-1/4Inch Diskette Drive Adapter Block Diagram

) )

Programming Considerations

This attachment consists of an 8-bit digital output register in

parallel with a

NEC

JLPD765

or equivalent floppy disk controller

(FDC).

In the following description, drive numbers 0,

2, and 3 are

equivalent to drives A, B, C, and D.

Digital-Output Register

The Digital-Output register (DOR)

output-only register used

to control drive motors, drive selection, and feature enable. All

bits are cleared

the

0 interface 'reset' line. The bits have the

following functions:

Bits 0 and 1 These bits are decoded

the hardware to

select one drive if its motor

on:

Bit 1 0 Drive

(A)

(B)

(C)

1 1 3

(D)

Bit 2 The

FDC

held reset when this bit

clear.

must be set by the program to enable the

FDC.

Bit 3 This bit allows the

FDC

interrupt and

DMA

requests to be gated onto the

I/O

interface.

this bit

cleared, the interrupt and

DMA

request

I/O

interface drivers are disabled.

Bits

4,5,6,

These bits control, respectively, the motors of

and 7 drives 0,

1,2

(A,

C), and 3 (D).

a bit

clear, the associated motor

off, and the

drive cannot be selected.

Diskette Adapter 3

Floppy

Disk

Controller

The

floppy disk controller

(FDC)

contains two registers

that

may

be accessed

the system unit's microprocessor: a status register

and

data

The

8-bit main status register contains the

status information

the

FDC

and

may be accessed at any time.

The

8-bit

data

several registers in a

stack with only one register presented

the

data

bus

a time)

stores data, commands, parameters,

and

provides floppy disk

drive

(FDD)

status information.

Data

bytes are read from

written

the

data

order

program

obtain results

after

a particular command.

The

main status register

can

only

read

and

used to facilitate the transfer

data

between

the

system unit's microprocessor

and

FDC.

The

bits in

the

main status register (hex

34F)

are defined as

follows:

Bit

Number

Name

Symbol

Description

DBO

FDD A Busy

DAB

FDD

number

0 is in

the

Seek

mode.

DB1

FDD B Busy DBB FDD

number

1 is in

the

Seek

mode.

DB2 FDD C Busy DCB FDD

number

2 is in

the

Seek

mode.

DB3 FDD D Busy DDB FDD

number

the

Seek

mode.

DB4

FDC Busy CB A read or

write

command

is in process.

DB5

Non-DMA

NDM

The

FDC is in

the

non-DMA

mode.

Mode

DB6 Data

Inputl

DIO

Indicates

direction

data

transfer

Output

between

FDC and

processor.

DIO =

"1;'

then

transfer

from

FDC

data

the

processor.

DIO =

"0;'

then

transfer

from

the

processor

FDC

data

DB7 Request

for

ROM

Indicates

data

send

Master

receive

data

from

the

processor.

Both

bits

DIO and ROM

should

be used

perform

the

handshaking

functions

"ready"

and

"direction"

the

processor.

The

FOe

capable of performing

different commands.

Each

command

initiated by a multi-byte transfer from the system

unit's microprocessor,

and

the result after execution of the

command may also be a multi-byte transfer back to the system

4 Diskette Adapter

unit's microprocessor. Because

this multi-byte interchange of

information between the

FDC

and the system unit's

microprocessor, it

convenient to consider each command as

consisting of three phases:

Command Phase

The

FDC

receives all information required to perform a particular

operation from the system unit's microprocessor,

Execution Phase

The

FDC

performs the operation it was instructed to do.

Result Phase

After completion of the operation, status and other housekeeping

information are made available to the system unit's

microprocessor,

The following tables define the symbols used in the command

summary. The command summary immediately follows these

tables,

Diskette Adapter 5

Symbol

Name

Address

Line 0

Cylinder

Number

D Data

D7-DO Data Bus

DTL Data Length

EDT End

Track

GPL Gap

Length

H Head

Address

HD Head

HLT Head Load

Time

HUT

Head Unload

Time

MFM

Mode

Multi-Track

Number

Description

controls

selection

main

status

data register (AO =1

stands

for

the

current/selected

cylinder

(track)

number

the

medium.

stands

for

the

data

pattern

that

is going

written

into

sector.

8-bit

data bus,

where

stands

for

most

significant

bit, and

stands

for

least

significant

bit.

When

N is defined as

00,

DTL

stands

for

the

data

length

that

users are going

read

from

write

the

sector.

EDT

stands

for

the

final

sector

number

a cylinder.

GPL

stands

for

the

length

gap

(spacing

between

sectors

excluding

VCO

sync

field).

stands

for

head

number

1, as

specified in

field.

stands

for

a selected head

number

=HD in all

command

words).

HLT

stands

for

the

head load

time

the

FDD (4

512

4·ms

increments).

HUT

stands

for

the

head unload

time

after

a read

write

operation has occurred

480

32-ms

increments).

low,

mode

is selected;

ifit

high,

MFM

mode

is selected

only

MFM

implemented.

is high, a

multi-track

operation is

performed.

cylinder

under

both

HDO

and HD1

will

be read

written.)

stands

for

the

number

data

bytes

written

in a sector.

Symbol Descriptions (Part 1

6 Diskette Adapter

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