Texas Instruments DRV603EVM Bedienungsanleitung

User's GuideSLOU252A – December 2008 – Revised January 2009

DRV603EVM

This user’s guide describes the operation of the DRV603 evaluation module. This document also providesmeasurement data and design information including a schematic, bill of materials, and printed circuit board(PCB) layout drawings.

Contents1 Overview ...................................................................................................................... 22 Quick Setup................................................................................................................... 33 On/Off Sequence ............................................................................................................ 44 Component Selection ....................................................................................................... 55 Layout Recommendations .................................................................................................. 66 DRV603EVM Performance ................................................................................................. 67 Related Documentation from Texas Instruments ...................................................................... 158 Design Documentation .................................................................................................... 15

List of Figures

1 DRV603EVM Functional Block Diagram .................................................................................. 32 Power-Up/-Down Sequence ................................................................................................ 43 Differential Input, Second-Order, Active Low-Pass Filter ............................................................... 54 THD+N versus Voltage (Analog Input) .................................................................................... 85 THD+N versus Voltage (Digital Input) ..................................................................................... 86 THD+N versus Frequency (Analog Input) ................................................................................ 97 THD+N versus Frequency (Digital Input, 0 dBFS) ...................................................................... 98 FFT Spectrum with –60-dBFS Tone (Analog Input) ................................................................... 109 FFT Spectrum with –60-dBFS Tone (Digital Input) .................................................................... 1010 Idle Noise FFT Spectrum (Analog Input) ................................................................................ 1111 Idle Noise FFT Spectrum (Digital Input) ................................................................................. 1112 Channel Separation (Analog Input) ...................................................................................... 1213 Channel Separation (Digital Input) ....................................................................................... 1214 Frequency Response (Analog Input) .................................................................................... 13DirectPath is a trademark of Texas Instruments.Blu-ray Disc is a trademark of Blu-ray Disc Association.TOSLINK is a trademark of Toshiba Corporation.All other trademarks are the property of their respective owners.

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1 Overview

Overview

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15 Frequency Response (Digital Input) ..................................................................................... 1316 Pop/Click (Enable) ......................................................................................................... 1417 Pop/Click (Disable) ......................................................................................................... 1418 DRV603EVM Schematic: DRV603 ....................................................................................... 1519 DRV603EVM Schematic: Digital-to-Analog Converter and Source Select ......................................... 1620 DRV603EVM Schematic: S/PDIF Receiver ............................................................................. 1621 DRV603EVM Schematic: TOSLINK and Power Supply .............................................................. 1722 DRV603EVM PCB Component Placement ............................................................................. 2023 DRV603EVM PCB Top Layer ............................................................................................ 2124 DRV603EVM PCB Bottom Layer ........................................................................................ 21

List of Tables

1 Key Parameters .............................................................................................................. 32 Recommended Supply Voltage ............................................................................................ 43 DRV603EVM Filter Specifications ......................................................................................... 64 General Test Conditions .................................................................................................... 65 Electrical Data ................................................................................................................ 76 Audio Performance Analog Input .......................................................................................... 77 Audio Performance Digital Input ........................................................................................... 78 Physical Specifications ...................................................................................................... 79 Related Documentation.................................................................................................... 1510 Bill of Materials ............................................................................................................. 1811 PCB Specifications ......................................................................................................... 19

The DRV603EVM customer evaluation module (EVM) demonstrates the capabilities and operation of theDRV603 integrated circuit from Texas Instruments.

The DRV603 is a 2-V

RMS

pop-free stereo line driver designed to allow removal of the output dc-blockingcapacitors in audio applications to reduce component count and overall cost. The device is ideal forsingle-supply electronics where size and cost are critical design parameters.

Designed using TI’s patented DirectPath™ technology, the DRV603 is able to drive 2 V

RMS

into a 2.5-k Ωload with a 3.3-V supply voltage and more than 3 V

RMS

with a 5-V supply voltage. The device hasdifferential inputs and uses external gain-setting resistors that support a gain range of ±1 V/V to ±10 V/V,and line outputs that have ±8 kV IEC electrostatic discharge (ESD) protection. The DRV603 also hasbuilt-in shutdown control for pop-free on/off control.

Using the DRV603 in audio product applications can reduce component counts considerably compared totraditional methods of generating a 2-V

RMS

to 3-V

RMS

output. The DRV603 does not require a powersupply greater than 3.3 V to generate its 5.6-V

output or greater than 5 V to generate its 9-V

output,nor does it require a split-rail power supply. The DRV603 integrates its own charge pump to generate anegative supply rail that provides a clean, pop-free, ground-biased 2-V

RMS

to 3-V

RMS

output. The DRV603is available in a 14-pin TSSOP package.

This EVM is configured with one TOSLINK™ digital audio S/PDIF input and two RCA phono inputconnectors for analog input; the analog or digital input is selected with pin headers. The pin headers canalso be used to feed balanced analog audio into the DRV603. The output signal is available on two RCAphono connectors. The power supply is connected via a two-pin, 2,54-mm header.

This evaluation board is designed for testing applications such as set-top boxes, LCD/PDP TVs, Blu-rayDisc™ DVD players, DVD mini-component systems, home theater-in-a-box (HTIB) systems, orsoundcards.

This document presents EVM specifications, audio performance measurements graphs, and designdocumentation that includes complete circuit descriptions, schematic diagrams, a parts list, and PCBlayout design. Gerber (layout) files are available from the TI web site at www.ti.com .

2DRV603EVM SLOU252A – December 2008 – Revised January 2009Submit Documentation Feedback

1.1 DRV603EVM Features

Input

On/Off

Right Right

Digital

Left Left

DIR9001 PCM1793

+7 V Linear

Regulator

DRV603

Output

2 Quick Setup

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Quick Setup

Throughout this document, the abbreviation EVM and the term evaluation module are synonymous withthe DRV603EVM.

The DRV603EVM has these features:•Two-channel evaluation module (double-sided, plated-through PCB layout)•2-V

RMS

line output•Single-ended or balanced analog input•Digital S/PDIF TOSLINK input•No output capacitor required•Shutdown button

Figure 1 illustrates the functional diagram for the EVM. Table 1 summarizes the key parameters.

Figure 1. DRV603EVM Functional Block Diagram

Table 1. Key Parameters

Key Parameters Specification/Unit

Supply Voltage 7 VNumber of Channels TwoLoad Impedance 2.5 k Ω(min)Output Voltage 3 V

RMS

Dynamic Range: Analog Input > 112 dBDynamic Range: Digital Input > 108 dB

This section describes the DRV603EVM board with regard to the power supply and system interfaces. Itprovides information about handling and unpacking the DRV603EVM, absolute operating conditions, and adescription of the factory default switch and jumper configurations.

The following subsections provide a step-by-step guide to configuring the DRV603EVM for deviceevaluation.

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2.1 Electrostatic Discharge Notice

2.2 Unpacking the EVM

2.3 Power-Supply Setup

3 On/Off Sequence

PVDD

Enable

> 50 sm> 50 sm

On/Off Sequence

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CAUTION

Many of the components on the DRV603EVM are susceptible to damage byelectrostatic discharge (ESD). Customers are advised to observe proper ESDhandling precautions when unpacking and handling the EVM, including the useof a grounded wrist strap at an approved ESD workstation.

Failure to observe proper ESD handling procedures may result in damage toEVM components.

Upon opening the DRV603EVM package, ensure that the following items are included:•One DRV603EVM evaluation board, including:– One DRV603PW device

If either item is missing, please contact the Texas Instruments Product Information Center nearest you toinquire about a replacement.

A single power supply is required to power up the EVM. The power supply is connected to the EVM boardusing a two-pin, 2,54-mm header (J10). Table 2 lists the recommended supply voltage.

Table 2. Recommended Supply Voltage

Description Voltage Limitations Current Requirement Cable

Power supply 7 V 0.10 A —

CAUTION

Applying voltages above the limitations given in Table 2 may cause permanentdamage to your hardware.

For minimum click and pop interference during device power on and power off, the DRV603 Enable pin(pin 5) should be held low, primarily because of pre-charging of the ac-coupled input capacitors. Thepreferred power-up/-down sequence is shown in Figure 2 .

Figure 2. Power-Up/-Down Sequence

This sequence is controlled by the onboard power-supply monitor, U95.

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4 Component Selection

4.1 Charge Pump

4.2 Power-Supply Decoupling Capacitors

4.3 Using the DRV603 as a Differential Input, Second-Order, Low-Pass Filter

R1R3C1

R1R3

-In

+In

DRV603

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Component Selection

The charge pump flying capacitor, C13, serves to transfer charge during the generation of the negativesupply voltage. The PVSS capacitor must be at least equal to the charge pump capacitor in order to allowa maximum charge transfer. Low equivalent series resistance (ESR) capacitors are an ideal selection, witha typical value of 1 µF. Capacitor values less than 1 µF can be used, but the maximum output can bereduced. It is therefore recommended to validate the design with thorough testing.

The DRV603 is a DirectPath™ line driver amplifier that requires adequate power-supply decoupling toensure that noise and total harmonic distortion (THD) are low. A good low ESR ceramic capacitor, C12(1 µF typical), placed as close as possible to the device V

leads is the best option. Placing thisdecoupling capacitor close to the DRV603 device is important for amplifier performance. For filteringlower-frequency noise signals, a 10- µF or greater capacitor placed near the audio amplifier may also help,but is not required in most applications because of the high PSRR of the DRV603.

The charge pump circuit does apply ripple current on the V

line, and an LC or RC filter may be neededif noise-sensitive audio devices share the V

supply.

Several audio digital-to-audio converters (DACs) used in typical consumer applications require an externallow-pass filter to remove out-of-band noise. This function is also possible with the DRV603; the EVM isconfigured as a 50-kHz, second-order active Butterworth filter to accomplish this filtering using an MFB(Multiple Feed Back) topology with a differential input. Furthermore, the DRV603 requires an ac-couplingcapacitor to remove dc content from the source.

The recommended component values can be calculated with the help of the TI FilterPro active filter designprogram available at http://focus.ti.com/docs/toolsw/folders/print/filterpro.html on the TI web site. Figure 3illustrates the circuit design for this configuration.

Figure 3. Differential Input, Second-Order, Active Low-Pass Filter

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5 Layout Recommendations

5.1 SGND and PGND Connections

6 DRV603EVM Performance

Layout Recommendations

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Figure 3 uses the component references also used in the FilterPro software. Various recommendation forfilter and gain settings are listed in Table 3 .

Table 3. DRV603EVM Filter Specifications

C23, C27, C24, C26, R23, R24, R22, R27, R25, R26,EVM Reference Designators

C28, C32 C25, C30 C29, C31 R29, R30 R28, R33 R31, R32

Gain High Pass Low Pass C1 C2 C3 R1 R2 R3

–1 V/V 1.6 Hz 40 kHz 100 pF 680 pF 10 µF 10 k Ω10 k Ω24 k Ω–1.5 V/V 1.3 Hz 40 kHz 68 pF 680 pF 15 µF 8.2 k Ω12 k Ω30 k Ω–2 V/V 1.6 Hz 40 kHz 33 pF 150 pF 6.8 µF 15 k Ω30 k Ω47 k Ω–2 V/V 1.6 Hz 30 kHz 47 pF 470 pF 6.8 µF 15 k Ω30 k Ω43 k Ω–3.33 V/V 1.2 Hz 40 kHz 33 pF 470 pF 10 µF 13 k Ω43 k Ω43 k Ω–10 V/V 0.6 Hz 30 kHz 22 pF 1 nF 22 µF 4.7 k Ω47k Ω27 k Ω

The resistor values should be low value to achieve low noise, but should be of high enough value toobtain a small size ac-coupling capacitor.

The MFB topology demands a unity-gain stable op amp. If this condition can be relaxed for a specificapplication, a capacitor from the inverting input to GND of the same value as C

can be used. Thisalternate configuration increases the high-frequency gain to 2.

The SGND and GND pins of the DRV603 must be routed separately back to the decoupling capacitor inorder to facilitate proper device operation. If the SGND pins are connected directly to each other, thedevice functions without risk of failure, but noise and THD performance can be reduced.

On the DRV603EVM, a star ground routing pattern is used; the star point is located directly below theDRV603 device itself.

This section discusses the DRV603EVM overall performance in key parametric areas. Table 4 throughTable 8 summarize the EVM specifications.

Note: All electrical and audio specifications are typical values.

Table 4. General Test Conditions

(1)

General Test Conditions Notes

Supply voltage 7.0 VLoad impedance 2.5 k ΩInput signal 1 kHz sine Digital audio TOSLINK S/PDIFMeasurement filter AES17

(1)

These test conditions are used for all tests, unless otherwise specified.

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DRV603EVM Performance

Table 5. Electrical Data

Electrical Data Notes/Conditions

Output voltage, 2500 Ω3.4 V

RMS

1 kHz, THD+N = 1%, T

= +25 °COutput voltage, 100 k Ω3.5 V

RMS

1 kHz, THD+N = 1%, T

= +25 °C1 kHz, V

= 2 V

RMS

, including linearSupply current < 90 mA

regulator and LED

Table 6. Audio Performance Analog Input

Audio Performance Analog Input Notes/Conditions

THD+N, 2.5 k Ω0.02 V

RMS

< 0.070 % 1 kHz (Noise limited)THD+N, 2.5 k Ω0.2 V

RMS

< 0.007 % 1 kHz (Noise limited)THD+N, 2.5 k Ω2 V

RMS

< 0.002 % 1 kHzDynamic range > 112 dB Ref: 2 V

RMS

, A-weighted, AES17 filterNoise voltage < 6 µV

RMS

A-weighted, AES17 filterDC offset < 1 mV No signal, 2.5-k ΩloadChannel separation > 90 dB 1 kHz, 2 V

RMS

Frequency response: 20 Hz to 20 kHz ±0.5 dB 2 V

RMS

/ 2.5 k Ω

Table 7. Audio Performance Digital Input

Audio Performance Digital Input Notes/Conditions

THD+N, 2.5 k Ω0.02 V

RMS

< 0.070 % 1 kHz (Noise limited)THD+N, 2.5 k Ω0.2 V

RMS

< 0.007 % 1 kHz (Noise limited)THD+N, 2.5 k Ω2 V

RMS

< 0.002 % 1 kHzDynamic range > 109 dB Ref: 2 V

RMS

, A-weighted, AES17 filterNoise voltage < 9 µV

RMS

A-weighted, AES17 filterDC offset < 1 mV No signal, 2.5-k ΩloadChannel separation > 90 dB 1 kHz, 2 V

RMS

Frequency response: 20 Hz to 20 kHz ±0.5 dB 2 V

RMS

/ 2.5 k Ω

Table 8. Physical Specifications

Physical Specifications Notes/Conditions

PCB dimensions 70 ×70 ×25 mm Width ×Length ×Height (mm)Total weight 40 g Components + PCB + Mechanics

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6.1 THD+N versus Voltage

100 m50 m 500 m 15

Voltage (V )

RMS

0.1

0.01

0.001

0.0001

THD+N (%)

2.5 kW

100 m50 m 500 m 15

Voltage (V )

RMS

0.1

0.01

0.001

0.0001

THD+N (%)

2.5 kW

DRV603EVM Performance

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Up to approximately 1 V

RMS

, THD+N is dominated by the noise element for both the analog input and thedigital input, respectively, as shown in Figure 4 and Figure 5 . 0.001% equals –100 dB for both graphs.

Figure 4. THD+N versus Voltage (Analog Input)

Figure 5. THD+N versus Voltage (Digital Input)

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6.2 THD+N vs Frequency

0.1

0.01

0.001

0.0001

THD+N (%)

20 100 500 1 k 5 k 10 k 20 k

Frequency (Hz)

Load: 2.5 kW

200 mVRMS

2 VRMS

0.1

0.01

0.001

0.0001

THD+N (%)

20 100 500 1 k 5 k 10 k 20 k

Frequency (Hz)

200 mVRMS

2 VRMS

48 kHz Full-Scale

Load: 2.5 kW

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DRV603EVM Performance

Figure 6 and Figure 7 illustrate characteristic performance for THD+N versus frequency.

Figure 6. THD+N versus Frequency (Analog Input)

Figure 7. THD+N versus Frequency (Digital Input, 0 dBFS)

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6.3 FFT Spectrum with –60dBFS Tone

100

110

120

130

140

150

dBrA (dB)

048 12 16 20 22

Frequency (kHz)

100

110

120

130

140

150

dBrA (dB)

048 12 16 20 22

Frequency (kHz)

DRV603EVM Performance

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For the FFT plot shown in Figure 8 , the reference voltage is 3 V

RMS

and the FFT size is 16 k.

Figure 8. FFT Spectrum with –60-dBFS Tone (Analog Input)

For the FFT plot shown in Figure 9 , the reference voltage is 2.1 V

RMS

and the FFT size is 16 k.

Figure 9. FFT Spectrum with –60-dBFS Tone (Digital Input)

For both FFT plots, the digital input, noise, and dynamic range are: 7.7 µV

RMS

, 108.5 dB referenced to 2.1V

RMS

, A-weighted.

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